JPS5897908A - Amplifier - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] The present invention relates to an amplifier using a field effect transistor in the first stage, and its purpose is to provide an amplifier with stable DC operation and low noise. There is something to do.

Generally, an amplifier using a field effect transistor in the first stage is constructed as shown in FIG. In FIG. 1, 1 is an input terminal, 2 is an output terminal, 3 and 4 are power supply terminals, 6 and 6 are field effect transistors, 7 is a second stage amplifier circuit, 8 and 9
, 10.11 are the field effect transistors 5 and 6 (
Ias resistance 12.13 is a feedback resistance from the output side of the second stage amplifier circuit 7 to the gate electrode of the field effect transistor 6. In this amplifier, the field effect transistor 5 acts as a first stage amplifier circuit, and the field effect transistor 6 has a sufficiently large gain of the second stage amplifier circuit 7, and because of the negative feedback of the resistor 12. It operates as a DC servo circuit at the output end of the second stage amplifier circuit 7, and acts to keep the DC offset of the output terminal 2 at zero potential.

Now, the saturated drain current of a field effect transistor varies widely depending on the device itself, and also changes greatly depending on the temperature. Therefore, in the conventional amplifier described above, in order to operate so that the DC drain current of the field effect transistor 6. The operating point must be set so that the device operates with a drain current smaller than the drain current. On the other hand, the above-mentioned conventional amplifiers are often used particularly in audio equipment and the like, and are required to have low noise. The noise level is proportional to the door button 7 when the mutual conductance of the field effect transistor 5 as the first stage amplifier circuit is taken as lv, so in order to reduce noise, the above field effect transistor should be used. It is necessary to use it in a state where l is large. and,
Since the value of pm is proportional to the drain current ID, in order to reduce the noise, it is necessary to set the operating point of the field effect transistor 6 to a saturated drain current or a large value close to it.

However, in the conventional amplifier described above, in order to keep the operating point of the field effect transistor 6.6 constant, the drain current is set to be smaller than the minimum possible saturated drain current, taking into consideration the variations in the element itself and the temperature characteristics. Therefore, in actual use, it is difficult to set the above-mentioned field effect to a large value close to it, and it is extremely difficult to achieve low noise. Ta.

The present invention solves these conventional drawbacks,
A second amplification stage is provided on the output side of the first amplification stage including a field effect transistor, and a low-pass third amplification stage is provided on the output side of the second amplification stage, and the second amplification stage A signal is negatively fed back to the source electrode of the field effect transistor from the output side of the stage, and negative feedback is given to the second amplification stage from the output side of the third amplification stage, and the source electrode of the field effect transistor is The device is configured to apply direct current negative feedback to stabilize the output taken out from the output side of the second amplification stage to the output terminal, and also to stabilize the operating point of the field effect transistor. .

Embodiments of the amplifier of the present invention will be described below. Second
The figure shows an embodiment of the amplifier of the present invention. In FIG. 2, 21 and 22 are field effect transistors as the first amplification stage,
．． The source electrodes and drain electrodes of the electrodes 22 are connected to each other in a parallel relationship. The drain electrodes of the field effect transistors 21 and 22 are connected to a positive power supply terminal 43 via a resistor 27, and the source electrodes of the field effect transistors 21 and 22 are connected to a capacitor 34 and a resistor that constitute a negative feedback circuit. 36 and is also grounded via a variable resistor 29 and a capacitor 33, and a connection point between the variable resistor 29 and the capacitor 33 is connected to a negative power supply terminal 44 via a transistor 26 and a resistor 3o. The gate electrode is connected to the input terminal 41. Reference numeral 23 designates a differential amplifier as a second amplification stage, whose negative phase input terminals are connected to the drain electrodes of the field effect transistors 21 and 22, and whose common mode input terminals are grounded through a capacitor 32 and connected to a resistor. It is connected to a positive power supply terminal 43 via a transistor 28 and a negative power supply terminal 44 via a transistor 26 and a resistor 31, and its output terminal is connected to an output terminal 42. Reference numeral 24 designates a differential amplifier as a low-pass type third amplification stage, the common mode input terminal of which is connected to the output terminal of the differential amplifier 23 via a resistor 37 and grounded via a capacitor 39. and
Its negative phase input end is connected to the output end via a capacitor 4o and is grounded via a resistor 3B.
The output ends thereof are connected to the base electrodes of the transistors 25 and 26, respectively. Further, the output terminal of the differential amplifier 23 as the second amplification stage is connected to the field effect transistors 21 and 22 via a resistor 36 constituting a negative feedback circuit.
connected to the source electrode of .

Here, the gains of the amplifiers constituted by the transistors 25, 26, etc. are set to be equal, and the variable resistor 29 has a much larger resistance value than the resistor 36, The above field effect transistor 21.2
This is provided to adjust the drain current of 2. The variable resistor 29 sets the field effect transistors 21 and 22 to operate with a saturated drain current. With this configuration, the signal applied to the input terminal 41 is amplified by the field effect transistors 21 and 22 as the first amplification stage, and the signal applied to the input terminal 41 is amplified by the field effect transistors 21 and 22 as the first amplification stage. The signal is applied to the input terminal, amplified by the differential amplifier 23, and taken out to the output terminal 42.

The output signal of the differential amplifier 23 as the second amplification stage is negatively fed back to the source electrodes of the field effect transistors 21 and 22 as the first amplification stage. On the other hand, the output of the differential amplifier 23 as the second amplification stage is
The DC component is applied to the common mode input terminal of the differential amplifier 24 as an amplification stage, and the DC component is amplified by the differential amplifier 24 and applied to each pace electrode of the transistor 26. Negative DC feedback is applied to the second amplification stage and the source electrodes of the field effect transistors 21 and 22 from the output side of the stage.

In the amplifier configured as described above, if a potential difference occurs between the source electrode and the gate electrode of the field effect transistors 21 and 22 due to a temperature change or the like, and the drain current decreases, then the second The potential at the negative phase input terminal of the differential amplifier 23 as the amplification stage increases, the potential at the output terminal 42 decreases, the output of the differential amplifier 24 as the third amplification stage decreases, and the output of the differential amplifier 24 as the third amplification stage decreases. The emitter potential of 26 decreases. Therefore, the field effect transistors 21 and 22 are controlled so that the potential difference between their source electrodes and gate electrodes becomes zero potential, and their drain currents increase to operate at saturated drain currents. At this time, the output of the differential amplifier 24 serving as the third amplification stage acts on the transistor 26 so that the potential at the output end of the differential amplifier serving as the second amplification stage becomes zero potential.

On the other hand, when the potential on the output side of the second amplification stage increases, the output of the differential amplifier 24 as the third amplification stage increases, and the emitter current of the transistor 26 increases. The potential at the common-mode input terminal of the differential amplifier 23 serving as the second amplification stage is lowered, and the potential at the output terminal thereof is lowered.

At this time, the output of the differential amplifier 24 as the third amplification stage is applied to the source electrodes of the field effect transistors 21 and 22 by the transistor 26, so that the output is applied to the source electrodes of the field effect transistors 21 and 22. The potential difference between the gate electrode and the gate electrode is zero, and the drain current is controlled to be a saturated drain current.

As described above, according to the present invention, there is provided a first amplification stage having a field effect transistor, a second amplification stage connected to the output side of the first amplification stage, and a second amplification stage connected to the output side of the second amplification stage. A low-pass type third amplification stage connected to the second amplification stage is provided, negative feedback of the signal is applied from the output side of the second amplification stage to the source electrode of the field effect transistor, and the output side of the third amplification stage is Since negative feedback is applied to the second amplification stage and direct current negative feedback is applied to the source electrode of the field effect transistor, the output level of the amplifier itself can be maintained at zero potential, and the field effect The transistor can be operated with saturated drain current.

Therefore, it has the advantage of stable DC operation and low noise.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a conventional amplifier, and FIG. 2 is a circuit diagram showing an embodiment of the amplifier of the present invention. 21.22...Field effect transistor, 23゜24...Differential amplifier, 25,26...
Transistor, 27.2B, 29, 30, 31. 35
, 36° 37.3B...Resistance, 32, 33
, 34 , 39 . 40... Capacitor.

Claims (1)

[Claims] a first amplification stage having a field effect transistor; a second amplification stage connected to the output of the first amplification stage; and a third low-pass amplification stage connected to the output of the second amplification stage. negative feedback of a signal is provided from the output side of the second amplification stage to the source electrode of the field effect transistor, and negative feedback is provided to the second amplification stage from the output side of the third amplification stage. 2. An amplifier configured to provide negative direct current feedback to the source electrode of the field effect transistor.