JPS5910035A - Variable impedance device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a variable impedance device used in a noise reduction device or the like that includes a signal compressor and a signal expander.

Conventionally, in order to improve the S/N ratio of a particular communication system or a particular recording/reproduction system, it has been known to use a noise reduction device equipped with a signal compressor and a signal expander in that system. .

In particular, there is a noise reduction device that uses the circuit components of a signal compressor and the circuit components of a signal expander in common, and can switch between the signal compressor function and the signal expander function by switching a mode switch. Society of Electronic and Radio Chikunizian Volume 8
It was proposed by the May/June 1974 issue.

FIG. 1 shows a circuit block diagram of this switchable signal compressor/expander. This switchable signal compressor/expander is a Dolby B7 reduction system. (the word Dolby is a registered trademark of Dolby Laboratories).

σ) By switching the Dolby B noise reduction system to a signal compressor, the system becomes an encoder. A signal compressor (encoder) compresses the dynamic range of the input signal before it is recorded on audio tape. By switching the system to a signal expander, the system also becomes a decoder. A signal expander (decoder) restores the dynamic range of the input signal. The noise introduced during the recording/playback process is significantly reduced, so the I1 compressor-decompressor combination acts as a noise reduction device.

Dolby F3J noise reduction system
Signal compression/signal expansion operations are typically performed on signal components higher than a frequency value of 200 Hz.

Referring now to the circuit blocks of FIG. 1, a well-known encoder/decoder will now be described in detail.

The noise reduction device shown in FIG. 1 has an input terminal T and an output terminal T! It has a main bus 1m between the two, and a side bus 15 between the mode switch 8W for encoder/decoder switching and the output terminal T.

A coupling circuit 101 and an inverter 11 are arranged 1 m apart from the main bus.

On the side bus 15 is an OT variable filter 12. Signal amplifier】3. Control amplifier 14. Rectifier/smoothing circuit 15. Overshoot suppressor 16 is arranged mode switch SW
If is connected to terminal Tll, this circuit block becomes an encoder.

The main bus 1 m long coupling circuit 10 and inverter 11 perform linear amplification.

The variable filter 12 receives a control signal S generated by a rectifier/smoothing circuit 15. Accordingly, the amount of transmission for signal components with a frequency of 200 Hz or higher is changed. To explain in more detail, variable filter 12° signal amplifier]3. Control amplifier 14. Due to the loop of the rectifier/smoothing circuit 15, when the level of the input signal at the common terminals T and lc of the mode switch SW decreases, the amount of transmission from the variable filter 12 increases.

Therefore, the input signal level! As the temperature decreases, the side bus l
Signal components at frequencies above 200 Hz on S increase.

If the circuit block is configured as an encoder, the signals on the side path 1 are added to the signals on the main bus 4m. Therefore, as shown in the amplitude-frequency characteristic of FIG. 2, signal components of 20 Q Hz or higher have gradually larger amplitude values as the signal level decreases.

10,000, mode switch SW is connected to terminal T, t+I
In the case of L, this circuit block is connected to the decoder. The inverter 11 on the main bus 1m is configured as a signal inverter, and the output signal of this inverter 11 is applied to the common terminal T of the motor switch SW. Terminal T.

When the input signal is marked 710, a signal having a phase opposite to that of the input signal is supplied. Therefore, since the signal on the side bus IS is subtracted from the signal on the main bus 1m, the width-frequency characteristic of the decoder σ) output signal is 200Hz.
As the signal level decreases, the following ten signal components have gradually smaller amplitude values of 5Vr-.

Overshoot suppressor 16 includes variable filter 1
2. Limit the VA value of the voltage between the terminals.

If this overshoot suppressor 16 were not in place, undesirable changes would occur in the high level transient signals.

By the way, one of the recent technological trends in electronic devices, such as portable tape recorders, is to make them smaller and lighter.

In such a case, it is desirable to use a small power supply battery σ), and the power supply voltage will be as low as, for example, 3V.

In view of the above-mentioned technical trends, the present inventor considers whether or not the noise reduction operation described above is possible using an ultra-low voltage source of about 3V.According to the study of the present inventor, a noise reduction device can be configured with a power supply voltage of about 3V. It was found that each circuit of the signal compressor system and each circuit of the signal expansion system could not operate.

This cannot be achieved by simply changing the circuit constants of each circuit constituting the noise reduction device for use with a single low-voltage source.

Therefore, the inventor of the present invention did not carefully study each circuit constituting the noise reduction device. Regarding the variable filter 12 constituting the noise reduction device, we have recently come up with a new technical idea.Therefore, it is an object of the present invention to provide a variable impedance device that operates reliably with a low voltage power supply. It's about doing.

Hereinafter, the present invention will be specifically explained with reference to the drawings.

FIG. 3 shows a circuit block diagram of a switchable signal compressor/signal expander according to one embodiment of the present invention, with the components within the dashed line 10 being implemented in a monolithic semiconductor integrated circuit. The numbers in circles indicate the terminal numbers of the integrated circuit.

Main bus 1m between input terminal T and output terminal T
A coupling circuit 109 and an inverter 11 are arranged above. The input terminal T is connected to the first terminal of the integrated circuit via the human power coupling capacitor C7. The input amplifier 20 is configured in the form of a so-called operational amplifier, and has a non-inverting input terminal (+) and 9 inverting input terminals (-).

It has an output terminal. This non-inverting input terminal (+) is connected to the above-mentioned No. 1 terminal, and this output terminal is used as the No. 3 terminal of the integrated circuit and the terminal T of the mode switch 8W outside the integrated circuit.
, and the main bus 1mI/r, . By connecting the negative feedback network 21 consisting of resistors R, , )L between the output terminal of the input amplifier 20 and the inverting input terminal (-), the voltage gain of the human power booster 20 is increased. Set.

One end of the resistor of the negative feedback network 21 is also grounded via the capacitor 03 connected to the 4th terminal.
ing. The reference voltage generator 22 has a power supply voltage V at the 4th terminal. A DC reference voltage vRF, F set at a level approximately half of C (σ) is supplied. There is a resistance R3° between the 1st and 4th terminals. By connecting , the DC reference voltage VRIF is supplied to the l@ terminal. Therefore, the DC potential at the output terminal of the human power amplifier 20 is also approximately at a level close to this DC reference voltage VREF.

A variable filter 2 is installed on the side bus l between the motor switch SW and the output terminal T2. Signal amplifier 13. Control amplifier 14. A rectifier/smoothing circuit 15 and an overshoot suppressor 6 are arranged. variable filter 2
is capacity 0. ．． 0. .

Resistance ■. 01 company. 7. It is constituted by a variable impedance 23.

The mode switch 8W has a capacity of 04, 0. Via Mata collection tit
The circuit σ) is connected to terminal 5. The variable impedance 23 is connected to this fifth terminal.

The variable impedance 23 is a variable impedance device according to the present invention, and has a circuit configuration as shown in FIG. Transistor Q,,Q.

Each base of is held at a predetermined base voltage vREF.

The input signal Vio is connected to the bases of the transistors Q, ,Q,
is supplied. Transistors Q configured in a differential pair,
Each emitter of Qe is equipped with a through voltage-current converter 27, which will be described later.
A control signal current S01 is supplied from a (hereinafter referred to as a -CV/I converter). Transistor Q is a control signal current SO supplied from a v/1 converter 27b, which will be described later.

controls the current flowing through transistors Q, , Q4.

Note that the V/l converter 27b is connected to a separate power source E8. is provided. The purpose of providing this is to keep the transistors Q, , Q, in a non-operating state when the input signal supplied from the No. 5 terminal reaches the normal signal level Kl, and to put them into an operating state when the input signal is at a predetermined level R or higher. belongs to. Furthermore, the resistance ratio is 1. is VCe to increase the dynamic range.
Alternatively, it may be replaced with a foot current circuit.

The input point σ) human power impedance in the variable impedance device 23 such as Dobe is determined. Let VA be the voltage level at point A. At this time, voltage level vA and transistor Q
8. There is a relationship between each collector [1Ic1°1c2 of Qt as shown in the following equation.

Ho, ==-vA/4. n+ rel("ss/"s
,+i deception+r8. )・・・・・・(1) t C2−V A ,/”)(I, o+ T el (
1+ Rs*/2”s, -4-%, , +r, , )
......(2) However, in the above (11, (21 formulas), Rm is the resistance ratio 1
．． .

) tl, 1, rel are the emitter resistances of transistors Q, , Q2.

Then, the transistor Qs+Q by 'CI and 'C2
6. Find the voltage difference between each base.

vBg5 'BE6""e2 (iC2'CI)I
I: re2. V A/I(Im+re,
``'''' (31 However, [ is transistor Q,
Q, σ) Each emitter is 2 and 4 resistors.

Historically, the currents 16 and 11 flowing through point A are IA = re
,, ・VA/()Lmtenre,)・re3・kawa・(
4).

Then, from the above vA and ■□, the input impedance R1
When finding n, 'in = vA/ I A = (Rm+rel)・
rf:3/' (32.=(51).

Next, the circuit operation of transistors Q, , , Q, , will be described.

When the signal level of the input signal ln rises, the level of the output SO of the V/l converter 27a also rises. Then, the input voltage of the V/I converter 27b is
When the voltage level IiCtx is higher than the voltage level of , the output S
O7 is supplied to the base of transistor Q9. Transistor Q is turned on, and the current flowing through diodes D, D2 increases. Current I in transistor Q0. flows.

Corresponding to the current 1o (7') current tank -, the input impedance)tin suddenly becomes low.

Incidentally, in the process of arriving at the variable impedance device 23 having the circuit configuration as described above, the inventor also considered a variable impedance device as shown in FIG.

For reference, the transistor Qs + Qa + V/l converter 27b described in the embodiment of the present invention will be described below.
is provided. In this case, the power supply voltage is, for example, 2
If the voltage is as low as V, the output vDC of the rectifier/smoothing circuit 15 will not be limited to a predetermined voltage level. As a result, the amount of current flowing through the control signal sO is also limited, and a sufficient current does not flow to lower the input impedance R1n.

Power supply voltage is 2V, input signal Vio is OdB, frequency f
When is 20KHz, according to the inventor's experiment, 1 is shown in Fig.
The frequency characteristics shown in 1 were obtained. That is, since the human power impedance R1n cannot be lowered, the frequency characteristic f gradually increases from around 5 KHz and reaches 20 KHz.
In contrast, when the variable impedance device 23 to which the present invention is applied, shown in FIG. 5, is tested under the same conditions,
A flat frequency characteristic as shown by f in FIG. 7 was obtained.

This frequency characteristic f is obtained by turning on the transistor Q0 using the output sh of the v/1 converter 27b. - Variable impedance device 23σ) Input impedance) t, in can be lowered to the desired impedance even if the power supply voltage is about 2V. It has a terminal (+), an inverting input terminal (-), and an output terminal. This non-inverting input terminal (+) is connected to the fifth terminal and the variable impedance 23. By connecting the negative feedback network 24 composed of resistors 13σ) and the inverting input terminal (−) of the signal amplifier 13σ, the signal amplifier 130 can be set with a gain or There is. The output signal at the output terminal of the signal amplifier 13 is supplied to an overshoot suppressor 16.

Overshoot suppressor 16 is provided to prevent undesirable changes due to high level transient signals. The output signal of the overshoot suppressor 16 is sent to the side bus 45 of the coupling circuit 10 via the buffer 25.
transmitted to.

On the other hand, the control amplifier 14 is configured in the form of a so-called operational amplifier σ), with a non-inverting input terminal (+) and an inverting input terminal (-).
, has an output terminal. This non-inverting input terminal (+) is also connected to the fifth terminal and the variable impedance 23. resistance) L, , R,.

R7, Capacity 0. ．． 0. Negative feedback network 2 constructed from
6 is connected, the voltage gain of this control amplifier 14 is set. 6@ terminal is the resistance of the negative feedback network 26)! +, o, , capacity 0. ．． It is arranged for connection outside the semiconductor integrated circuit at 0°. Control amplifier 14
The output signal is transmitted to the rectifier/smoothing circuit 15.

The rectifier/smoothing circuit 15 includes a rectifier 15a composed of a diode D3, and has a capacitance of 081 GG + resistance R, o.
, , L(l,.5.Diode I) 4 includes a smoothing circuit 15b which is falsely turned off. Diode D4 adjusts the so-called attack time and recovery time to appropriate values. Terminal 7 and 8 are smoothing circuit 1
5b capacity i0. ．． The resistor RI04+R3° is arranged for connection outside the semiconductor integrated circuit. The output voltage of the smoothing circuit 15b is output from the V/I converter 27a,
27 b.

The V/I converters 27a and 27b generate a control signal current SC, which corresponds to the output voltage of the smoothing circuit 15c.

S02 is generated at its output. Control signal current 8C7°S
According to the magnitude of O7, the impedance value of the variable impedance device 23 constituting the variable filter 12 is controlled as described above.

Variable filter 12. Control amplifier 14. Rectifier/smoothing circuit 15. The voltage-to-current converter 27 controls the impedance value of the °C variable impedance 23 according to the decrease in the signal level at the common terminal T of the mode switch SW. The level of the signal component having a frequency of 200 Hz or more transmitted to the signal generator 45 increases.

Coupling circuit 10 is a resistor placed 1m above the main bus)
A signal component on the main bus 1m and a signal component on the side bus lS are connected to the common connection point of the resistor R8 and the resistor R0. A signal of n-components is obtained.

The inverter 11 is configured in the form of a so-called operational amplifier, and has a non-inverting input terminal (+) and 9 inverting input terminals (-).

It has an output terminal at ℃. The non-inverting input terminal (+) is connected to the No. 4 terminal, the inverting input terminal (-) is connected to the common connection point of Rs, l, etc., and the output terminal is connected to the No. 2 terminal.
1'''C, is the resistance value of the resistor connected between the output terminal of the inverter 11 and the inverting input terminal (-), and the resistance value of the upper resistor 8.H. By setting
It is possible to set the level of the output signal of the switchable signal compressor/signal expander obtained from the number terminal.

If the mode switch SW is connected to the terminal T, the output signal of the input amplifier 20 on the main bus 1m is transmitted to the common terminal 1'.

In this case, the signal component on the main bus 1m is added to the signal component on the side bus, so this circuit block also operates as an encoder.

- If the mode switch 8W is connected to the terminal l114, the output signal of the inverter 11 is transmitted to the common terminal. In this case, the signal on the side bus 1S is subtracted from the signal on the main bus 1rT1, so that this circuit block operates as a decoder.

Note that the No. 9 terminal is connected to the control circuit 28.

When terminal No. 9 is connected to ground potential again by the switch, the control circuit 28 stops the operation of the voltage-1 current converter 27. Further, the 10th terminal is a power supply voltage supply terminal, and the 11th terminal is a grounding terminal.

Side bus! , the non-inverting input terminal (+) of the control amplifier 14 is coupled to the output terminal of the signal amplifier 13. The variable impedance 23 is the resistance of the 0Jf filter 12 )L, , , )L,. , the reference fP-voltage "RUF" is supplied from the reference voltage generator 22 through Since 100 percent direct current negative feedback is applied from the output terminal to the inverting input terminal via the negative feedback circuit 26, the non-inverting input terminal (+) of the control amplifier 14.

Each DC potential of the inverting input terminal (-) and the output terminal is set to a level approximately close to the reference voltage V□F.

Therefore, the operating point of the rectifier/smoothing circuit 15 is set to a potential level approximately close to this reference voltage, voltage VRIF.

The negative feedback network 26 of the control amplifier 14 has a DC specific gravity capacitance C.
0 is installed, no current flows through the resistance of the negative feedback circuit network 26.

Therefore, the DC input current M' flows into the non-inverting input terminal (+) and the inverting input terminal (-) of the control amplifier 14, respectively.
t+lIN! ”(-) Voltage v at IN and output terminal
K is given by the following formula and is the output voltage V of the control amplifier 14. ′
has only an extremely small offset voltage v'C,ff.

v0′”= vRlF (′+n+ +1(1nt
) "HH8+Rue 1' (-), N-vR, F-vtf
f...(2) According to the above embodiment, the reference 'r
Ji, DC reference voltage vRE generated by the pressure generator 22
By setting F to approximately half the level of the power supply voltage vcc, the signal amplifier]3. Control amplifier 14. Each output DC level of the human power amplifier 20° inverter 11 is set to the power supply voltage vcC.
Since the level can be maintained at about half of the current level, the dynamic range of each output can be increased to a large value.

As described above, according to the variable impedance device of the present invention, it is possible to control the impedance to a desired value even if the power supply voltage is an extremely low voltage.

If the variable impedance device is used in a noise reduction device, extremely good frequency characteristics can be obtained by the impedance control.

[Brief explanation of the drawing]

Fig. 711 is a block diagram showing an example of the circuit configuration of a noise reduction device, Fig. 2 is a frequency characteristic diagram, Fig. 3 is a circuit diagram of a noise reduction device to which the variable impedance device of the present invention is applied, and Fig. 4 is a variable impedance device. FIG. 5 is a circuit diagram of a variable impedance device studied by the inventor in the process of making the present invention, and FIG. 6 is a frequency characteristic diagram. 23... Variable impedance device, Q + * Q
! +Q= ,Q4. Q= ,Qe −Q? ,Qs
'...Transistor, Q,...Control transistor, 2
7a, 27b...voltage-current converter, 80. ,So,
...control signal current, ■, ...human power signal. ■ Agent Patent Attorney Usui 1) Toshiyuki 1 Figure 2 Figure 6 Figure 3

Claims (1)

[Claims] 1. A first amplifier that performs a predetermined amplification operation by comparing the input signal and a reference signal, and an output signal of the first amplifier corresponding to the current amount of the first control signal. A second amplifier that feeds back to the input terminal of the amplifier, and a control means that controls the gain of the first amplifier by a second control signal that is supplied when the input signal reaches a predetermined level or higher. Variable impedance device.