JPS5916441A - Scrambler - Google Patents

Abstract

PURPOSE:To prevent the result of encryption from being intepreted by the 3rd party, by outputting inputted digital data and digital data in response to a function generator as scrambled digital data to decrease erroneous transmission. CONSTITUTION:A shift register 103 stores sequentially the digital data outputted from an exclusive OR element 105. A pattern generator 102 outputs a digital pattern in a prescribed order. A function generator 104 outputs a digital pattern (random number) in response to an output of the shift register 103 and the generator 102 depending on a key pattern from an input terminal 106. The element 105 outputs an exclusive OR between an output of the generator 104 and the digital data from an input terminal 107. Thus, the erroneous transmission is decreased and since the random number depends on the scrambled data, the scrambled result is hardly interpreted by the 3rd party.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a scrambler for scrambling digital data.

As a method of scrambling digital data, random numbers are generated and the random numbers are used as the digital data Iζ.
The method of multiplying by 2 and adding is often used. In this case, conventional methods can be divided into two types: one in which the random number depends on the initial stage ν thickness, and the other in which the random number depends on the scrambled digital data ζ. However, is there a method that depends only on the initial value, after setting the initial value? 41 (Because the same random numbers are generated, third-party random numbers are easily exposed.) On the other hand, in the method that relies on scrambled digital data, if an error occurs during transmission, the error will persist for a long time after decoding. The object of the present invention is to eliminate the above-mentioned drawbacks.This object can be achieved with a scrambler having the following configuration.That is, in a scrambler that scrambles digital data, a first pattern generation means for generating digital patterns in a predetermined order; a storage means for storing the data of the trays filled in advance in order from the newest data among the scrambled digital data described below; Predetermined key
function generating means for generating a digital pattern corresponding to the outputs of the first pattern generating means and the storing means depending on the pattern; A second pattern generation means for outputting a pattern as scrambled digital data; For simplicity, it is assumed that the digital data is narrowly represented by /1 inary, and the mLi sequence is a series of 1 bit each. Fig. 1 is a block diagram showing an example of the present invention.

In the figure, a shift register 103 sequentially stores binary data output from an exclusive OR element (described later) bit by bit, and a pattern generator 102 outputs a binary pattern in a predetermined order. Function generator 104
depends on the key patterning from input terminal 106, said shift register 103 and said pattern generator 10
Outputs a random number 0 or 1 corresponding to the output of 2. An exclusive OR element 105 outputs the output of the function generator 104 and JN
The exclusive OR with the binary data from the JWt input terminal 107 is output.

FIG. 2 is a block diagram showing an example of a device for decoding data scrambled by the device of the present invention. Second
The figure is a block diagram of Figure 1 turned over from side to side.
and 105 have the same function.0 In FIG. 2, the shift register 203 is connected to the input terminal 207.
The pattern generator 202 sequentially stores the manually inputted binary data, and outputs the Baikari° pattern in a certain predetermined order. A function generator 204 generates the shift register 20 depending on the key pattern from an input terminal 206.
2 and the random number 0.1 according to the output of the pattern generator 202. The exclusive OR element 205 outputs the exclusive OR of the output of the function generator 204 and the binary data from the input terminal 207. When the device of the present invention is installed on the transmitting side and the device shown in Figure 2 is installed on the receiving side, the binary data is scrambled by the device of the present invention and converted to the original binary data by the device shown in Figure 2. 0 'turn '49 indicating that the data will be restored
1 devices 102 and 202 generate the same binary pattern, and the input terminal 106 and the key pattern input manually to 20G are also the same.

At this time, at some point during operation, the contents of shift registers 103 and 203 are the same scrambled binary data. Also pattern generators 102 and 202
Both produce the same inary butter-'. Therefore, the inputs of the same function generators 104 and 204 are the same, and the outputs are also the same. Adding the same random number modulo 2 twice to binary data returns it to the original binary data, so if the device of the present invention and the device shown in Fig. 2 are installed on the sending and receiving sides, respectively, the binary data becomes original. Scrambled by the device of the invention and restored by the device shown in FIG. 2 In addition, by reducing the number of bits in the shift registers 103 and 203, the propagation of transmission errors can be reduced.

The pattern generator 102 can be configured, for example, by a linear feedback shift register (see "Coding Theory" by Miyayo, Iwadare, and Imai, pp. 121-135, published by Shokodo, 1973). Reference) The initial value of the 0 shift register can be determined by establishing some kind of protocol between sending and receiving, and can be added according to the tide, or can be fixed at the beginning, or can be changed using a synchronization code. A certain 0 function generation profit is, for example, ROM or R
AB, (In other words, the key pattern is memorized and a part or all of the outputs of the shift register and pattern generator are regarded as addresses and stored at the addresses in the ROM or RAM. This is a method of outputting the bits of the key pattern.Alternatively, the method shown in FIG. 3 can also be used.

In the figure, one bit of the outputs of the pattern generator and shift register is manually input to an input terminal 305, and all or part of the remaining bit is input to an input terminal 304. The second function generator 301 outputs a random number 0 or 1 according to the digital pattern input from the input terminal 304, depending on the key pattern input from the input terminal 303.
The exclusive OR element 302 is connected to the second function generator 3Q1.
Exclusive OR is performed between the output of and the removed 1 bit.

The second function generator 301 can also be constructed from ltoM or RAM.

The key pattern may be a digital pattern arbitrarily selected by the user of the device of the present invention, or may be generated by a linear feedback shift register based on a plurality of predetermined bits called a key.

In the above embodiment, in order to make the explanation easier to understand, the random numbers are generated bit by bit, that is, the function generator 104, aol
output one bit at a time? However, parallel processing of n bits (n is a positive integer) and parallel processing are also possible. Further, the calculation can also be performed using M (M is an integer of 2 or more) instead of using 2 as the modulo.

The exclusive OR elements 105 and 205 can also be used as transformers that perform inverse transformations when inputs from the function generators 104 and 204 are considered as parameters.

Furthermore, the key patterns from the input terminals 106 and 303 can also be fixed. These modifications are within the scope of this invention.

As explained above in detail, by using the present invention, it is possible to reduce error propagation and scramble digital data in such a way that it is difficult for a third party to decode it because the random numbers depend on the scrambled data. , it is extremely effective when used in communication systems.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing an example of a device for restoring data scrambled by the Kinoe 8A' device, and FIG. 3 is a block diagram showing an example of a function generator. It is a block diagram showing an example. In the figure, 102.202 is a pattern generator, 103
．． 203 is a shift register, 104, 204 is a function generator, 105, 205, 302 are exclusive OR elements, and 301 is a second function generator.

Claims (1)

[Claims] Scrambler that scrambles digital data
a first pattern generating means for generating digital lines in a predetermined order; and a memory for storing data of a predetermined class in order from the latest data among the scrambled digital data described below. and a function generating means for generating a digital pattern according to the outputs of the first pattern generating means and the storage means, depending on a predetermined key pattern; a second pattern generating means for outputting a digital pattern according to the function generating means as scrambled digital data;