JPS59178681A - Pattern forming method - Google Patents
Pattern forming methodInfo
- Publication number
- JPS59178681A JPS59178681A JP58054389A JP5438983A JPS59178681A JP S59178681 A JPS59178681 A JP S59178681A JP 58054389 A JP58054389 A JP 58054389A JP 5438983 A JP5438983 A JP 5438983A JP S59178681 A JPS59178681 A JP S59178681A
- Authority
- JP
- Japan
- Prior art keywords
- conductor pattern
- pattern
- film
- plasma
- aluminum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
Ta1発明の技術分野
本発明は、磁気バブルメモリなどの製造工程のように、
アルミニウム系合金の膜をパターニングする工程を有す
る方法に関し、更に詳細にはアルミニウム系合金の膜の
腐蝕防止に関する。Detailed Description of the Invention Ta1 Technical Field of the Invention The present invention relates to the manufacturing process of magnetic bubble memories, etc.
The present invention relates to a method including a step of patterning an aluminum-based alloy film, and more particularly relates to corrosion prevention of an aluminum-based alloy film.
(bl技術の背景
第1図は磁気バブルメモリの層構成を示す断面図で、G
GGウェハ1に液相エピタキシャル成長法で形成したバ
ブル磁性膜2上に、SiOrからなる絶縁層3aを設け
、その上に^1−Cu (Cu O,5〜2%)から
成るコンダクタパターン4が形成されている。コンダク
タパターン4上に再びStO2の絶縁層3bを設けてか
ら、パーマロイパターン5がパターニングされ、最後に
5iOzまたは合成樹脂から成る絶縁N3cでコーティ
ングされる。(Background of BL technology Figure 1 is a cross-sectional view showing the layer structure of magnetic bubble memory.
An insulating layer 3a made of SiOr is provided on a bubble magnetic film 2 formed on a GG wafer 1 by liquid phase epitaxial growth, and a conductor pattern 4 made of ^1-Cu (CuO, 5 to 2%) is formed thereon. has been done. After providing an insulating layer 3b of StO2 on the conductor pattern 4 again, a permalloy pattern 5 is patterned and finally coated with an insulating N3c made of 5iOz or synthetic resin.
(c)従来技術とその問題点
このようにコンダクタパターン4はAl−Cuで構成さ
れるが、八1−Cuなどのようなアルミニウム系合金の
膜は、洗浄工程で腐蝕しやすく、そのためにコンダクタ
としての特性に悪影響を及ぼす恐れがある。第2図は従
来のコンダクタパターンの作成工程を示す断面図である
。まず(イ)のようにSiOrの絶縁1ii3aの上に
Al−Cuの膜41を蒸着またはスパンクリングで被着
させる。次いで(ロ)のようにホトレジスト6を塗布し
乾燥させた後、(ハ)のようにマスク7を重ねて露光し
、(ニ)のように現像しホトレジストのパターン61を
形成する。(ホ)のようにこのホトレジストパターン6
1をマスクにしてイオンミリングなどの手法でAl−C
uの膜41をエツチングすると、ホトレジスl−ハター
ン61の無い領域がエツチング除去されて、Al−Cu
のコンダクタパターン4が形成される。次に純水やアセ
トン中で超音波をかけて洗浄を行なった後、(1・)の
ようにレジストパターン61を除去し、再度(チ)のよ
うに洗浄を行なう。(c) Prior art and its problems As described above, the conductor pattern 4 is made of Al-Cu, but films of aluminum-based alloys such as 81-Cu are easily corroded during the cleaning process, and therefore the conductor pattern 4 is made of Al-Cu. This may adversely affect the characteristics of the product. FIG. 2 is a cross-sectional view showing a conventional conductor pattern creation process. First, as shown in (a), an Al--Cu film 41 is deposited on the SiOr insulation 1ii3a by vapor deposition or spankling. Next, a photoresist 6 is coated and dried as shown in (b), then exposed using a mask 7 as shown in (c), and developed as shown in (d) to form a photoresist pattern 61. This photoresist pattern 6 as shown in (e)
1 as a mask using techniques such as ion milling to remove Al-C.
When the U film 41 is etched, the area without the photoresist L-layer 61 is etched away, and the Al-Cu film 41 is etched away.
A conductor pattern 4 is formed. Next, after cleaning with ultrasonic waves in pure water or acetone, the resist pattern 61 is removed as shown in (1), and cleaning is performed again as shown in (h).
そして次のSiO2層3bの被着を行なう。Then, the next SiO2 layer 3b is deposited.
このようにAl−Cuのコンダクタパターン4が(チ)
の洗浄工程で洗浄されるため、折角パターン形成された
コンダクタパターン4の表面が洗浄水で腐蝕する。また
(へ)の洗浄工程でも、コンダクタパターン4の側面が
洗浄水に接触して腐蝕する。In this way, the Al-Cu conductor pattern 4 is
Since the conductor pattern 4 is cleaned in the cleaning process, the surface of the conductor pattern 4 on which the pattern has been formed is corroded by the cleaning water. Also, in the cleaning step (f), the side surfaces of the conductor pattern 4 come into contact with the cleaning water and corrode.
(d1発明の目的
本発明は、従来のコンダクタパターン形成時におけるこ
のような問題を解消し、洗浄時にコンダクタパターンが
腐蝕するのを未然に防止することを目的とする。(d1 Purpose of the Invention) The present invention aims to eliminate such problems during conventional conductor pattern formation and to prevent corrosion of the conductor pattern during cleaning.
(e)発明の構成
この目的を達成するために講じた本発明による技術的手
段は、スパンクリングや蒸着などの手法で被着形成した
アルミニウム系合金の膜をパクーニングして所定のパタ
ーンを得る方法において、アルミニウム系合金の膜が洗
浄水と接する時点より前に、該アルミニウム系合金の膜
を、酸素を含むプラズマに曝す方法を採っている。(e) Structure of the Invention The technical means according to the present invention taken to achieve this object is a method of obtaining a predetermined pattern by puncturing an aluminum alloy film deposited by a method such as spanking or vapor deposition. In this method, the aluminum-based alloy film is exposed to oxygen-containing plasma before the aluminum-based alloy film comes into contact with cleaning water.
(f)発明の実施例
次に本発明によるパターン形成方法が実際上どのように
具体化されるかを実施例で説明する。第3図は本発明に
よるパターン形成方法を工程順に示す断面図で、第2図
の従来のパターン形成方法と同じ工程には同じ符号がイ
」されている。即ち(イ)から(ボ)のコンダクタパタ
ーンのエソチング工程までは従来の構成と同しである。(f) Examples of the Invention Next, examples will be used to explain how the pattern forming method according to the invention is actually implemented. FIG. 3 is a sectional view showing the pattern forming method according to the present invention in the order of steps, and the same steps as in the conventional pattern forming method of FIG. 2 are denoted by the same reference numerals. That is, the steps from (a) to (b) for etching the conductor pattern are the same as the conventional structure.
本発明の方法ではこの(ホ)のコンダクタパターンのエ
ソチング工程と(ト)の洗浄工程との間で、酸素プラズ
マまたは空気プラズマに曝すことで、エツチングで形成
されたコンダクタパターン4の側面を酸化させ、アルミ
ナの膜42を形成する。アルミニウムの酸化膜は耐腐蝕
性に優れているので、(ト)の洗浄工程で洗浄を行なっ
ても、洗浄水で酸化膜42が腐蝕することはなく、従っ
てコンダクタパ(チ)の工程でレジストパターン61が
除去されると、コンダクタパターン4の上面43が露出
するので、次の洗浄工程で上面43が腐蝕しないように
、(す)の工程でも、前記の場合と同様に酸素プラズマ
または空気プラズマに曝すことで、程度の酸化膜44を
形成する。なおレジストパターン61の除去を、プラズ
マドライアッシャ−によって、レジストパターン61を
灰化して除去する場合は、灰化餘去後引き続いて1〜2
時間程度プラズマ雰囲気Gjいておくことで、(す)の
酸でコンダクタパターン4の上面43を酸化膜44で保
護してから、(ヌ)の洗浄工程で洗浄を行なう。In the method of the present invention, between the conductor pattern etching step (e) and the cleaning step (g), the side surfaces of the conductor pattern 4 formed by etching are oxidized by exposing them to oxygen plasma or air plasma. , an alumina film 42 is formed. The aluminum oxide film has excellent corrosion resistance, so even if it is cleaned in the cleaning process (g), the oxide film 42 will not be corroded by the cleaning water. When 61 is removed, the upper surface 43 of the conductor pattern 4 is exposed, so in order to prevent the upper surface 43 from being corroded in the next cleaning step, it is exposed to oxygen plasma or air plasma in the same way as in the previous case. By exposing, a certain oxide film 44 is formed. Note that when removing the resist pattern 61 by incinerating the resist pattern 61 using a plasma dry asher, the resist pattern 61 is removed by 1 to 2 steps after ashing.
The upper surface 43 of the conductor pattern 4 is protected by the oxide film 44 by leaving it in the plasma atmosphere Gj for about an hour, and then cleaning is performed in the cleaning step (v).
なお(へ)とくり)の2つの工程で酸化膜形成5−
を行なっているが、(す)の工程における1回の酸化膜
形成だけでも有効である。即ちコンダクタパターン4の
側面の血清に対し上面43の面積がはるかに大きいので
、側面が腐蝕してもコンダクタパターン全体としてはさ
ほど影響を受けない。Although the oxide film formation 5- is carried out in the two steps (He) and (B), it is also effective to form the oxide film only once in the step (S). That is, since the area of the upper surface 43 is much larger than the serum on the side surface of the conductor pattern 4, even if the side surface is corroded, the conductor pattern as a whole is not affected much.
このような場合は、(へ)の工程における側面の腐蝕防
止処理は行なわず、(す)の工程で」二面43に酸化膜
44を形成して、(ヌ)の洗浄工程における上面43の
腐蝕防止を行なう。In such a case, the corrosion prevention treatment on the side surface in the step (f) is not performed, and the oxide film 44 is formed on the second surface 43 in the step (s), and the corrosion prevention treatment on the top surface 43 is not performed in the step (v). Prevent corrosion.
このほかAl−Cuの膜41を被着した後直ちに膜41
の全面に酸化膜を形成することで、洗浄工程のみでなく
、ホトレジスト6の塗布工程やそれ以降のエソチング工
程などにおけるAl−Cu膜41の腐蝕も防止すること
ができ、特にリン酸液などで化学エツチングを行なう場
合に有効である。さらに(へ)窃工程における(l11
1面の酸化膜形成も行なえば完璧である。□
+g1発明の効果
以上のように本発明によれば、Al−Cuなどのような
アルミニウム系合金の膜が洗浄水と接する時6−
点より前に、該アルミニウム系合金の膜を、酸素プラズ
マや空気プラズマなどのように酸素を含むプラズマに曝
すことによって、露出している面に酸化膜を形成する。In addition, immediately after depositing the Al-Cu film 41,
By forming an oxide film on the entire surface of the Al-Cu film 41, it is possible to prevent corrosion of the Al-Cu film 41 not only in the cleaning process but also in the photoresist 6 coating process and the subsequent ethoching process. Effective when performing chemical etching. Furthermore, (l11) in the theft process
It will be perfect if an oxide film is also formed on one surface. □ +g1 Effect of the invention As described above, according to the present invention, when the film of an aluminum alloy such as Al-Cu comes into contact with cleaning water, before the point 6-, the film of an aluminum alloy such as Al-Cu is exposed to oxygen plasma. An oxide film is formed on the exposed surface by exposing it to oxygen-containing plasma such as air plasma.
こうして耐蝕性の強い酸化膜で被覆してから洗浄を行な
うので、従来のようにコンダクタパターンが洗浄水で腐
蝕して、コンダクタパターンとしての特性が低下するの
を未然に防止することができる。Since the conductor pattern is coated with a highly corrosion-resistant oxide film and then cleaned, it is possible to prevent the conductor pattern from being corroded by cleaning water and deteriorating its characteristics as a conductor pattern as in the conventional case.
第1図は磁気バブルメモリの断面図、第2図は従来のパ
ターン形成方法を工程順に示す断面図、第3図は本発明
によるパターン形成方法の実施例を工程順に示す断面図
である。
図において、4はコンダクタパターン、41は八l−C
uの膜、42.44は酸化膜、43はコンダクタパター
ンの上面をそれぞれ示す。
特許出願人 富士通株式会社代理人 弁理士
青 柳 稔7−
第1図
第2図
3図FIG. 1 is a sectional view of a magnetic bubble memory, FIG. 2 is a sectional view showing a conventional pattern forming method in order of steps, and FIG. 3 is a sectional view showing an embodiment of a pattern forming method according to the present invention in order of steps. In the figure, 4 is a conductor pattern, 41 is 8 l-C
42 and 44 are the oxide films, and 43 is the upper surface of the conductor pattern, respectively. Patent Applicant: Fujitsu Limited Agent, Patent Attorney: Minoru Aoyagi 7- Figure 1, Figure 2, Figure 3
Claims (1)
ニウム系合金の膜をパターニングして所定のパターンを
得る方法において、 アルミニウム系合金の膜が洗浄水と接する時点より前に
、該アルミニウム系合金の膜を、酸素を含むプラズマに
曝すことを特徴とするパターン形成方法。[Claims] In a method for obtaining a predetermined pattern by patterning an aluminum-based alloy film deposited by a method such as spanking or vapor deposition, before the aluminum-based alloy film comes into contact with cleaning water, A pattern forming method characterized by exposing the aluminum alloy film to plasma containing oxygen.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58054389A JPS59178681A (en) | 1983-03-30 | 1983-03-30 | Pattern forming method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58054389A JPS59178681A (en) | 1983-03-30 | 1983-03-30 | Pattern forming method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59178681A true JPS59178681A (en) | 1984-10-09 |
Family
ID=12969327
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58054389A Pending JPS59178681A (en) | 1983-03-30 | 1983-03-30 | Pattern forming method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59178681A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03142797A (en) * | 1989-10-27 | 1991-06-18 | Nec Ic Microcomput Syst Ltd | Redundant circuit for semiconductor memory |
| JPH03214729A (en) * | 1990-01-19 | 1991-09-19 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
| JPH098043A (en) * | 1996-08-06 | 1997-01-10 | Matsushita Electric Ind Co Ltd | Method for manufacturing semiconductor device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4995592A (en) * | 1973-01-12 | 1974-09-10 | ||
| JPS50120578A (en) * | 1974-03-06 | 1975-09-20 | ||
| JPS57120334A (en) * | 1981-01-17 | 1982-07-27 | Fujitsu Ltd | Manufacture of semiconductor device |
-
1983
- 1983-03-30 JP JP58054389A patent/JPS59178681A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4995592A (en) * | 1973-01-12 | 1974-09-10 | ||
| JPS50120578A (en) * | 1974-03-06 | 1975-09-20 | ||
| JPS57120334A (en) * | 1981-01-17 | 1982-07-27 | Fujitsu Ltd | Manufacture of semiconductor device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03142797A (en) * | 1989-10-27 | 1991-06-18 | Nec Ic Microcomput Syst Ltd | Redundant circuit for semiconductor memory |
| JPH03214729A (en) * | 1990-01-19 | 1991-09-19 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
| JPH098043A (en) * | 1996-08-06 | 1997-01-10 | Matsushita Electric Ind Co Ltd | Method for manufacturing semiconductor device |
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