JPS5918445U - Multilayer structure semiconductor device - Google Patents

Multilayer structure semiconductor device

Info

Publication number
JPS5918445U
JPS5918445U JP1983074898U JP7489883U JPS5918445U JP S5918445 U JPS5918445 U JP S5918445U JP 1983074898 U JP1983074898 U JP 1983074898U JP 7489883 U JP7489883 U JP 7489883U JP S5918445 U JPS5918445 U JP S5918445U
Authority
JP
Japan
Prior art keywords
semiconductor device
multilayer structure
structure semiconductor
semiconductor substrate
film formed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1983074898U
Other languages
Japanese (ja)
Other versions
JPS6218055Y2 (en
Inventor
守 前田
幹夫 高木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1983074898U priority Critical patent/JPS5918445U/en
Publication of JPS5918445U publication Critical patent/JPS5918445U/en
Application granted granted Critical
Publication of JPS6218055Y2 publication Critical patent/JPS6218055Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors

Landscapes

  • Re-Forming, After-Treatment, Cutting And Transporting Of Glass Products (AREA)
  • Element Separation (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図乃至第３図は本考案の一実施例を説明する為の工
程要所に於ける半導体装置の要部側断面説明図及び要部
平面説明図、第４図及び第５図は本考案のそれぞれ異な
る実施例を説明する為の工程要所に於ける半導体装置の
要部側断面説明図である。　　。 図に於いて、１，１′は半導体基板、２は燐珪酸ガラス
膜である。1 to 3 are side cross-sectional views and plan views of main parts of a semiconductor device at key process points for explaining an embodiment of the present invention, and FIGS. 4 and 5 are main part explanatory views FIG. 2 is an explanatory side cross-sectional view of a main part of a semiconductor device at key points in the process for explaining different embodiments of the invention. . In the figure, 1 and 1' are semiconductor substrates, and 2 is a phosphosilicate glass film.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 少（とも一方の表面上にスクライブラインを除いて形成
された軟質ガラス膜を有する半導体基板と、一方の表面
上に形成された軟質ガラス膜を有する他の半導体基板と
を該ガラス膜を対向させて貼合せてなることを特徴とす
る多層構造半導体装置。A semiconductor substrate having a soft glass film formed on one surface excluding scribe lines and another semiconductor substrate having a soft glass film formed on one surface are placed so that the glass films face each other. A multilayer structure semiconductor device characterized in that it is formed by laminating two layers together.
JP1983074898U 1983-05-19 1983-05-19 Multilayer structure semiconductor device Granted JPS5918445U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983074898U JPS5918445U (en) 1983-05-19 1983-05-19 Multilayer structure semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983074898U JPS5918445U (en) 1983-05-19 1983-05-19 Multilayer structure semiconductor device

Publications (2)

Publication Number Publication Date
JPS5918445U true JPS5918445U (en) 1984-02-04
JPS6218055Y2 JPS6218055Y2 (en) 1987-05-09

Family

ID=30204980

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983074898U Granted JPS5918445U (en) 1983-05-19 1983-05-19 Multilayer structure semiconductor device

Country Status (1)

Country Link
JP (1) JPS5918445U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010153799A (en) * 2008-12-24 2010-07-08 Internatl Business Mach Corp <Ibm> Junction type semiconductor structure including cooling mechanism and method of forming the same
JP2012069585A (en) * 2010-09-21 2012-04-05 Hitachi Ltd Semiconductor device and manufacturing method therefor

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5387163A (en) * 1977-01-12 1978-08-01 Hitachi Ltd Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5387163A (en) * 1977-01-12 1978-08-01 Hitachi Ltd Production of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010153799A (en) * 2008-12-24 2010-07-08 Internatl Business Mach Corp <Ibm> Junction type semiconductor structure including cooling mechanism and method of forming the same
JP2012069585A (en) * 2010-09-21 2012-04-05 Hitachi Ltd Semiconductor device and manufacturing method therefor

Also Published As

Publication number Publication date
JPS6218055Y2 (en) 1987-05-09

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