JPS59196603A - Semiconductor phase shifter - Google Patents
Semiconductor phase shifterInfo
- Publication number
- JPS59196603A JPS59196603A JP7096483A JP7096483A JPS59196603A JP S59196603 A JPS59196603 A JP S59196603A JP 7096483 A JP7096483 A JP 7096483A JP 7096483 A JP7096483 A JP 7096483A JP S59196603 A JPS59196603 A JP S59196603A
- Authority
- JP
- Japan
- Prior art keywords
- switch
- phase shifter
- source electrode
- line
- branch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P1/00—Auxiliary devices
- H01P1/18—Phase-shifters
- H01P1/185—Phase-shifters using a diode or a gas filled discharge tube
Landscapes
- Waveguide Switches, Polarizers, And Phase Shifters (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
この発明tri、 シリコン、GaAaなどの半導体基
板に構成した電界効果トランジスタ(以下FETと略す
)をスイッチとして用い、同一の半導体基板に構成した
マイクロスト9ツブ組路の径路を切シ換えてマイクロ岐
の位相を変える半導体移相器に崗するものである。DETAILED DESCRIPTION OF THE INVENTION This invention tri, a path of a microstrobe 9-tube set constructed on the same semiconductor substrate, using a field effect transistor (hereinafter abbreviated as FET) constructed on a semiconductor substrate such as silicon or GaAa as a switch. This is similar to a semiconductor phase shifter that changes the phase of the micro branch by switching the phase shifter.
オ1図に、従来の半導体移相器の構造例を示す。Figure 1 shows an example of the structure of a conventional semiconductor phase shifter.
図において、(1)は半導体基板、(2)は地導体、(
3)Fi(21と共にマイクロストリップ線路を構成す
るストリップ導体、(4)は2個のFETからなるi−
1の5PDTスイツチ、(5)は同じく第2の5PUT
スイツチ(61#:jFBTのドレイン電極、(7)は
PETのゲート電極f8) triFETのソース電極
である。また、 FB’l’のゲート電極(7)には
ゲートバイアス電圧を印加するため高インピーダンス線
路(9)および低インヒータ“ンス線路υQから成るバ
イアス回路(II)(i:介して、バイアス端子02)
からバイアス電圧が印加される。なお。In the figure, (1) is a semiconductor substrate, (2) is a ground conductor, (
3) Fi (a strip conductor that together with 21 constitutes a microstrip line; (4) is an i- conductor consisting of two FETs;
1 5PDT switch, (5) is also the 2nd 5PUT
Switch (61#: drain electrode of jFBT, (7) is gate electrode f8 of PET) Source electrode of triFET. In addition, in order to apply a gate bias voltage to the gate electrode (7) of FB'l', a bias circuit (II) (i: via the bias terminal 02) consisting of a high impedance line (9) and a low inheatance line υQ )
A bias voltage is applied from In addition.
FETのスイッチ動作のためには、 FETのドレイ
ン電圧、ソース電圧は直流的に同電位とするためドレイ
ン電極、ソース電極を通常接地して用いるが。For FET switch operation, the drain and source voltages of the FET are made to have the same potential in terms of direct current, so the drain electrode and source electrode are usually grounded.
図では、そのためのバイア2回路の図示は省略している
。In the figure, illustration of the two via circuits for this purpose is omitted.
才・2図は、第1図に示した従来の半導体移相器の動作
説明のための因である。図中、03)はマイクロストリ
プ線路の主線路、041は電気長θ1の3′1の分岐線
路、 US+は電気長θ2の第2の分岐想路である。今
、ドレイン電圧、ソース電圧を直流的に同電位たとえば
OVにしたとすると、ゲート電圧をOvとピンチオフ電
圧に切り(%えることによジ。Figure 2 is a factor for explaining the operation of the conventional semiconductor phase shifter shown in Figure 1. In the figure, 03) is the main line of the microstrip line, 041 is the 3'1 branch line with electrical length θ1, and US+ is the second branch line with electrical length θ2. Now, if the drain voltage and source voltage are set to the same DC potential, for example OV, then the gate voltage is cut to Ov and the pinch-off voltage (by increasing the percentage).
FETのドレイン電極(6)とソース電極(8)間はマ
イクロ岐がコ■過、遮断のスイッチ動作をする。したが
って、2個のPETをドレイン1i′極を共通して配置
し、かつ、それぞれのゲートバイアス電圧を一方はOV
他方はピンチオフ電圧とし、同時に互いに他方のバイア
ス電圧にバイアスを切シ換えるならば単極双投スイッチ
(以下5PDTスイツチと略すン力I償成できる。A micro-branch between the drain electrode (6) and source electrode (8) of the FET performs a switching operation for passing and cutting off the current. Therefore, the drain 1i' pole of two PETs is arranged in common, and the gate bias voltage of one is set to OV.
If the other is set to a pinch-off voltage and the bias is simultaneously switched to the other bias voltage, a single-pole double-throw switch (hereinafter abbreviated as 5PDT switch) can be formed.
第2図において、主線路f131を伝搬する電1g!は
第1 (y) 5PDT ス(y チ(4J、 ’:A
’ I(7)分岐線路(141,72の5PDTスイツ
チ(5)を通過していく。ここで2両5PDTスイツチ
を切り換え、電波伝搬径路を第2の分岐線路(151側
に切シ換えると、篭岐の位相は径路の電気長の差Δθ(
==62−01)だけ遅れることにな夛移相器が構成さ
れる。In FIG. 2, the electric current 1g! propagating through the main line f131! is the first (y) 5PDT s(y ち(4J, ':A
' It passes through the 5PDT switch (5) of the I (7) branch line (141, 72).Here, switch the 2-car 5PDT switch and switch the radio wave propagation path to the second branch line (151 side). The phase of the cage is determined by the difference in electrical length of the path Δθ(
==62-01), the phase shifter is constructed.
この半導体移相器は、オ・1および第2の分岐線路11
4J a5)の長さの差で移相量が決まるため、ストリ
ップ導体(3)の寸法を正確に工作することにより肯度
良い移相量特性が得られる。しかし、伝搬径路の切シ換
えに必要な2個の、’1PDTスイッチを゛電波が通過
するため挿入損失が大きいという欠点かあった。This semiconductor phase shifter is connected to O.1 and second branch line 11.
Since the amount of phase shift is determined by the difference in the length of 4J a5), a highly positive phase shift amount characteristic can be obtained by accurately machining the dimensions of the strip conductor (3). However, the disadvantage was that the insertion loss was large because the radio waves passed through the two '1 PDT switches required to switch the propagation path.
この発明は、この間Mを解決するため2本のマイクロス
ト9ツグa路間に直列にFETスイッチ全接続し、・か
つPETのソース電極とドレイン電極間を概略1/2岐
長の長ざのマイクロスト9ツグ+Wi[から成る分岐線
路で接続し、さらに分岐線路の中間にソース電極を接地
したFETスイッチのドレイン電極を接続し、低損失な
180’移相器を得ようとするもので、以下図面につい
て詳細に説明する。In order to solve this problem, the present invention connects all the FET switches in series between the two microstrike 9 lines, and connects the source electrode and drain electrode of the PET with a length of approximately 1/2 branch length. This is an attempt to obtain a low-loss 180' phase shifter by connecting a branch line consisting of Microst9+Wi[, and connecting the drain electrode of an FET switch whose source electrode is grounded to the middle of the branch line. The drawings will be explained in detail below.
オ・3図に、この発明の一実施1+!Iff:示す。F
ETで構成した第1の単極単投スイッチa6)(以下5
PSTスイツチと略称する)のドレイン電極(6)、ソ
ース電極(8)それぞれに、入出力マイクロストリップ
線路を構成するス)9ラグ尊体(3)が接続され、かつ
。E. Figure 3 shows one implementation of this invention 1+! If: Show. F
The first single-pole single-throw switch a6) (hereinafter 5
A drain electrode (6) and a source electrode (8) of a PST switch (abbreviated as PST switch) are connected to a nine-lag element (3) constituting an input/output microstrip line, and.
上記ドレイン電極(6)、ソース電極(8)を、概略I
A岐長の長さのマイクロスト9ツグ線路を構成するスト
リップ環体(3)で接続し、さらに、上記ストリップ導
体(3)の概略中間位置に、ソース電極(8]を。The drain electrode (6) and source electrode (8) are approximately I
They are connected by a strip ring body (3) constituting a microst 9-tooth line with a length of A-branch length, and a source electrode (8) is further located approximately in the middle of the strip conductor (3).
バイアホール(図示せず)等で接地した第2の8PST
スイツチa71のドレイン電極を接続した構成である。A second 8PST grounded via a via hole (not shown), etc.
This is a configuration in which the drain electrode of switch a71 is connected.
第4図は、この発明の動作説明の図である。FIG. 4 is a diagram illustrating the operation of the present invention.
5PSTスイツチ(16)の両電極には、入出力線路と
なる主線路(lalおよびx72枝長の長さを有する分
岐線路QIUが接続され2分岐線路q樺の概略中間位置
に一方の電極を接地した5PSTスイツチaηが接続さ
れている。Both electrodes of the 5PST switch (16) are connected to the main line (LAL, which serves as an input/output line), and a branch line QIU having a branch length of x72, and one electrode is grounded at approximately the middle position of the two branch lines q birch. 5PST switch aη is connected.
第4図(a)でii、、 PETのゲートバイアスが
ピンチオフ電圧に設定され、 5PSTスイツチ(1
ω、aηは遮断状態となっている。そのため、主線路0
3)を伝搬する電波は分岐線路0〜を径由して伝搬する
ようになる。In Fig. 4(a), the gate bias of PET is set to the pinch-off voltage, and the 5PST switch (1
ω and aη are in a blocked state. Therefore, the main line 0
The radio waves propagating through 3) come to propagate via branch lines 0 to .
一方、第4図(b)では、 FETのゲート、<イア
スかOVに設定され、 5PSTスイツチ(lbL
Qηは導通状態となっている。そのため、 5TST
スイツチ06]のドレイン電極(6)、およびソース電
極(8)から分岐線路Oal側を見たインビーターンス
は高インピーダンスすなわち開放状態となシ、電岐は分
岐線!;80S)の影響を受けずに8P8Tスイツチ0
ωt=遇する。On the other hand, in Fig. 4(b), the FET gate is set to <IAS or OV, and the 5PST switch (lbL
Qη is in a conductive state. Therefore, 5TST
The drain electrode (6) and source electrode (8) of the switch 06] when looking at the branch line Oal side have high impedance, that is, the interrupter is in an open state, and the electric branch is the branch line! ;80S) 8P8T switch 0 without being affected by
ωt=encounter.
したがって、 5PSTスイッチα61. (1ηを
構成するFFTのダートバイアスをピンチオフ電圧から
OVK切シ換えることによシ、電汲の伝搬位相は180
度変化し、180度移相器が構成できる。Therefore, 5PST switch α61. (By switching the dart bias of the FFT constituting 1η from the pinch-off voltage to OVK, the propagation phase of the current is 180
degree, and a 180 degree phase shifter can be constructed.
この構成による半導体移相器では、電I&はlt’ET
から成る5PATスイツチを−イ1ツ通過するのみで。In a semiconductor phase shifter with this configuration, the electric current I& is lt'ET
Just by passing through the 5 PAT switch consisting of -1.
180度移相播を得ることができ、従来、2個のスイッ
チを通過していた場合にくらべて挿入損失金1/2近く
に低減できる。A 180 degree phase shift can be obtained, and the insertion loss can be reduced to nearly 1/2 compared to the conventional case of passing through two switches.
なお2以上STS’l’スイッチaηのソース電極(8
1I′iバイア示−ル(図示せず)等で接地はれる場合
について説明したが、この発明はこれに限らず、オ5図
に示す。他の実施例のように、概略172鼓長の長さの
ストリップ導体(191の一端をソース電極(8)に接
続し、他端金地導体(2)に接続しても良い。また、1
6図に示す他の実施例のように、先端を軸数した概略1
/4a長の長さのストリップ導体(4)全ソース電極(
8)に接続してもよい。Note that the source electrode of two or more STS'l' switches aη (8
Although the case where the ground leakage occurs due to the 1I'i via rule (not shown) has been described, the present invention is not limited to this, and is shown in FIG. As in other embodiments, a strip conductor (191) having a length of approximately 172 drum lengths may be connected at one end to the source electrode (8) and at the other end to the gold conductor (2).
As in the other embodiments shown in Figure 6, the number of axes at the tip is approximately 1.
/4a long strip conductor (4) All source electrodes (
8).
以上のように、この発明に係る半導体移相器では、入出
力線路を構成する2本のマイクロストリップ線路間に直
列にFETスイッチを接続し、かつ上記FETのソース
電極とドレイン電極間を概略1/2枝長の長さの分岐線
路で接続し、ざらに上記分岐線路の中間にソース電極全
接地したFETスイッチのドレイン電極を接続する構成
とすることによシ、電岐FiFETスイッチを、1個通
過するだけで、180度移相器が構成でき低損失移相器
を得る仁とができる。As described above, in the semiconductor phase shifter according to the present invention, an FET switch is connected in series between two microstrip lines constituting an input/output line, and the distance between the source electrode and the drain electrode of the FET is approximately 1. By connecting a branch line with a length of /2 branches and connecting the drain electrode of an FET switch whose source electrode is all grounded roughly in the middle of the branch line, one branch FiFET switch can be installed. By simply passing through, a 180 degree phase shifter can be constructed and a low loss phase shifter can be obtained.
21図は従来の半導体移相器の構造の一例を示す図、第
2図は21図の動作説明図、第3図はこの発明による半
導体移相器の構造の一例を示す図。
第4図は、第3因に示した半導体移相器の動作説明図、
第5図および16図は、この考案にょる半導体移相器の
他の実施例の構愈を示す図である。
図中、(l半導体基板、(2)は地樺体、(3)はスト
タップ導体、(4)は第1の5PDTスイツチ、(5)
は2・2の5PDTスイツチ、(6)はFETのドレイ
ン電極。
(7)はFETのゲート電極、(8)はPETのソース
電極。
(9)は高インピーダンス&iN、(iurは低インヒ
ータンス線路、01)はバイアス回路、u匈はバイアス
端子。
a3)は111M路、a々は第1の分岐線路、u5)は
第2の分岐線路、叫はオlの単極投スイッチ、αηは才
・2の単極単投スイッチ、0団は分岐線路、 (]!I
)は1/2妓長の長さのストリップ導体、(支))は、
1/4ffJ長の長さのストリップ導体である。
なお2図中同一あるいは相当部分には同−符−号を付し
て示しである。
代理人 大岩増丸21 is a diagram showing an example of the structure of a conventional semiconductor phase shifter, FIG. 2 is an explanatory diagram of the operation of FIG. 21, and FIG. 3 is a diagram showing an example of the structure of the semiconductor phase shifter according to the present invention. FIG. 4 is an explanatory diagram of the operation of the semiconductor phase shifter shown in the third factor,
5 and 16 are diagrams showing the structure of other embodiments of the semiconductor phase shifter according to this invention. In the figure, (l semiconductor substrate, (2) is the base plate, (3) is the stop tap conductor, (4) is the first 5PDT switch, (5)
is the 5PDT switch of 2.2, and (6) is the drain electrode of the FET. (7) is the gate electrode of FET, and (8) is the source electrode of PET. (9) is high impedance & iN, (iur is a low inheatance line, 01) is a bias circuit, and u is a bias terminal. a3) is the 111M path, a's are the first branch lines, u5) are the second branch lines, yi is the single pole single throw switch, αη is the single pole single throw switch, and group 0 is the branch line. Railroad, (]!I
) is a strip conductor with a length of 1/2 length, (support)) is
It is a strip conductor with a length of 1/4ffJ. Note that the same or corresponding parts in the two figures are indicated by the same reference numerals. Agent Masumaru Oiwa
Claims (1)
半導体基板と同一の半導体基板に構成した電界効果トラ
ンジスタとから成る半導体移相器において、オlの電界
効果トランジスタのソース電極、ドレイン電極それぞれ
に、入力および出力側線路となるマイクロストリップ線
路を接続し。 かつ、上記ソース電極、ドレイン電極間を概略1/2波
長の長さのマイクロストリップ線路から成る分岐線路で
接続し、さらに、上記分岐線路の概略V2の長さの点に
おいて、ソース電極を接地した第2の電界効果トランジ
スタのドレイン電極全接続し。 上記刃・1および第2の電界効果トランジスタそれぞれ
のゲート電極にノ(イアスミ圧を印加する手段を具備し
たことを特徴とする半導体移相器。[Claims] In a semiconductor phase shifter consisting of a microstripe line formed on a semiconductor substrate and a field effect transistor formed on the same semiconductor substrate as the semiconductor substrate, the source electrode of one field effect transistor is , a microstrip line serving as the input and output lines is connected to each of the drain electrodes. Further, the source electrode and the drain electrode are connected by a branch line consisting of a microstrip line having a length of approximately 1/2 wavelength, and the source electrode is grounded at a point of approximately V2 length of the branch line. The drain electrodes of the second field effect transistor are all connected. A semiconductor phase shifter comprising means for applying an Iasumi pressure to the gate electrodes of each of the first and second field effect transistors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7096483A JPS59196603A (en) | 1983-04-22 | 1983-04-22 | Semiconductor phase shifter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7096483A JPS59196603A (en) | 1983-04-22 | 1983-04-22 | Semiconductor phase shifter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59196603A true JPS59196603A (en) | 1984-11-08 |
| JPH0119761B2 JPH0119761B2 (en) | 1989-04-13 |
Family
ID=13446706
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7096483A Granted JPS59196603A (en) | 1983-04-22 | 1983-04-22 | Semiconductor phase shifter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59196603A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61208307A (en) * | 1985-03-13 | 1986-09-16 | Mitsubishi Electric Corp | Semiconductor phase shifter |
| JPH01305601A (en) * | 1988-06-02 | 1989-12-08 | Mitsubishi Electric Corp | Semiconductor phase shifter |
| JPH0223102U (en) * | 1988-07-21 | 1990-02-15 | ||
| JPH0344303U (en) * | 1989-09-04 | 1991-04-24 | ||
| US6542051B1 (en) | 1999-10-29 | 2003-04-01 | Nec Corporation | Stub switched phase shifter |
| JP2009253800A (en) * | 2008-04-09 | 2009-10-29 | Mitsubishi Electric Corp | Millimeter waveband switch |
-
1983
- 1983-04-22 JP JP7096483A patent/JPS59196603A/en active Granted
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61208307A (en) * | 1985-03-13 | 1986-09-16 | Mitsubishi Electric Corp | Semiconductor phase shifter |
| JPH01305601A (en) * | 1988-06-02 | 1989-12-08 | Mitsubishi Electric Corp | Semiconductor phase shifter |
| JPH0223102U (en) * | 1988-07-21 | 1990-02-15 | ||
| JPH0344303U (en) * | 1989-09-04 | 1991-04-24 | ||
| US6542051B1 (en) | 1999-10-29 | 2003-04-01 | Nec Corporation | Stub switched phase shifter |
| JP2009253800A (en) * | 2008-04-09 | 2009-10-29 | Mitsubishi Electric Corp | Millimeter waveband switch |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0119761B2 (en) | 1989-04-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CA2074126C (en) | High-frequency power amplifier | |
| JP3134086B2 (en) | Flip chip mounted on coplanar railway track | |
| JPH03145801A (en) | High-separative passive switch | |
| JPH1174703A (en) | Switch circuit and semiconductor device | |
| US4612520A (en) | Wideband 180-degree phase shifter bit | |
| JPH07321505A (en) | Phase shifter | |
| JPS6349402B2 (en) | ||
| JP2962771B2 (en) | Phase shifter | |
| JPH0119761B2 (en) | ||
| US5309006A (en) | FET crossbar switch device particularly useful for microwave applications | |
| US7167064B2 (en) | Phase shift circuit and phase shifter | |
| KR970055703A (en) | Active right angle power divider | |
| JP3417386B2 (en) | High frequency switch circuit | |
| JP3342791B2 (en) | High frequency single pole double throw switch | |
| JPS5951602A (en) | Semiconductor phase shifter | |
| US4853658A (en) | Microwave phase shifters | |
| TW200411975A (en) | Attenuator | |
| JPH01305601A (en) | Semiconductor phase shifter | |
| JP2000165203A (en) | Active balun circuit | |
| JP2941214B2 (en) | Semiconductor high frequency switch circuit | |
| JP2000150536A (en) | Field effect transistor | |
| JP2002141702A (en) | Semiconductor phase shifter | |
| JP2001196805A (en) | Hybrid coupler type semiconductor phase shifter | |
| JP2522629Y2 (en) | Line switching type 180 degree phase shifter | |
| JPH0695601B2 (en) | Microwave semiconductor phase shifter |