JPS59215751A - Resin sealed type semiconductor device - Google Patents

Resin sealed type semiconductor device

Info

Publication number
JPS59215751A
JPS59215751A JP58090182A JP9018283A JPS59215751A JP S59215751 A JPS59215751 A JP S59215751A JP 58090182 A JP58090182 A JP 58090182A JP 9018283 A JP9018283 A JP 9018283A JP S59215751 A JPS59215751 A JP S59215751A
Authority
JP
Japan
Prior art keywords
resin
external
semiconductor device
screw
parts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58090182A
Other languages
Japanese (ja)
Inventor
Masami Matsumura
松村　正己
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58090182A priority Critical patent/JPS59215751A/en
Publication of JPS59215751A publication Critical patent/JPS59215751A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W78/00—Detachable holders for supporting packaged chips in operation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/20—Conductive package substrates serving as an interconnection, e.g. metal plates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To cut down the parts and machining costs of the titled device by a method wherein an insulating material is fixed on the sides of a hole for connecting to an external case and the whole body is resin-sealed excluding a part of this insulating material and the external lead. CONSTITUTION:An insulating hollow screw 19 is inserted into a hole 18 for fixing an external case in a metallic support 16 while a semiconductor chip 20 is directly connected to the metallic supporter 16 through the intermediary of a solder layer 11. On the other hand, a sealing resin 17 is formed so that it may cover the whole body excluding a part of the screw 19 and an external lead 14 extruded from another external lead 15 and the supporter 16. In such a constitution, a semiconductor device fixed to an external case may become an electrically insulated structure since the case and the chip 10 may be electrically insulated through the intermediary of the resin 17 and the screw 19. On the other hand, the part and machine costs may be remarkably cut down due to less number of parts in the internal strcture.

Description

【発明の詳細な説明】 本発明はトランジスタ、サイリスタ、ダイオ−従来の絶
縁形半導体装置は内部絶縁形で、第１図に示す構造が一
般的である。第１図（ａ）は前記半導体装置の断面模式
図であｑｆ）＜外部筐体取付用穴１８を有する金属支持
体１６上に半田層１１を介してセラミック等の絶縁板１
２、外部リード１４、半導体チップ２０が積層され、内
部リード１３で体が樹脂１７でおおわれている。第１図
（ｂ）は全体の外幌状態を示している。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to transistors, thyristors, and diodes. Conventional insulated semiconductor devices are internally insulated, and the structure shown in FIG. 1 is common. FIG. 1(a) is a schematic cross-sectional view of the semiconductor device.
2. The external leads 14 and the semiconductor chip 20 are stacked, and the body of the internal leads 13 is covered with resin 17. FIG. 1(b) shows the overall state of the outer hood.

本装置では電気的に金属支持体１６は半導体チップ２０
とは絶縁され、外部リード１４．１５のみに接続されて
いて絶縁形半導体装置を形成しているが、内部構造に示
す様に絶縁の為の部品点数が半田層１１を３点、絶縁板
１２、外部リード１４を各１点とい９ように非常に多く
、部品代及び製る放熱板との絶縁をはかる他の構造とし
て、半導体チップ２０を金属支持体１６に直接とシ付け
、半導体チップ２０を封止する樹脂１７で金属支持体１
６の全体をおおうことが考えられる。しかし、かかる構
造は樹脂モールド工程ｆｔ、施こすことが実質的にでき
ない・すなわち、モールド型内に半導体チップ２０’ｃ
有する金属支持体１６を固定する必媛上、この固定部Ｖ
Ｃ樹脂″ｆ破値することができない。すなわち、モール
ド型内に金属支持体１６を置くと金属支持体裏面を樹脂
でおおえないし、金属支持体１６をなんらかの押え手段
で挟持するとその部分を樹脂でおおえない。この樹脂で
おおわれない部分が存在するために、半導体装置全体を
樹脂で被覆することはできなかった◎本発明によれば、
半導体チップを載置する金属支持板に形成した取付用穴
（−あらかじめ絶縁被覆全形成しておく。この内表面絶
縁化の一方法としては絶縁性ビスを取り付けることがで
きる。この取付用穴の絶縁性部分でモールド型内の位置
決め固定を行い、取付用穴内面および各外部リードの先
端を除く全体が樹脂でおおわれた半今体装置を得る・ 次に、図面を参照して、本発明をエリ詳細［説明する。In this device, the metal support 16 is electrically connected to the semiconductor chip 20.
It is insulated from the external leads 14 and 15 and connected only to the external leads 14 and 15 to form an insulated semiconductor device, but as shown in the internal structure, the number of parts for insulation is three solder layers 11 and an insulating plate 12. , the number of external leads 14 is one point each, and the semiconductor chip 20 is attached directly to the metal support 16 as another structure to reduce the parts cost and insulate it from the manufactured heat sink. Metal support 1 with resin 17 for sealing
It is possible to cover all of 6. However, with such a structure, it is virtually impossible to carry out the resin molding process.
In order to fix the metal support 16, this fixing part V
In other words, if the metal support 16 is placed in the mold, the back side of the metal support cannot be covered with resin, and if the metal support 16 is held by some kind of holding means, that part cannot be covered with resin. No. Because there are parts that are not covered with the resin, it was not possible to cover the entire semiconductor device with the resin. According to the present invention,
A mounting hole is formed in the metal support plate on which the semiconductor chip is placed (the insulation coating is fully formed in advance. One way to insulate this inner surface is to attach an insulating screw. The insulating portion is used to position and fix the inside of the mold to obtain a hemi-body device whose entire body is covered with resin except for the inner surface of the mounting hole and the tips of each external lead.Next, the present invention will be explained with reference to the drawings. Eli details [Explain.

本発明の一実施例を第２図に示す。第２図（ａ）は断面
図であるが、金属支持体１６の外部筐体取付用の穴１８
の部分に絶縁性の中尺ビス１９を取り付ける一方、半導
体チップ２０は半田層１１を介して直接金属支持体１６
上に接続されている。封止用樹脂１７は絶縁性ビス１９
の一部及び外部リード１５と金属支持体１６より延長さ
れた外部リード１４を除いて全体を包み込む様に形成さ
れている。絶縁性ビス１９の一部がおおわれないのは金
属支持体１６の裏面に回り込む樹脂１７の厚みを一定に
する為樹脂１７をモールド成形する際成形用金型の一部
に支持体１６を支えるビン全押し当てる為その部分は樹
脂１７が流れ込まない様になグている。An embodiment of the present invention is shown in FIG. FIG. 2(a) is a cross-sectional view, and the hole 18 for attaching the external casing of the metal support 16 is shown in FIG.
The semiconductor chip 20 is directly attached to the metal support 16 via the solder layer 11 while an insulating medium screw 19 is attached to the part.
connected above. The sealing resin 17 is an insulating screw 19
It is formed so as to wrap around the entire body except for a part of it, the external lead 15, and the external lead 14 extending from the metal support 16. The reason why some of the insulating screws 19 are not covered is that when the resin 17 is molded to keep the thickness of the resin 17 that wraps around the back surface of the metal support 16 constant, there is a bottle that supports the support 16 in a part of the molding die. In order to fully press the parts, the parts are marked so that the resin 17 does not flow into them.

このように、本発明では半導体装置を外部筐体に取シ付
けた時筐体と半導体チップ２０との電気的絶縁は樹脂１
７及び絶縁性ビス１９を介して取られる事になシ外部絶
縁形構造となる。内部構造は先に説明した従来の内部絶
縁形に比べ部品点数が２点（半田層１１及び絶縁性ピス
ト９）に減り・部品代及び加工費が大幅に削減され、安
価に製造する事が出きる。In this way, in the present invention, when the semiconductor device is attached to the external casing, the electrical insulation between the casing and the semiconductor chip 20 is achieved by using the resin 1.
7 and an insulating screw 19, resulting in an externally insulated structure. The internal structure has reduced the number of parts to 2 (solder layer 11 and insulating piston 9) compared to the conventional internally insulated type described earlier, and the parts and processing costs have been significantly reduced, making it possible to manufacture at low cost. Wear.

【図面の簡単な説明】[Brief explanation of drawings]

第１図（ａ）および（ｂ）は従来の内部絶縁形半導体装
置の断面図および平面図である。第２図（ａ）および（
ｂ）は本発明の一実施例による外部絶縁形半導体装置の
断面図および平面図である◎ １１・・・・・・半田層、１２・・・・・・絶縁板、１
３・・団・内部リード接続線、１４・旧・・外部リード
、１５・・・・・・外部リード、１６・・・・・・金属
支持体、１７・・団・樹脂、１８・・・・・・外部筐体
との接続用の穴、１９・・・・・・絶縁性中太ビス、Ｆ
　２０−・・半１４４４−’、−ッフ：ｌｌ （θ） ／ｆｉ （ｂ） とａシ ロ （＃））FIGS. 1(a) and 1(b) are a sectional view and a plan view of a conventional internally insulated semiconductor device. Figure 2 (a) and (
b) is a sectional view and a plan view of an externally insulated semiconductor device according to an embodiment of the present invention. ◎ 11...Solder layer, 12...Insulating plate, 1
3...Group/Internal lead connection wire, 14...Old...External lead, 15...External lead, 16...Metal support, 17...Group/Resin, 18... ... Hole for connection with external casing, 19 ... Insulating medium thick screw, F
20-... half 1444-', -ff:ll (θ) /fi (b) and a white (#))

Claims (1)

【特許請求の範囲】[Claims] 外部との機械的取付の為に設けられた穴の側面に絶縁材
τ取り付け、該絶縁貸の一部および外部への電気接続用
リード部を除いて樹脂封止金施したことを特徴とする樹
脂封止形半導体装置。The insulating material τ is attached to the side of the hole provided for mechanical attachment to the outside, and resin sealing is applied except for a part of the insulating material and the lead part for electrical connection to the outside. Resin-encapsulated semiconductor device.
JP58090182A 1983-05-23 1983-05-23 Resin sealed type semiconductor device Pending JPS59215751A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58090182A JPS59215751A (en) 1983-05-23 1983-05-23 Resin sealed type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58090182A JPS59215751A (en) 1983-05-23 1983-05-23 Resin sealed type semiconductor device

Publications (1)

Publication Number Publication Date
JPS59215751A true JPS59215751A (en) 1984-12-05

Family

ID=13991341

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58090182A Pending JPS59215751A (en) 1983-05-23 1983-05-23 Resin sealed type semiconductor device

Country Status (1)

Country Link
JP (1) JPS59215751A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4750030A (en) * 1983-01-17 1988-06-07 Nec Corporation Resin-molded semiconductor device having heat radiating plate embedded in the resin
US8207601B2 (en) 2005-12-29 2012-06-26 Infinen Technologies Ag Electronic component and a method of fabricating an electronic component

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4750030A (en) * 1983-01-17 1988-06-07 Nec Corporation Resin-molded semiconductor device having heat radiating plate embedded in the resin
US8207601B2 (en) 2005-12-29 2012-06-26 Infinen Technologies Ag Electronic component and a method of fabricating an electronic component
DE112005003802B4 (en) * 2005-12-29 2013-12-12 Infineon Technologies Ag Method for producing an electronic component

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