JPS5925251A - Ceramic substrate - Google Patents
Ceramic substrateInfo
- Publication number
- JPS5925251A JPS5925251A JP58122428A JP12242883A JPS5925251A JP S5925251 A JPS5925251 A JP S5925251A JP 58122428 A JP58122428 A JP 58122428A JP 12242883 A JP12242883 A JP 12242883A JP S5925251 A JPS5925251 A JP S5925251A
- Authority
- JP
- Japan
- Prior art keywords
- ceramic
- substrates
- ceramic substrate
- cracks
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
- H10W42/121—Arrangements for protection of devices protecting against mechanical damage
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はセラミック基板に関し、特に半2〃体集積回路
素子を載置し、収納するためのパソゲージ用基板或いは
印刷配線基板等に好適に用いられるセラミック基板に関
するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ceramic substrate, and more particularly to a ceramic substrate suitable for use as a pathogage board or a printed wiring board on which a semi-solid integrated circuit element is mounted and housed. .
従来周知のように、セラミ・7りは絶縁特性、耐摩耗性
に優れ、化学的に安定、高硬度、熱膨張率が小さい等の
特性により、とりねり半導体集積回路素子を収納するた
めのパッケージ川基板の月料として極めて優れたもので
あり多用されζいる。As is well known in the past, ceramics and ceramics have excellent insulating properties, wear resistance, chemical stability, high hardness, and low coefficient of thermal expansion. It is extremely excellent as a monthly feed for river substrates and is widely used.
しかしながら、セラミックは耐衝撃性に弱いという欠点
があるため、例えば第1図に示すセラミック基板のよう
に、端面1が一平面状を成している場合、セラミック基
板1同志が衝突した際に、端面1′同志或いは一方のt
S+反の+rli、1面1と他の基板の:1−ナ一部R
とが1ffij突するごとによって、これらセラミック
基板1にひび、割れ、欠りなどを生ずることが極めて多
い。However, ceramic has the disadvantage of being weak in impact resistance, so when the end surfaces 1 are flat, as in the case of the ceramic substrate shown in FIG. 1, for example, when the ceramic substrates 1 collide with each other, End face 1' or one t
S + opposite +rli, 1 side 1 and other board: 1-na part R
Cracks, cracks, chips, etc. are extremely likely to occur in these ceramic substrates 1 due to each 1ffij collision.
’1.’l°に、半導体集積回路素子をレラミソク基扱
1−1−に取イ;1りたり、ワイヤーボンディングした
りする多くの作業を含む半導体素子の実装上程を自動化
しノこ組立ラインで行うような場合、セラミック2占板
1をライン上で順次、移動さ−Uる際に、顛斜面を自重
落下さ已たり、或いは1口9ii空気を吹きイ;1りて
強制移1リノさ−Vるために、該セラミソクツ、(板l
同志が激しく衝突を繰り返し、これらセラミツクジに板
1にひび、割れ等が多発し、その結果、製品の歩留りや
信頼性を低下さ・Uる等大きな支1i1λを来たしてい
た。'1. '1°, semiconductor integrated circuit elements will be handled on a 1-1-1 basis; the mounting process of semiconductor elements, including many tasks such as mounting and wire bonding, will be automated and carried out on a saw assembly line. In such a case, when moving the two ceramic plates 1 one after another on the line, do not let them fall down the slope under their own weight, or blow 1 mouth of air; In order to
As the comrades repeatedly collided violently, cracks and cracks occurred frequently in the plate 1 of these ceramic screws, resulting in major problems such as lowering the yield and reliability of the product.
このようなセラミック基板同志の11■突による1)す
れや欠&Jが発生ずる原因としては、(1)プレス成形
による場合では上下の圧縮比の相違、(2)焼成時の1
7、:、度条件、(3)外表面粗さ、(4)原料の粒径
や配合比環条(の要素が絡んでいるが、本発明者等は種
々実験した結果、セラミ・ツク基板1の0111面1同
志が正面i和突しても割れや欠けの発生は少ないが、伸
P]状に衝突した場合、即ち前方で静止しているセラミ
ック基板の端面1′に、後続のセラミックJJS板のコ
ーナ一部Rが衝突した時に、該コーナ一部Rにひび、割
れ、欠りが頻発することが判明し、この結果からセラミ
ック基板の外端面形状を調整することによって、ひび、
割れ、欠のを有すノに防止できることを知見した。The causes of 1) rubbing and chipping &J caused by such 11 bumps between ceramic substrates are: (1) difference in compression ratio between the upper and lower sides in the case of press molding; (2) 1.
7. The following factors are involved: degree conditions, (3) outer surface roughness, and (4) raw material particle size and compounding ratio.As a result of various experiments, the present inventors found that the ceramic substrate Even if 0111 faces 1 of 1 collide head-on, cracking or chipping is unlikely to occur, but if they collide in an elongated shape, that is, the end face 1' of the ceramic substrate that is stationary in front of the ceramic substrate that follows It has been found that when a corner R of a JJS plate collides, cracks, cracks, and chips frequently occur in the corner R. Based on this result, by adjusting the shape of the outer end surface of the ceramic substrate, cracks,
It has been found that cracking and chipping can be prevented.
tj(lって、本発明の目的は上記の知見に)、I5づ
き、ひび、割れ、欠りを最大限に防止するよ)に成した
セラミック基板を堤供することにある。It is an object of the present invention to provide a ceramic substrate having a tj (l: based on the above-mentioned knowledge), which is formed in a manner that prevents cracks, cracks, and chips to the maximum extent possible.
本発明のセラ、ミンク基板は、基板の外周端面に段差を
形成ずにように突出部が形成され、月つ該突出部の稜部
が曲線状に形成されていることをll、I+徴とするも
のである。The Ceramic and Mink substrates of the present invention are characterized by the fact that the protrusions are formed on the outer peripheral end surface of the substrate without forming any steps, and the ridges of the protrusions are formed in a curved shape. It is something to do.
本発明は、半導体集積回路素子を上面に搭載するように
した平板状のセラミック基板、」二面中央部に素子搭載
用の凹部を形成ずにように成形されたセラミ・7り貼(
反又は複数枚の生ヒラミソクンートを績則しC焼結一体
化されたセラミック基板、その他印刷配線用の単層又は
多IPi状のセラミック基板等のように基板のひび、割
れ、欠りが製品の信頼性の面で致命的欠陥となるものに
りlして21)に右りノに適用される。The present invention relates to a flat ceramic substrate on which a semiconductor integrated circuit element is mounted.
Cracks, cracks, and chips in the substrate such as C sintered integrated ceramic substrates and other single-layer or multi-IPI ceramic substrates for printed wiring, etc., may occur due to the product. It is applied to 21) which is a fatal flaw in terms of reliability.
以下、本発明を添何図面に示す実施例にノにづき0f♀
111に説明する。Hereinafter, the present invention will be described based on the embodiments shown in the attached drawings.
111 will explain.
第21ヌ1のセラミソク&板は半導体集積回路素子を」
二面に措;1&するためのセラミ、り基板の例を示し、
セラミソクシ、(板2におりるjvめ方向+11i1面
に段差4を形成するように突出部3が形成されている。The 21st No. 1 Ceramic Socket & Board is a semiconductor integrated circuit element.
An example of a ceramic substrate for two sides is shown,
A protrusion 3 is formed so as to form a step 4 on the +11i1 surface of the plate 2 in the jv direction.
この突出部3目九形1)、の膨らめf!lXのように、
その稜部5が曲線状に形成されていればよい。The bulge f of this protrusion 3 eyes 9 shapes 1)! Like lX,
It is sufficient that the ridge portion 5 is formed in a curved shape.
第2し1におし」る突出部3の先Ig:□1はI¥ c
7j方向方向中火に位置し、突出高1〕は裁板2のjv
さTとも関連し、厚さ’r= 1.52mmノ場合、突
状i1’li D = 0. [12〜01開程度で−
”= 0.013〜0.0(ifiが)匈当であるこ
丁
とが実験」−判明した。即ら、図にA?いては、理解を
容易にするために、突出部がn1張されて示されている
が、実際には厚さの約屋及至雇程度の突出高さで所1υ
1の目的が達成されることが判明した。The tip of the protruding part 3 that is inserted into the second part Ig: □1 is I¥c
7j direction, and the protruding height 1] is the jv of the cutting board 2.
It is also related to the thickness T, and when the thickness 'r = 1.52 mm, the protrusion i1'li D = 0. [At about 12~01 open-
``= 0.013 to 0.0 (ifi) was determined by experiment''. In other words, A in the diagram? In order to make it easier to understand, the protruding part is shown stretched by n1, but in reality, the protruding height is approximately 1υ to 100 cm thick.
It was found that the first objective was achieved.
このような突出部を厚め方向端面に形成した基板2が互
いに衝突する場合、例えば第3図に示すように、貼1)
7.2.2の外周端面の突出部3.3同志が衝突するこ
とにより、制れ、欠の等の起こり安いコーナーql(に
衝撃力が加わるのを回避することができる。When the substrates 2 having such protrusions formed on the thicker end faces collide with each other, for example, as shown in FIG.
By colliding the protrusions 3.3 on the outer peripheral end surface of 7.2.2 with each other, it is possible to avoid applying an impact force to the corner ql (where brakes, chips, etc. are likely to occur).
更に、多少傾斜状に衝突しても、突出部3.3′が段差
4を形成するように設りられ、■一つその稜!’!l!
5が曲線状に形成されていることにより、割れ、欠け
の原因となる基板の稜部への衝撃力を緩和することがで
き、セラミック基板2.2′のひび、Jillれ、欠け
が有効に防止される。なお、第3し1に示すように、基
板2.2のコーナ一部RaをQ、3mm稈度の曲率」4
径の曲面にしておくと、この9」果1.!増人される。Furthermore, even if the collision occurs in a somewhat inclined manner, the protrusion 3.3' is provided so as to form a step 4, and ■ one edge! '! l!
5 is formed in a curved shape, it is possible to reduce the impact force on the edge of the substrate that causes cracks and chips, and effectively prevent cracks, chips, and chips on the ceramic substrate 2.2'. Prevented. In addition, as shown in No. 3 and 1, the corner part Ra of the substrate 2.2 is Q, and the curvature of 3 mm culm degree is 4.
If you make it a curved surface with a diameter, this 9" fruit 1. ! The number of people will be increased.
次に本発明を実験例に幇づいて説明する。Next, the present invention will be explained with reference to experimental examples.
−例として第2図に示したような断面形状を有する24
. hm X 24 、 hmの方形状で、厚e’j丁
= 1 、52+u+、コーナー11aの曲率半径0.
3111m隅の占(扱に、異なる突出1fli I)を
有する突出部3を形成したーセラミノク!、(1反と、
0111面が一平面状の1jfl来のセラミ・ノクノ、
(1反についてのiti突テストを行い、その結果を表
1に示す。この衝突テストの条件とし27は、長さ 1
00cm、1tLi470’のトレイの」二部50c+
n区間にテストり゛ループとして1グループ20+11
i+の各基板を平面状Gこ連接して並べ、自重でもって
トレイの下1111こ設置したす、イ+:+ンスト・ツ
バ−に向りて沿ド(落−1・)さ−する。このような吊
降を10回繰り返すが、9回ま−Cのl′i″I賄時に
ひび、71りれ、欠りの発4+i LだものL、Llf
) Ilfさ・Uた回ごとに新規の占(板と入れ替え、
△皮革IのテスI・グループの10回のlt’)買1&
c、二IHLJイ】初1υ1の基板20個についてのひ
び、割れ、欠&Jの発生した(因数を41iW1シた。- 24 having a cross-sectional shape as shown in FIG.
.. hm x 24, hm rectangular shape, thickness e'j = 1, 52+u+, radius of curvature of corner 11a 0.
A protrusion 3 with a 3111m corner (in terms of different protrusions 1fli I) was formed - Ceraminoku! , (1 counter and
Cerami Nokuno from 1jfl, whose 0111 side is flat,
(A collision test was conducted on one roll, and the results are shown in Table 1. The conditions for this collision test are 27, which is the length 1
00cm, 1tLi470'tray's second part 50c+
1 group 20+11 as a test loop in n intervals
Each of the i+ boards is arranged in a flat plane and placed 1111 below the tray by its own weight. This kind of suspension was repeated 10 times, but cracks, 71 cracks, and chips appeared when lifting 9 times.
) A new fortune-telling (replaces the board,
△Leather I's Tess I Group's 10th lt') Buy 1&
c, 2 IHLJ A] Cracks, cracks, and chips occurred on 20 boards of the first 1υ1 (the factor was set to 41iW1).
」二記テスト結果から明らかな、1、うに、セラミック
箔板の厚さゴー1.52mFの場合、!、(捗端面に突
出高りを0.02n+m以」二の突出部を形成しておく
ことによって基板同志のtiI突によるひび、P)すれ
、欠り等の発生を、(足来の基板の場合に比して大幅に
低減することが可f1ヒとなる。” It is clear from the test results that 1. When the thickness of the ceramic foil plate is 1.52 mF,! By forming a second protrusion with a protrusion height of 0.02n+m or more on the end surface of the board, cracks due to tiI bumps between boards, P) scratches, chips, etc. It is possible to significantly reduce f1 compared to the case.
なお、厚さI’ = 1 、.52mmのセラミック基
板の場合に、突出i1’li l)が0.1.mm以」
二になるとひび、別れ、欠り等を防止するすJ果はむし
ろ大きくなり基板の使用条件によってはQ、1mi以」
二の突出部を形成してもよい。しかし、突出ll′TI
I)が大きくなるにつれて基(及の形4)いq、1」に
−r++、1面形状が正規の方形状のものから変形した
ものとなり、また基板の成形が而(い1になる頭向があ
る。Note that the thickness I' = 1, . In the case of a 52 mm ceramic substrate, the protrusion i1'li l) is 0.1. mm or more”
2, the effect of preventing cracks, separation, chips, etc. becomes rather large, and depending on the conditions of use of the board, Q, 1 mi or more.
Two protrusions may be formed. However, the protrusion ll′TI
As I) becomes larger, the shape of one surface becomes deformed from the regular rectangular shape, and as the shape of the substrate becomes larger, There is a direction.
このようなセラミックより成る基板の成形法よしては粉
体プレス法、トクターブL−−1’法によるグリーン(
41ユ)ソートからの打1uき法その他押出法で成形し
た後、+II+、1面に突出部を成形したり、或いは焼
結後に研1ソ加工して突出「(1(を成形する等、ぞれ
ぞれに最も適した方法を用いればよい。The molding method of such a substrate made of ceramic is green (
41U) After molding by the punching method or other extrusion method from sorting, +II+, molding a protrusion on one side, or after sintering, grinding and machining the protrusion "(1), etc. The most suitable method may be used for each.
以」二のように、本発明のセラミック基板によれば、セ
ラミック基板同志が衝突した場合でも、ひび、割れ、欠
り等の発生を大幅に低減さ−Uることが可能となり、自
動化された組立ラインによる組立工程等苛rlVsな条
件下においても歩留りを顕著に向上させることができ、
合ね−Uて品質、信頼性を向上さ−Uることができるた
め、半導体装置等に好適に使用される。As described above, according to the ceramic substrate of the present invention, even when ceramic substrates collide with each other, it is possible to significantly reduce the occurrence of cracks, cracks, chips, etc. Yield can be significantly improved even under harsh conditions such as assembly lines, etc.
Since quality and reliability can be improved by combining, it is suitably used for semiconductor devices and the like.
第1し1(イ) (ロ)は従来のセラミック基板の平面
図と側面図、第2図は本発明実施例によるセラミック基
板の部分lvi面図、第3図は本発明によるセラミック
基板の衝突態様例を説明するだめの図である。
1.2.2′ ・ セラミック基を投
3.3′: 突出fl(
4; 段差
特許出願人 京 セ ラ 株 式 会 社代表考 稲
盛和夫
(イ)1(a) and 1(b) are a plan view and a side view of a conventional ceramic substrate, FIG. 2 is a partial lvi side view of a ceramic substrate according to an embodiment of the present invention, and FIG. 3 is a collision of a ceramic substrate according to the present invention. FIG. 3 is a diagram for explaining an example of an embodiment. 1.2.2' - Ceramic base 3.3': Projection fl (4; Step patent applicant: Kyocera Corporation Representative: Kazuo Inamori (I)
Claims (1)
成するように突出部を形成すると共に、該突出部の稜Q
iを曲線状に形成したことを特徴とするセラミック基板
。A protrusion is formed to form a step on the outer periphery ζlit surface of a substrate made of ceramic, and the ridge Q of the protrusion is
A ceramic substrate characterized in that i is formed in a curved shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58122428A JPS5925251A (en) | 1983-07-07 | 1983-07-07 | Ceramic substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58122428A JPS5925251A (en) | 1983-07-07 | 1983-07-07 | Ceramic substrate |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14579478A Division JPS5572064A (en) | 1978-11-25 | 1978-11-25 | Ceramic substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5925251A true JPS5925251A (en) | 1984-02-09 |
| JPS6222268B2 JPS6222268B2 (en) | 1987-05-16 |
Family
ID=14835589
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58122428A Granted JPS5925251A (en) | 1983-07-07 | 1983-07-07 | Ceramic substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5925251A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02241049A (en) * | 1989-03-15 | 1990-09-25 | Kyocera Corp | Ceramic board |
-
1983
- 1983-07-07 JP JP58122428A patent/JPS5925251A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02241049A (en) * | 1989-03-15 | 1990-09-25 | Kyocera Corp | Ceramic board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6222268B2 (en) | 1987-05-16 |
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