JPS594904B2 - Data transfer control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a data transfer system that transfers data in parallel, and particularly to a data transfer system that transfers strobe signals and parity bit information through one common transmission line. This invention relates to a data transfer control method for reducing the number of data transfers.

In the conventional parallel data transfer system, the parity bit information and the strobe signal were transmitted using separate transmission lines, so there was a problem in that the number of transmission lines increased accordingly.

The configuration of the data transfer system shown in FIG. 1 is shown and explained.

On the transmitting side, the data set in the register 1 is sent out onto the transmission line by the line driver 3, and the parity bit generated by the parity generator 2 and the strobe signal created by the clock controller 6 are applied to the transmitted data. and are transmitted onto separate transmission lines via line drivers 4 and 5, respectively. On the receiving side, line receivers □, 8, and 9 receive the transfer data, parity bit, and strobe signal on each transmission line, and the received data and received parity bit are transferred to registers 10, 8, and 9 at the timing of the received strobe signal. 11. register 1
The received data taken in 0 is parity-checked by a parity checker 12 using a parity bit in a register 11, and is sent to other parts. FIG. 3 shows a timing chart of data a, parity bit, and strobe signal c on each transmission line.

In this figure, the parity bit is set to a high level when it indicates ``1'' and to a low level when it indicates ``o'', but the level assignment is reversed. Of course, it is also possible to do so. As described above, in the conventional data transfer system, the parity bit and the strobe signal (clock) are sent using separate transmission lines.

SUMMARY OF THE INVENTION An object of the present invention is to provide a data transfer control system that reduces the number of transmission lines by transmitting parity bits and strobe signals through one common transmission line.

According to the present invention, a control signal having a level change polarity corresponding to the value of the power bias is sent from the transmitting side.

By synchronizing the level change timing of this control signal with the data transfer timing, it is possible to create a strobe signal from the control signal on the receiving side. Therefore, the parity bit and the strobe signal can be sent through substantially one common transmission line, making it possible to reduce the number of transmission lines by one. An embodiment of the present invention and its time chart are shown and explained in FIG. 2 and FIG. 4.

On the transmitting side, data a set in the register 21 is sent out onto the transmission line via the line driver 23.
Further, the parity bit for the transfer data generated by the parity generator 22 is input to the clock switching circuit 25. The clock switching circuit 25 sends out a control signal e having a level change polarity according to the input parity bit value onto one transmission line via the line driver 24.
The time point at which the level of the control signal e changes is maintained in a constant relationship with the data transfer timing, as shown in FIG.
In this example, the control signal e is applied to the parity bit 6r'.
changes from a low level to a high level, but it goes without saying that the polarity may change to the opposite polarity. On the receiving side, line receivers 26 and 27 receive transfer data a and control signal e. The control signal e received by the line receiver 27 is input to two monostable multivibrators 29 and 30. One monostable multivibrator 29 is triggered by the rising edge of the received control signal e, and the other monostable multivibrator 30 is triggered by the falling edge of the received control signal e. . Both monostable multipipulators 29, 30 are interconnected in such a way that they inhibit (reset) the other when it is in operation (in a metastable state). Therefore, the outputs F and g of each monostable multipipulator 29 and 30 change as shown in FIG. 4 with respect to the reception control signal e. The signals F and g are ORed by an OR gate 32 to become a strobe signal h. Data a received by the line receiver 26 is taken into the register 28 at the timing of this strobe signal h. Furthermore, it is clear from FIG. 4 that the output f of the monostable multivibrator 29 corresponds to the parity bit generated by the parity generator 22 on the transmitting side. The parity checker 31 parity-checks the received data i in the register 28 using the parity bit f reproduced from the control signal e.
The delay circuit 33 generates a signal j by delaying the strobe signal h by DL. The AND gate 34 performs a logical product of the signal j1 and the strobe signal h and the output of the parity checker 31, and outputs the result of the parity check. As described above, according to the present invention, parity check information and strobe signals can be sent through one common transmission line, and the number of transmission lines can be reduced.

In a data transfer system, transmission lines consume a considerable amount of cost for the entire system, so reducing the number of transmission lines is extremely effective. Furthermore, since the control signal is created using the method described above, the parity bit and strobe signal can be reproduced from the control signal using an extremely simple circuit on the receiving side.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional data transfer system, FIG. 2 is a block diagram showing an example of a data transfer system implementing the present invention, FIG. 3 is a time chart of the system shown in FIG. Figure 2 is a time chart. 21゜゜゜゜゜゜Transmission register, 22... Parity generator, 23... Line driver, 25... Clock switching circuit, 26, 27...
... Line receiver, 28 ...゛゜・゜Receiving side register, 29,30 ... Monostable multivibrator, 31 ... Parity checker, 32 ...
...OR gate, 33...Delay circuit, 34...
...and gate.

Claims (1)

[Claims] 1 In a data transfer system that transfers data in parallel from the sending side to the receiving side, synchronizing with the data transfer timing,
A control signal having a level change polarity corresponding to the value of the parity bit of the transfer data is sent from the transmitting side, and a parity bit and a strobe signal of the transfer data are created from the control signal on the receiving side. Characteristic data transfer control method.