JPS5954220A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To increase the density of the internal defect of an N type Si substrate extremely, to eliminate the generation of a defect positively in the surface of a grown layer and to obtain the device of high quality with high yield by specifying the correlation of the oxygen concentration, boron concentration and N type impurity concentration of the substrate when an N type layer is grown on the substrate in an epitaxial manner. CONSTITUTION:The N type Si substrate 10 is prepared which satisfies the relationship of D>B>=Oi>=14X10<17>/cm<2> when oxygen concentration is Oi, boron concentration B and N type impurity concentration D. The N type layer 11 is grown on the substrate in an epitaxial manner at 1,170 deg.C by using SiCl4, and a desired semiconductor element is formed to the layer 11. Consequently, innumerable defects are generated in the substrate 10 through various heat treatment at that time, and no defect is generated in the layer 11 and a complete non-defect layer is obtained. Accordingly, both quality and yield of the device are improved because the leakage currents of the semiconductor device obtained are extremely little.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, particularly a gettering method.
Regarding leaving.

Yumei Moto's manufacturing method makes it possible to achieve extremely low leakage current, especially in semiconductor devices that require an N-type silicon substrate, thereby preventing deterioration of semiconductor device characteristics and reducing sub-yields, resulting in high-quality semiconductor devices. Can do C.

In the conventional method, due to the thermal history of the device process, phosphorus present in the di-silicon substrate precipitates, causing internal defects and...
1) Internal defects are effective due to the gettering effect, but surface defects are a characteristic of fat semiconductor devices.
This may cause a decrease in yield.

In order to remove surface defects, there is a method of forming a surface defect-free layer and performing heat treatment for forming internal defects during or before device processing, such as the insulating gettering (IG) technique. However, IG processing has some limitations. For example, optimization of the oxygen C density in the silicon substrate, and the appropriate ratio of heat treatment and device process for forming a defect-free layer and internal defects, etc.

If the acid G concentration and heat treatment are selected for just one seedling, internal defects may reach the surface, or 7fB defects may not be formed, resulting in deterioration of the characteristics of semiconductor/conductor elements.
There was a period of 1 month when the yield and quality of pickling products decreased.

There is a method to remove surface defects, but since known epitaxial growth is generally performed at a nitrogen temperature of 1OOOC or higher, oxygen precipitation nuclei in the silicon substrate ( There was a limit to increasing internal defect formation because the internal defect nuclei) were dissolved.

FIG. 1 is a top view of a silicon wafer when a conventional manufacturing method is used. First, an N-type substrate 1 with a linear concentration in silicon crystal of 13XIQ CIIIL and an antimony concentration of 1XIQ cTL is prepared (first
Figure (a)). Thereafter, by undergoing various heat treatments to form a semiconductor element, the silicon substrate 1 is formed with internal defects 2 and 3 (see Fig. 1(b)). ).

FIG. 2 is a cross-sectional view of a soric wafer subjected to IG treatment to remove surface defects. For example, a clay substrate 4 is prepared in which the concentration of oxygen in the silicon crystal is 19XIO17-3 and the antimony αI concentration is 1X1015 (FIG. 2(a)). First, heat treatment was performed at 3141 inJ at 1200°C in a crystal oven to diffuse oxygen in the silicon layer outward to lower the density of the ρ element near the surface, and then to a temperature of 750°C. Heat treatment is performed for 10 hours to grow the internal defect nucleus 5 (No. 211 (1))).Then, heat treatment is performed for each 1Φ to form a half-body element.
1 diameter, an internal defect 6 is formed in the silicon substrate 4 (FIG. 2(C)). Due to the high oxygen concentration in the diarticulated silicon crystal of this example, the defects 7 reach the surface of the silicon substrate 4 in the form of trenches (1F).

Generally, the heat treatment used to form semiconductor devices is performed at high temperatures.
As time passes, oxygen in the Noricon substrate (if the concentration is extremely high, internal depletion may occur even to the surface;
It's obvious that it's expanding. Indeed, if the oxygen concentration is too low, internal defects may not form. In any case, it is necessary to select a 79 degree IG treatment with oxygen equivalent to 1N, and if the selection is incorrect, it may cause leakage current in the product.

FIG. 3 is a cross-sectional view of a silicon substrate and an epitaxial layer when an epitaxial wafer is changed by 1, which is a technology that removes surface defects by 1, similar to the -1 technology.

First, IZII, lij l-j,'(f2 element + IF
uJt Cal 6 Xl 017cx 3 .

An N-type silicon substrate 8 having an antimony concentration of 1xlO15CrIL-3 is prepared (FIG. 3(a)). By a slightly known method, for example, using silicon tetrachloride, 1t70'o and 1q
An N-type silicon crystal 9 having a resistance of 10 μm and a resistance of 5 jl'Cm is epitaxially grown (FIG. 3(b)). At that time, the first precipitated nuclei (internal defect nuclei) of the silicon substrate dissolve and their density becomes very low. Next, the epitaxial layer 9 becomes a 41° C. defect layer because it does not contain nitrogen atoms by carrying out the heat treatment for forming the semiconductor element, but no internal defects are formed in the silicon substrate 8 (the third
Figure (C)). Alternatively, it is only formed in a very small amount, has no gettering effect, is susceptible to contamination, and causes leakage current in the product.

As described above, in the conventional method, it was necessary to select the oxygen concentration and the heat treatment for forming internal defects according to the thermal history for forming the semiconductor element. If even the slightest deviation from the optimum 1st shift, defects may occur on the solenoid, the gettering ＼υ button may disappear, and the semiconductor elements may deteriorate, resulting in a decrease in yield and quality.・There was a stubbornness that led to a decline in energy.

The present invention fd-hi1
('J l ] + Ho07 (7) (d IJ',
lj(,1:t).

U
3]≧[O1]≧l4X], Q17 (177
By simply growing a silicon epitaxial crystal on an L-3 hexagonal substrate and passing through the teno-chair process, an extremely high density of internal defects is formed on the substrate, and no defects are formed on the epitaxial layer or the surface of the epitaxial layer. It is possible to suppress the leakage current of the semiconductor element to an extremely low level, thereby preventing deterioration of the semiconductor element and making it possible to produce a high-yield, high-quality semiconductor device.

In the present invention, if the concentration of 1 kaho in the silicon crystal is [1] and the concentration of boron is [13], (1:i:]≧((J
i) It has been found that when ≧14×1017, internal defects with extremely large diameters are likely to be formed in the silicon crystal.

However, it cannot be applied to semiconductor devices that require N-type silicon crystals, since it has an impurity type impurity.
D ) as (IJ)>(B)≧((J'i:l≧14
By setting it to XIO17, it becomes applicable.

The infarcting method of the present invention allows S trenches to be formed in silicon crystals.
The strength of Ri is [(Ji), and the strength of Boron is [B].

When N is the 4th degree of impure proboscis (D), (IJ) > [B:
]≧[O1]≧14XIOcIrL 7 on the Nu substrate
It is characterized by a process of growing silicon epitaxial crystal and a process of forming elements constituting a semiconductor device on the silicon epitaxial crystal.

The present invention will be explained in detail below based on examples of fabrics.

4th In-1 is a new view of seven silicon bases and a silicon epitaxial layer when the method of the present invention is put into practice. 19
The fourth degree of 7CrILI boron is 3XIQ Cr/L
71 Wf of l antimony is 6 XI Q''' CnL
Prepare an N-type silicon substrate 10 (FIG. 4(a)).
. Then, in a known manner, for example using silicon tetrachloride, 1
Thickness 10 tt m + resistivity 5Q at 170″C temperature
-Cx hemi-type silicon crystal 11 is grown (Fig. 4 (1)
)) ,). Next, a process for forming a semiconductor element is performed (FIG. 44(C)). At such times, various heat treatments are applied, so that internal defects 12 are formed within the N-type conductor 1.0. In this case, n(B)≧[(Ji)≧14X10 C7'
Because of L, an internal hole/recess 12 is formed in the 'j1$1 extremely easily despite the epitaxial wafer. In addition, since the Evitagi soyal layer 11fd does not contain oxygen, no internal holes are formed and half ij% body element formation kq
The area (epitaxial layer 11) is a completely defect-free layer and -C@
Ru.

In addition, the explanation of the above example is based on silicon M, adult cow, 9 silicon concentration ((Ji) = tsxto cm, + boron 1.'' and (B) - 3 x IB crn,
Antimony's tn U C, D) -6x1018, but [Ll:]>[B:]≧((Ji)≧14X101
7 is fine. In addition, the method of epitaxial layer formation, the thickness of the grown layer, and the specific resistance (ri) do not matter.

As explained in detail above, according to the present invention, a surface defect-free layer can be reliably formed, internal defects can be formed with extremely high precision, and process tolerance #ii! 4 is widened, the formed semiconductor element paste [E current] can be kept extremely low, and a high yield product/modified semiconductor-A16 can be obtained.

4 Figure 1 Kawa no Ma @ i na 1 Situation Oj Figure 1 (a) ~ (b) , , 4% Figure 2 (a) ~
(C) and Figures 3 (a) to (C) of the car are 1116 cross-sectional views of the main process outline of the conventional manufacturing method, and Figures 4 (C8) to (C) are the final example of the manufacturing method of the present invention. FIG. 1 is a cross-sectional view of the main process.

1.4, 8.10...Silicon substrate, 2I6+
12...Internal defect, 3,7...Surface defect, 5...1 defect core among them, 9.11...
・Epitaxial crystal.

Figure/Figure (,2) ,? ri)/Figure (b) Chilled 2 Melon (a) Outside diagram (b) No. ? Diagram and C Negative 43 Diagram (a) Figure 3(b) Fri 3 Diagram (C)

Claims (1)

[Claims] The concentration of oxygen precipitated in the silicon crystal is ((Ji). The concentration of boron is (B), and the concentration of N-type impurity is (JJ).
When expressed as, (IJ)>(B)≧[Ol)≧14X
A method for manufacturing a semiconductor device, comprising the steps of: forming a silicon epitaxial crystal on an N-type substrate of 1017Cnv3; and forming an element constituting a semiconductor device on the silicon epitaxial crystal.