JPS595480A - Group page control processing system - Google Patents

Abstract

PURPOSE:To enable reduction of overhead due to page fault, by grouping any continuous plural pages and performing page in and page out processing of page group collectively. CONSTITUTION:When a program maker prepares a linkage editor control statement collectively, for instance, from page 1 to page 3, a linkage editor 32 edits an object module 30 and forms a load module 4', and at the same time, establishes page grouping information in a set page information area 33. When the module 4' is loaded in a virtual memory 1 by a loader 34, the contents of the information area 33 are reflected on a set page mark 10 of a page table PTG. After this, page out and page in processing through page out and page in processing sections 11, 12 are processed collectively for three pages etc. Overhead due to page fault of each page of the program covering pages is reduced, and paging is performed effectively.

Description

[Detailed Description of the Invention] <11 Technical Field of the Invention The present invention provides a data processing system that performs so-called paging processing in 1% of the group page management processing method. The present invention relates to a group page management processing method that enables a group of pages to be paged out or paged in at once, thereby increasing the efficiency and speed of paging processing.

(2) Prior art and problems In data processing systems, in order to effectively utilize the mounted main memory and remove the limitation of storage address space, a virtual memory method is adopted, and the space on the real memory is divided into four
It is widely used to perform bulk management by dividing into kilobyte pages.

Fig. 1 is an explanatory diagram of the correspondence between general virtual memory and real memory, Fig. 2 is an explanatory diagram of the conventional R'-ge management processing method, and Fig. 3 is an explanatory diagram of the problems of the conventional method. O As shown in FIG. 1, what is the virtual memory 1 and the real memory 2?

Segment table SGT and page table PGT
It is mapped by The virtual address of the virtual memory 1 consists of 2, for example, segment a number, 6-:5 number, and displacement within the page, and the segment number is.

Segment table S pointed to by control register OR
Gives a relative address within GT. Segment table SGT
The entry stores the real address of the table PGT. -Ichiji number table PGT
Give the relative address within.

Each entry of the page table PGT stores the real address of the corresponding page of the real memory 2. A dynamic address translation mechanism performs translation from virtual addresses to real addresses. When the association cannot be made, such as when the invalid bit of the page table PGT is on, a jump fault interrupt is generated.

The real memory 2 is generally allocated to the virtual memory 1 when it becomes necessary. As shown in FIG. 2, an external page data set 3 is prepared for storing the contents of the virtual memory to be evicted from the real memory 2, and is managed by the R-ge management section. In fact, expelling the contents of the page to the external page data set 3 is called paging out, and reading the contents of the page that has been paged out onto the external page data set 5.

The process of restoring onto the real memory 2 is called ``baichijiin''.

Conventionally, the unit of exchange between the contents on the real memory 2 and the contents on the external page data set 3 has been fixed to, for example, a 4 kilobyte page, which is also the unit of allocation on the real memory z. Therefore, as shown in FIG. 3, during execution of the load module 4 over multiple pages, page faults often occur multiple times at each page boundary.

Baging operation is a type of input/output processing, and frequent occurrence of paging reduces system efficiency.

Example: Evacuate the entire load module to an external storage device/
A rollout/rollin method is used to restore data, and a swapping method is used to proactively pick up all the resources used by a task and expel them to an external page when the task enters a waiting state for a relatively long period of time. Although sometimes I get A.

These methods ignore the relationship between each page and uniformly target the entire data for decoding/restoring, and may not necessarily be said to be efficient.

(3) Object and Structure of the Invention The present invention aims to solve the above-mentioned problems and makes it possible to group any number of consecutive ranges.

- When you need to move out or move in.

By processing grouped pages together, the purpose is to reduce the number of pages caused by page faults. Therefore, the group management processing method of the present invention A table is provided for dividing the memory into pages of a predetermined size and associating virtual memory with real memory for each page, and
In a data processing system equipped with an external page data set that saves one page of the real memory,
An o-register mark area is provided in the table in which information for grouping arbitrary consecutive R-pages on the virtual memory is set, and R-pages are grouped based on the information set in the set page mark area. - a page-out processing unit that collectively expels the pages to the external barge data set;
The present invention is characterized in that it includes a zoom-in processing section that sets pages grouped based on the information set in the set page mark area and restores them from the external page data set onto the real storage. This will be explained below with reference to the drawings.

(4) Embodiment of the Invention FIG. 4 shows an embodiment of the invention, and FIG. 5 shows an aspect of the processing according to the invention.

In the figure, 10 is a set page mark area, 11 is a page-out processing section, and 12 is a page-in processing section.

30 is an object module, 31 is a linkage editor control statement, and 32 is a linkage editor.

33 represents a set page information area, and 34 represents a loader.

As shown in FIG. 4, in the page table PGT.

Set page mark area 1 with 1 bit for each entry
0 is set. Each bit of the set page mark area 10, ie, the set page flag, indicates grouping of pages, and is set, for example, when a load module area is secured on virtual memory. When this set page flag is on, it indicates that the page is set to the 9th page. Therefore, the set page flag of the last page of the set page table entry is not set. In the example shown in Figure 4, one set is from the 0th page to the 24th page, and the 3rd and 4th pages are
Pages are grouped into one set.

If a single read request or a single add-in request is made for the fifth page, the third page of the set
<- page and the fourth page are collectively targeted for paging.

In response to a page out request,
is processed as follows. On real memory - (JgtcL
) When a page-out request for the page selected by the method is issued, the ha-shiaud processing unit 11 initializes the R-di count of the internal counter to rlJ by the process 20 shown in FIG.

Next, examine the set barge mark area]O of the page table entry of the page that was targeted for geo-out,
Process 21 checks whether the set page flag is on.

If it is on, step 22 increments the page count by "+1", points to the secondary page table entry, and returns to step 21. Repeat the process in the same way, and if the set flag is off,
Control is transferred to process 23. In process 23, a set of pages corresponding to the page count is collectively saved to the external page data set, and the page out process is ended.

If the CERA O-di ψ flag is off from the beginning, only the IQ-di will be extracted as before. Note that the invalid bit on the page table of the page that has been paged out is turned on.

A page fault is indicated. Therefore, if there is an access on the second page, a page fault will occur.

In response to a page-in request, the page-in processing unit 12 processes the page-in request as follows. The barge-in processing section 12 is the first place!
! 25, the page count of the internal counter is rl
Initialize to J. next.

- points to the request table entry of the requester, by operation 26.

Set o-ji mark suggestion 10 set o-ji mark
Check if the flag is on. For the subcommittee that is on, the page count is incremented by "+1" in step 27, the page table entry is pointed to the primary page table entry, and the process returns to step 26. Repeat the process in the same way,
If the set page flag is off, control is transferred to process 28. Through process 28, a set of pages corresponding to the above page count number is collectively inserted into the real memory from the external page data set, and the corresponding invalid bit is turned off. Therefore, it is possible to prevent a -ji fault from occurring one after another in succession.

Next, one processing aspect according to the present invention will be explained with reference to FIG. Generally, the creator of a program that spans multiple pages can accurately know how the program will operate on a data processing device. Therefore, it would be desirable if the program creator could specify the grouping of pages.

This specification is performed using, for example, the linkage editor control statement 31. Linkage editor control statement 31 r 5ET
=(1-3)J means an instruction that the first page to the third page of the generated load module 4' are to be one set. The linkage editor 32 edits the object module 30 based on the linkage editor control statement 31, and loads the load module 4.
′ is generated, and the above grouping information is set in the set page clear information area 33 provided corresponding to the load module. The loader 34 is the load module 4'
When loading, the set page information area 33 is referred to and reflected in the set page mark area 1d], 0 of the page table PGT. After that.

The database processing unit 11 and the database processing unit 12 input and output the external page data set 3 and process the pages from the first page to the third page of the load module 4 as one paging target. Become. It should be noted that the set may be dynamically updated by a macro, for example, by a macro.

(5) As described in detail, according to the present invention, the overhead caused by page faults can be significantly reduced.

This reduces the number of page I/Os for the entire system.
System throughput can be improved. In particular, for example, it is possible for a program creator or the like to arbitrarily specify the unit of paging, thereby promoting the efficiency of paging.

[Brief explanation of drawings]

Figure 1 is an explanatory diagram of the correspondence between general virtual memory and real memory, Figure 2 is an explanatory diagram of the conventional page management processing method, and Figure 3 is an explanatory diagram of the correspondence between general virtual memory and real memory.
FIG. 4 shows an embodiment of the present invention, and FIG. 5 shows an example of a processing mode according to the present invention. In the figure, 1 is a virtual memory, 2 is a real memory, 3 is an external page data set, 10 is a set page mark area, 11 is a front processing section, and 12r/i is a -in processing section. Patent applicant Fujitsu Limited

Claims (1)

[Claims] Data that divides real memory into pages of a predetermined size, and provides a page table that associates virtual memory with real memory in units of pages, as well as an external page dataset for saving the pages of the real memory. In the processing system, a set page mark area is provided in the page table in which information for grouping arbitrary consecutive R-pages on the virtual memory is set, and the set page mark area is set in the set page mark area. a page out processing unit that collectively expels pages grouped based on the information set in the set page mark area to the external R-ge data set; A group/kage management processing method comprising: a page-in processing unit that restores the above-mentioned real storage example from an external page data set.