JPS5956830U - noise filter - Google Patents

noise filter

Info

Publication number
JPS5956830U
JPS5956830U JP14831882U JP14831882U JPS5956830U JP S5956830 U JPS5956830 U JP S5956830U JP 14831882 U JP14831882 U JP 14831882U JP 14831882 U JP14831882 U JP 14831882U JP S5956830 U JPS5956830 U JP S5956830U
Authority
JP
Japan
Prior art keywords
windings
noise filter
inductor
winding
cancel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14831882U
Other languages
Japanese (ja)
Inventor
北原 覚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Corp
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TDK Corp filed Critical TDK Corp
Priority to JP14831882U priority Critical patent/JPS5956830U/en
Publication of JPS5956830U publication Critical patent/JPS5956830U/en
Pending legal-status Critical Current

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  • Filters And Equalizers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案に係るノイズフィルタの実施例を示す回路図
である。 1.2.3.4・・・巻線、cc’・・・コくデンサ、
   −Ll、 L2・・・インダクタ、LD・・・負
荷、PS・・・電源、NS・・・ノイズ源、T1.T2
・・・入力端子、T3゜T4・・・出力端子。
The figure is a circuit diagram showing an embodiment of the noise filter according to the present invention. 1.2.3.4...Winding, cc'...Kokudenser,
-Ll, L2...inductor, LD...load, PS...power supply, NS...noise source, T1. T2
...Input terminal, T3゜T4...Output terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 一対の巻線1,2を有する第1のインダクタL1と、一
対の巻線3.4を有する第2のインダクタL2とを具備
し、前記一対の巻線1.2と巻線3とを第1の電源線路
に対して直列に接続しかつ前記巻線1,2による磁束が
相互に打ち消し合うごとく設定し、前記巻線4を、第2
の電源線路に直列に挿入しかつ巻線3.′4による磁束
が相互に打ち消し合うごとく設定するとともに、前記各
、巻線のいずれか1つまたは複数個に対して並列にコン
デンサを接続することを特徴とするノイズフィルタ。
The first inductor L1 has a pair of windings 1 and 2, and the second inductor L2 has a pair of windings 3.4. The winding 4 is connected in series to the first power supply line and set so that the magnetic fluxes of the windings 1 and 2 cancel each other out.
winding 3. A noise filter characterized in that the magnetic fluxes caused by '4 cancel each other out, and a capacitor is connected in parallel to any one or more of the windings.
JP14831882U 1982-09-30 1982-09-30 noise filter Pending JPS5956830U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14831882U JPS5956830U (en) 1982-09-30 1982-09-30 noise filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14831882U JPS5956830U (en) 1982-09-30 1982-09-30 noise filter

Publications (1)

Publication Number Publication Date
JPS5956830U true JPS5956830U (en) 1984-04-13

Family

ID=30329563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14831882U Pending JPS5956830U (en) 1982-09-30 1982-09-30 noise filter

Country Status (1)

Country Link
JP (1) JPS5956830U (en)

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