JPS5961119A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5961119A
JPS5961119A JP57171259A JP17125982A JPS5961119A JP S5961119 A JPS5961119 A JP S5961119A JP 57171259 A JP57171259 A JP 57171259A JP 17125982 A JP17125982 A JP 17125982A JP S5961119 A JPS5961119 A JP S5961119A
Authority
JP
Japan
Prior art keywords
silicon
polysilicon
oxide film
concavity
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57171259A
Other languages
Japanese (ja)
Inventor
Seiichiro Kawamura
河村　誠一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57171259A priority Critical patent/JPS5961119A/en
Publication of JPS5961119A publication Critical patent/JPS5961119A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2926—Crystal orientations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3808—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H10P14/3814—Continuous wave laser beam
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3204—Materials thereof being Group IVA semiconducting materials
    • H10P14/3211—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3451—Structure
    • H10P14/3452—Microstructure
    • H10P14/3458—Monocrystalline
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3466—Crystal orientation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/382—Scanning of a beam

Landscapes

  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To form the single crystal silicon having the desired orientation of crystallization by a method wherein a concavity is provided on the expected region of element formation located on an oxide film, and a substrate is exposed at the external part of the outer edge of the concavity, leaving a thin oxide film at the bottom part, by growing polycrystalline silicon on the whole surface and also by irradiating energy beams thereon. CONSTITUTION:An oxide film is formed on a silicon substrate 11, an etching is performed, and a hill-shaped part 12 with a concavity 12a is formed. A thin SiO2 film is left at the bottom part of the concavity 12a. Then, a polysilicon film 13 is formed on the whole surface, a continuous wave argon laser is scanned starting from the external part 14 in such a manner that the concavity will be completely covered in the direction as shown by the arrow in the diagram. When the laser beam 15 passes the outer edge part 12b on the other side of a hillock part, the polysilicon located on the external part 15 and in the concavity 12a is fused and crystallization starts due to the cooling of the polysilicon, but as the polysilicon at that part is contacted to the silicon on the silicon substrate 11 in the direction of crystallization 100, the substrate silicon is turned to a nucleus, and the single crystal silicon of the crystal direction 100 grows in the lateral direction.

Description

【発明の詳細な説明】 （１）発明の技術分野 本発明は半導体装置の製造方法、詳しくはシリコン・オ
ン・インシュレーター（Ｓｉｌｉｃｏｎ−ｏｎ−Ｉｎｓ
ｕｌａＬｏｒ、５０１　）構造の素子形成予定領域を所
望の結晶方位をもたせて単結晶化する方法に関する。DETAILED DESCRIPTION OF THE INVENTION (1) Technical field of the invention The present invention relates to a method for manufacturing a semiconductor device, specifically a method for manufacturing a semiconductor device, specifically a method for manufacturing a semiconductor device.
This invention relates to a method for single-crystallizing a region in which an element is to be formed in a ulaLor, 501) structure with a desired crystal orientation.

（２）技術の背景 本願の発明者は、Ｓｏｌ構造の素子形成予定領域の多結
晶シリコン（ポリシリコン）旧をｔ、Ｈ４５ｐしくｈｅ
ａｔ　５ｉｎｋ、ピー１−シンク）構造に形成し、シー
９−アニールによってポリシリコンを単結晶化する技術
を開発した。(2) Background of the technology The inventor of the present application has developed a method for removing polycrystalline silicon (polysilicon) in the area where elements of the Sol structure are planned to be formed.
We have developed a technique for forming polysilicon into a single crystal structure by forming a polycrystalline polysilicon into a single-crystal structure by annealing the polysilicon.

第１図にはかかる構造か断面図で示され、同図において
、１はシリコン基板、２は酸化膜（二酸化シリコン（５
ｉＯ２）膜）、２ａば酸化膜に形成された凹部、３はポ
リシリコン層を示し、凹部２ａ内のポリシリコンの単結
晶化は、ンリコン基板１上に酸化膜２を形成し、この酸
化ｌｌψ２の素子形成予定領域に凹部２ａをエソチンク
で形成し、この四部２ａの底部に酸化膜２よりも薄い酸
化膜を残すヒートシンク構造を作る工程、全面にポリシ
リコンを成長してポリシリコン層３を形成する工程、四
１１５２ａの上方ｇＢ分を完全に覆ってポリシリコン層
をレーザビームで照射し凹ｆｆ１ｓ２ａ内のポリシリコ
ンを溶融する工程を含むことを特徴とする方法によつ゛
（実現される。FIG. 1 shows a cross-sectional view of such a structure, in which 1 is a silicon substrate, 2 is an oxide film (silicon dioxide (5
iO2) film), 2a is a recess formed in the oxide film, 3 is a polysilicon layer, and the single crystallization of the polysilicon in the recess 2a forms an oxide film 2 on the silicon substrate 1, and this oxide llψ2 A process of forming a heat sink structure by forming a recess 2a in the area where the element is to be formed by etching, and leaving an oxide film thinner than the oxide film 2 at the bottom of the four parts 2a, and forming a polysilicon layer 3 by growing polysilicon on the entire surface. This is realized by a method characterized by including a step of completely covering the upper gB of the fourth 1152a and irradiating the polysilicon layer with a laser beam to melt the polysilicon in the recess ff1s2a.

（３）従来技術と問題点 四部２ａのポリシリコンは、四部２ａの底のほぼ中心！
）］）分から始まる冷却によって単結晶化されるが、こ
のＣ「結晶化において核（５ｅｅｄ）となる単結晶か存
在しないために、門！４１ｉ２ａのｉ１１結晶シリコン
の結晶力位を制ｒ、ＩＩＩすることができない。通常の
場合、ア１１結晶化した四部２ａ内に形成した素子は特
定の結晶力位をもたなくても十分な特性を示−３が、な
んらかの理由で、例えば界面準位を特に改良したいため
（＋００）の結晶力位が望まれるというような場合には
、」−記した技術ではその要望を１）１５足させること
かできない。(3) Prior art and problems The polysilicon of the fourth part 2a is almost at the center of the bottom of the fourth part 2a!
)]) It is made into a single crystal by cooling starting from C, but since there is no single crystal that will serve as a nucleus (5eed) in crystallization, the crystal force of the i11 crystal silicon of gate!41i2a is suppressed. Normally, the element formed in the crystallized four parts 2a exhibits sufficient characteristics even without a specific crystalline force, but for some reason, for example, the interface state In a case where a crystal strength of (+00) is desired in order to particularly improve the crystal strength, the technique described in "-" can only satisfy the request by 1) 15.

（４）発明の目的 本発明は上記従来の問題点に鑑の、ｓ０１構造の素子形
成予定領域のポリシリコンを小結晶化するときに、所望
の結晶方位をもった単結晶シリコンを形成する方法を提
供することを目的とする。(4) Purpose of the Invention In view of the above-mentioned conventional problems, the present invention provides a method for forming single crystal silicon having a desired crystal orientation when crystallizing polysilicon in a region where an element of an s01 structure is planned to be formed. The purpose is to provide

（５）発明の構成 そしてこの目的は本発明によれは、半導体栽板上に酸化
膜を形成し、この酸化膜の素子形成予定領域に凹部をそ
の底部には前記酸化膜よりも薄い酸化膜を残して形成す
る工程、前記四部の外縁の外　方部分において基板を露
出する工程、全面に多結晶シリコンを成長する工程、お
よび基板の露出した前記外方部分に始まり四部のに方部
分を完全に覆う如くにエネルギー・ビームを照射する工
程により、シリコン・オン・インツユレータ−構造の素
子形成予定領域を基板と同一の結晶方位をもたせて小結
晶化することを特徴とする半導体装置の製造方法を提供
するごとによって達成される。(5) Structure and object of the invention According to the present invention, an oxide film is formed on a semiconductor board, and a recess is formed in a region of the oxide film where an element is to be formed, and an oxide film thinner than the oxide film is formed at the bottom of the recess. a step of exposing the substrate at the outer part of the outer edge of the four parts, a step of growing polycrystalline silicon on the entire surface, and a step of completely forming the outer part of the four parts starting from the exposed outer part of the substrate. A method for manufacturing a semiconductor device, characterized in that a region where an element is to be formed in a silicon-on-incubator structure is crystallized into small crystals so as to have the same crystal orientation as that of a substrate, by irradiating an energy beam so as to cover the substrate. Achieved by each offer.

（７）発明の効果 以下本発明の実施例を図面によって詳述する。(7) Effect of invention Embodiments of the present invention will be described in detail below with reference to the drawings.

第２図（ａｌを参照すると、本発明の方法を実施するに
際しては、結晶方位（１００）のシリコン基板１１上に
酸化膜（二酸化シリコン（５ｉＯ２）膜）を形成し、こ
の酸化膜を通常の技術でエノヂンクして、凹Ｍｌ（１２
ａをもった丘形部１２を形成する。四部１２ａの底＠１
６には１０００−２０００人の厚さの５ｉ０２を残し、
Ｊｉｈ　＆ｌｌ　１２０）　Ｉｇ　サ６０００〜８００
０人の外縁部１２ｂの外ではシリコン基板が１．０μｍ
程度のひろがりで１“Ｋ出しＣいる。Referring to FIG. 2 (al), when carrying out the method of the present invention, an oxide film (silicon dioxide (5iO2) film) is formed on the silicon substrate 11 with crystal orientation (100), and this oxide film is Enojinku with technology, concave Ml (12
A hill-shaped portion 12 having a shape a is formed. Bottom of fourth part 12a @1
6 leaves 5i02 with a thickness of 1000-2000 people,
Jih &ll 120) Ig Sa 6000-800
The silicon substrate is 1.0 μm outside the outer edge 12b of 0 people.
There are 1" K out C with a certain degree of spread.

次いで全面にポリシリコンを４０　ｆｌ　Ｏ人程度の厚
さに例えば化学気相成長法（ＣＶＤ法）で成にし、ポリ
シリコン層１３を形成する。ポリシリコン層１３は、酸
化膜の外縁部１２ｂの外力′Ｍ１；づ目４ごはシリコノ
ン基板ＩＩと的接接触している。Next, a polysilicon layer 13 is formed by depositing polysilicon on the entire surface to a thickness of about 40 ml by, for example, chemical vapor deposition (CVD). The polysilicon layer 13 is in direct contact with the silicone substrate II due to the external force 'M1' of the outer edge portion 12b of the oxide film.

次いで、連わ１ｃ波（ＣＭ）アルゴン（Ａｒ）レーザを
、１２−１４Ｗのパワー、５〜１０ｃｍ／　ｓｅｃの退
会速度で、外力部う目４から始まり、図に矢印で示す方
向に門！’ｆｌ！１２ａを完全に覆う如くに走今する。Then, a continuous 1C wave (CM) argon (Ar) laser is applied with a power of 12-14 W and an exit speed of 5-10 cm/sec, starting from the external force section eye 4 and moving in the direction shown by the arrow in the figure. 'fl! Run so as to completely cover 12a.

第２図（ａｌにはレーデビー”％ｌＬｌが［を形＋’ａ
＋１２の外縁部１２ｂを僅かに超えた位置で示されるが
、レーザビーム■５か丘形邪の他方の外縁５１２ｂを通
過するときには、外力Ｃｆ１）分Ｉ４の」二と四部１２
ａ内のポリシリコンにすべて溶融している。Figure 2 (al has the form ``%lLl +'a'')
Although it is shown at a position slightly beyond the outer edge 12b of +12, when the laser beam ■5 passes through the other outer edge 512b of the hill shape, the external force Cf1) I4's 2 and 4 parts 12
All of the polysilicon in a is melted.

外力部分１４の上の溶融ポリシリコンから冷却によりｌ
ｉ結晶化が始まるが、その部分でポリシリコンは結晶力
位（１００）のシリコン基板■１のシリコンと接触して
いるから、基板シリコンが核となり、結晶方位（１００
）の単結晶シリコンが横方向に成長して行く　（横方向
エピタキシャル成長（ｌａｔｅｒａｌ　ｅｐｉｔａｘｉ
ａｌ　ｇｒｏｗｔｈ）　）　ｏ一般にかかる成長により
数十ミクロン以上も単結晶をのばすことは難しいが、１
０〜２０μｍ程度であればさほと難しくないことが本願
発明者の実験により確認された。l from the molten polysilicon on the external force section 14 by cooling.
i Crystallization begins, but at that point the polysilicon is in contact with the silicon of silicon substrate ■1 with crystal orientation (100), so the substrate silicon becomes a nucleus and the crystal orientation (100)
) single-crystal silicon grows laterally (lateral epitaxial growth)
al growth)) o Although it is generally difficult to grow a single crystal more than several tens of microns through such growth,
It has been confirmed through experiments by the inventor of the present invention that it is not difficult to form a material with a thickness of about 0 to 20 μm.

第２図ｆｂｊ　＆よ第２図（ａ）の構造の平面図で、図
にａ、ｂ、ｃで示す距離はそれぞれ１０”２０１７　ｍ
　、　２０〜３０μｍ、５０〜７０μｍに設定し、１字
型部分内に結晶力位（１００）の単結晶シリコンが得ら
れた。Figure 2 fbj &yo is a plan view of the structure in Figure 2 (a), where the distances indicated by a, b, and c in the figure are 10"2017 m, respectively.
, 20 to 30 μm, and 50 to 70 μm, and single crystal silicon with crystal strength (100) was obtained within the single-shaped portion.

本発明の他の実施例においては、第３図ｔａ）の断面図
に示される選択酸化法（ＬＯＣＯ３法）で形成された酸
化１１Ｒ＋を利用する。なお同図において、２１ば結晶
方位（１００）のシリコン基板、２２はフィールド酸化
膜、２２ａは回合１；、２３ボリシリコン層、２４はフ
ィールド酸化膜２２の外方のシリコン基板のシリコンが
露出した外方部分、２５はレーザビームを示し、同図ｆ
ｂｌは同図（ａ）の構造の平面図であり、同図（ｂｌに
ｄで示ず距離は１０〜２０μｍに設定した。かかる構造
におｉ′Ｊるレーザビームの照射、ポリシリコンの溶融
；、外力部分２４からの小結晶化等はずべ°Ｃ第２図の
実施例につい“Ｃ説明したとごろと間挿である。Another embodiment of the present invention utilizes an oxide 11R+ formed by a selective oxidation method (LOCO3 method) as shown in the cross-sectional view of FIG. 3(ta). In the figure, 21 is a silicon substrate with crystal orientation (100), 22 is a field oxide film, 22a is a polysilicon layer, 23 is a polysilicon layer, and 24 is the exposed silicon of the silicon substrate outside the field oxide film 22. In the outer part, 25 indicates a laser beam, and the figure f
bl is a plan view of the structure of the same figure (a), and the distance is set to 10 to 20 μm (d is not shown in bl). Such a structure is irradiated with a laser beam, and the polysilicon is melted. The small crystallization from the external force portion 24 is an interpolation of what was explained in the embodiment of FIG. 2.

なお、以上においては結晶力位（１００）の場合につい
て説明したが、横方向エビクキソヤル成長による単結晶
シリコンの結晶力位はシリコン基板の結晶方位に一致す
るから、結晶方位（１１１）の小結晶シリコンを得たい
場合には、結晶方位（１１１）のシリコン基板を選べば
よい。Note that although the case of crystal strength (100) has been explained above, since the crystal strength of single crystal silicon due to lateral lateral growth matches the crystal orientation of the silicon substrate, small crystal silicon with crystal orientation (111) If desired, a silicon substrate with crystal orientation (111) may be selected.

なお以」二の説明において、ポリソリコンの溶融にはレ
ーデビームを用いたが、本発明の通用範囲はその他のエ
ネルキー・ビームを用いる場合にも及ぶ。In the following explanation, a Lede beam is used to melt the polysilicon, but the scope of the present invention also extends to the case where other energetic beams are used.

（７）発明の効果 以上酊−細に説明したように、本発明の方法によれは、
Ｓｏｌ構造の素子形成予定領域に所望の結晶力位をもっ
た単結晶シリコンが（４７られるので、４側と下側面が
酸化膜で囲まれた領域に所望の半導体素子を形成するこ
と、更にばかがる半導体素子を多層化することが可能に
なる。(7) Effects of the invention As explained in detail above, the method of the present invention has the following effects:
Since single crystal silicon with a desired crystalline strength is formed in the region where the element of Sol structure is planned to be formed, it is even more difficult to form the desired semiconductor element in the region surrounded by the oxide film on the 4th side and the lower surface. This makes it possible to create multiple layers of semiconductor elements.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はＳｏｌ構造のし−１−シンク機能をもった素子
形成予定領域の断面図、第２図Ｆａ＋と（ｂｌおよび第
３図（ａｌと（ｂｌは、それぞれ本発明実施例の断面図
と平面図である。 １１．２１−一結晶力位（１００）のシリコン基板、１
２−酸化膜の丘形部、１２　ａ　−１！Ｉ　Ｍｔ（，２
２−フィールド酸化膜、１３．２３−ポリシリコン層、
１４．２４〜基板のシリコン力＜ｓＷ出した外方部分、
１５．２５−レーザビーム Ｃつ　　１ Ｕ） 八　　　　　　　　　　Ｄ Ｏ誓 ８３− （Ｙ’）　　　　　− 〇　　　　　　　　　　ＤFIG. 1 is a cross-sectional view of a region in which an element with a 1-sink function is planned to be formed in a Sol structure, FIG. 11.21-Silicon substrate with one crystal strength (100), 1
2- Hill-shaped part of oxide film, 12 a -1! I Mt(,2
2-field oxide film, 13.23-polysilicon layer,
14.24 ~ The outer part where the silicon force of the substrate < sW is exerted,
15.25-Laser beam C 1 U) 8 DO 83- (Y') - 〇 D

Claims (1)

【特許請求の範囲】[Claims] 半導体基板」−に酸化膜を形成し、この＃膜化１１カの
素子形成予定領域に凹ｊｉｉをその底部ににｊ前記酸化
１１俯よりも薄い酸化膜を残して形成する上程、前記四
部の外縁の外力（！１；分において基板を４出するエイ
′＋！、全面に多結晶シリコンを成長する工程、および
基板の露出し）こｆｌｉ？記外力部匁に始まり凹部の」
三方部分を完全に覆う如くにエネルギー・ビームを！！
＠　４Ｊ　する工程により、シリごノン・オン・インシ
ュレーク−構造の素子形成予定領域を基板と同一の結晶
力４１．をもたせて単結晶化することを特徴とする半導
体装置の製造方法。An oxide film is formed on the "semiconductor substrate", and a recess is formed in the region where the element is to be formed in the first part of the film, leaving an oxide film thinner than the oxide film at the bottom of the first part. External force on the outer edge (! 1; the process of growing polycrystalline silicon on the entire surface, and exposing the substrate). It begins with the outer force part of the momme and the concave part.
An energy beam that completely covers the three sides! !
＠ 4J process, the region where an element with a non-silicon-on-insulator structure is to be formed is subjected to the same crystal force as the substrate. 1. A method for manufacturing a semiconductor device, characterized in that the semiconductor device is made into a single crystal by imparting the same properties.
JP57171259A 1982-09-30 1982-09-30 Manufacture of semiconductor device Pending JPS5961119A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57171259A JPS5961119A (en) 1982-09-30 1982-09-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57171259A JPS5961119A (en) 1982-09-30 1982-09-30 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5961119A true JPS5961119A (en) 1984-04-07

Family

ID=15920001

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57171259A Pending JPS5961119A (en) 1982-09-30 1982-09-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5961119A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5766627A (en) * 1980-10-13 1982-04-22 Toshiba Corp Manufacture of semiconductor device
JPS5840852A (en) * 1981-09-03 1983-03-09 Toshiba Corp Complementary metal oxide semiconductor device and its manufacture

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5766627A (en) * 1980-10-13 1982-04-22 Toshiba Corp Manufacture of semiconductor device
JPS5840852A (en) * 1981-09-03 1983-03-09 Toshiba Corp Complementary metal oxide semiconductor device and its manufacture

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