JPS5962977A - Integral type control signal generator - Google Patents
Integral type control signal generatorInfo
- Publication number
- JPS5962977A JPS5962977A JP17300282A JP17300282A JPS5962977A JP S5962977 A JPS5962977 A JP S5962977A JP 17300282 A JP17300282 A JP 17300282A JP 17300282 A JP17300282 A JP 17300282A JP S5962977 A JPS5962977 A JP S5962977A
- Authority
- JP
- Japan
- Prior art keywords
- output
- voltage
- control signal
- signal generator
- integral type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
- G06G7/18—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for integration or differentiation; for forming integrals
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Feedback Control In General (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は基準電圧の変化に対し、その出力が直線的に追
従する積分制御信号発生器に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an integral control signal generator whose output linearly follows changes in a reference voltage.
従来のこの種積分制御信号発生器は、第１図に示す如く
構成されている。以下図面について説明すると、基準電
圧５は抵抗２を介して演算増幅器１の差動入力端子に接
続されている。コンデンサ３および抵抗４は一端が前記
演算増幅器１の差動入力端子に接続され、他端は演算増
幅器１の出力に接続されるとともに積分制御信号発生器
の出力６１ と＠続されている。ここで全率”電圧５
の′「梶１王レベルをステップ的に変化させｆこ時の積
分形制御１言号光生器の出力６１ の出力特性は第２図
に示す様になる。A conventional integral control signal generator of this type is constructed as shown in FIG. Referring to the drawings below, a reference voltage 5 is connected to a differential input terminal of an operational amplifier 1 via a resistor 2. One end of the capacitor 3 and the resistor 4 are connected to the differential input terminal of the operational amplifier 1, and the other end is connected to the output of the operational amplifier 1 and to the output 61 of the integral control signal generator. Here, the total rate “voltage 5
The output characteristics of the output 61 of the integral type control 1-word light generator are shown in FIG. 2 by changing the Kaji 1 level in steps.
＠２図においてＡは基準電１ｆ５の電圧変化を示し月よ
積分形制御信号発生器の出力６１ の電−圧変化、即ち
出力′特性をポ才。基準電！−Ｅ５の電圧税化Ａはステ
５ブ的であるが、積分形制御１言号光生器の出力６１の
出力特性１３は指数関数的な変化である。In Figure 2, A indicates the voltage change of the reference voltage 1f5, which shows the voltage change of the output 61 of the integral control signal generator, that is, the output' characteristic. Standard voltage! The voltage taxization A of -E5 is stepwise, but the output characteristic 13 of the output 61 of the integral type control one-word light generator is an exponential change.
追従の速度は抵抗２．コンデンサ３．抵抗４．基準電圧
５により決定される。The following speed is the resistance 2. Capacitor 3. Resistance 4. Determined by reference voltage 5.
従ってこのｍ積分形制御信号発生器にて得られる出力特
性Ｂを用いて、被制御装置等を運転する場合下記＋ＩＮ
ｌ〜（１））に示す欠点がＪ）つγこ。Therefore, when operating a controlled device using the output characteristic B obtained from this m-integral type control signal generator, the following +IN
The drawbacks shown in (1)) are J).
（ａｌ 出力特性が指数関数的であろ１こめ、被制御
装置の出力特性も指数関数的となり、最終の出力値に安
定するまでの所要時曲が長く、基準？？！■を手動設定
器にて調整する場合は何度も微調整を繰り返して、最適
を出力値を求めなくてはならない。(al) Even if the output characteristics are exponential, the output characteristics of the controlled device will also be exponential, and it will take a long time to stabilize at the final output value. When making adjustments, it is necessary to repeat fine adjustments many times to find the optimal output value.
（ｂｌ 被制御Ｉ１１装（ダの負荷に合わせて、その
追従速度を変える場合、抵抗２．コンデンサ３．抵抗４
は亙いの関連を考慮しながら選択しなければならない。(bl Controlled I11 equipment (When changing the following speed according to the load of the resistor 2. Capacitor 3. Resistor 4
must be selected while considering the relationship between the two.
本発明は、これらの欠点を除去し、基準電圧の変化に対
し、その出力がＩＢ線的に追従するとともに、抵抗分圧
器の設定値を可変するだけで、自由に追従速度を変える
ことができる積分形制御信号発生器を提供するものであ
る。The present invention eliminates these drawbacks, allows the output to follow the change in the reference voltage along the IB line, and allows the tracking speed to be freely changed by simply changing the set value of the resistor voltage divider. An integral type control signal generator is provided.
第３図は本発明の一実施例を示し、第１図と同一番号は
同一部品を示す。７は電圧比較器であり、その入力は積
分回路１０ の出力６２ と基準？ｌ！王５との′電圧
レベルを比較するように接続されている。FIG. 3 shows an embodiment of the present invention, in which the same numbers as in FIG. 1 indicate the same parts. 7 is a voltage comparator whose input is the output 62 of the integrating circuit 10 and the reference? l! It is connected to compare the voltage level with the voltage level of the output terminal 5.
電圧比較器７の出力は緩衝増幅器８の入力に接続さｆ’
Ｌ、該緩衝増幅器の出力は抵抗分圧器９に接続されてい
る。抵抗分圧器９の出力は積分回路１０の入力に接続さ
れている。The output of voltage comparator 7 is connected to the input of buffer amplifier 8 f'
L, the output of the buffer amplifier is connected to a resistive voltage divider 9. The output of the resistive voltage divider 9 is connected to the input of the integrating circuit 10.
１１Ｌ王比較器７は積分回路１０ の出力６２ と基準
電圧５の電圧レベルを比較し、出力６２ の電圧レベル
が基準電圧５より低い場合は判定結果を（ＨＩＧＪとし
て出力する。The 11L King comparator 7 compares the voltage level of the output 62 of the integrating circuit 10 and the reference voltage 5, and outputs the determination result as (HIGJ) if the voltage level of the output 62 is lower than the reference voltage 5.
ま１こ出力６２の電圧レベルが基準電圧５より高い場合
は判定結果を（ＬＯＷ）として出力する。If the voltage level of the output 62 is higher than the reference voltage 5, the determination result is output as (LOW).
緩衝増幅器８はは＼電ｔＡ電圧に等しい出力″電圧を得
ることができる１こめ、本発明による積分形制御信号発
生器に供給される′屯源電圧を（＋Ｖｃｃ）。The buffer amplifier 8 is capable of obtaining an output voltage equal to the voltage tA (+Vcc), which is supplied to the integral control signal generator according to the invention.
（−Ｖｃりとすると、緩衝増幅器８は上述の（■ＩＧＩ
（Ｊ又は（ＬＯＷ）の入力を受けて、その出力は（−Ｖ
ｃり又は（＋Ｖｃりを出力することになる。抵抗分圧器
９は緩衝増幅器８の出力を受け、その出力を積分回路１
０ の入力へ送り出才。(-Vc, the buffer amplifier 8 is
(J or (LOW) input, the output is (-V
The resistor voltage divider 9 receives the output of the buffer amplifier 8 and sends the output to the integrating circuit 1.
Send to 0 input.
演算増幅器１．抵抗２．コンデンサ３により構成される
積分回路１０ の特性を示す一般式は下記の通りである
。Operational amplifier 1. Resistance 2. The general formula showing the characteristics of the integrating circuit 10 constituted by the capacitor 3 is as follows.
抵抗２を゛μ、コンデンサ３をＣ１抵抗２にｍｌれる電
流を１．抵抗分圧９の出力ＹＬ圧をα・Ｖｃｃ。The resistor 2 is ゛μ, the capacitor 3 is C1, the current flowing through the resistor 2 is 1. The output YL pressure of the resistor voltage divider 9 is α·Vcc.
出力６２ のＨＥレベルをｅＯとすると、（１）式に（
２）式を代入し、整理すると（３）式から積分回路１０
の出力６２ は積分回路１０の入力ＨＥとなるα−Ｖ
ｃｃの１へ性と逆方向に積分こ＼で基準電圧５をステッ
プ的に変化させ１こ時の出力特性を第４図に示す。If the HE level of output 62 is eO, then equation (1) is expressed as (
2) By substituting and rearranging the equation, we get the integral circuit 10 from equation (3).
The output 62 of α-V becomes the input HE of the integrating circuit 10.
The reference voltage 5 is changed in a stepwise manner by integration in the direction opposite to the direction of cc to 1, and the output characteristics at this time are shown in FIG.
へは基準電Ｉ−Ｅ５の電圧変化を示し、Ｃは本発明によ
る積分形制御信号発生器の出力６２ の出力特性である
。C shows the voltage change of the reference voltage I-E5, and C is the output characteristic of the output 62 of the integral type control signal generator according to the present invention.
基準電圧５の電圧レベルをＶＲとすると、ｖｌをンｅＯ
の時は電圧比較器７の出力は（ＨＩＧＨ）であり、緩衝
増幅器８の出力は（−Ｖｃａ）である。抵抗分圧器９の
出力はα・（−Ｖａりとなり、積分回路１０は出力６２
の゛電圧レベルｅＯを上昇させるように積分動作を行う
。If the voltage level of the reference voltage 5 is VR, then vl is
At this time, the output of the voltage comparator 7 is (HIGH) and the output of the buffer amplifier 8 is (-Vca). The output of the resistor voltage divider 9 becomes α・(-Va, and the integrator circuit 10 outputs 62
An integral operation is performed to raise the voltage level eO.
わされる如く一定であり、直線的に上昇する。It remains constant and rises linearly.
ま１こＶＲ（ｅｏ の時は電圧比較器７の出力は（Ｌ
ＯｖＶ）であり、緩衝増幅回路８の出力は（＋ＶｃｃＪ
である。抵抗性ａＥ器９の出力はａ −ｖｃａとなり、
積分回路１０ は出力６２の屯−田レベルを下降させる
ように積分動作を行う６ｅｏ の下降の時間的な直線的
に下降する。At the time of VR(eo), the output of voltage comparator 7 is (L
OvV), and the output of the buffer amplifier circuit 8 is (+VccJ
It is. The output of the resistive aE device 9 becomes a − vca,
The integrating circuit 10 performs an integrating operation so that the level of the output 62 falls linearly with respect to the time of the fall of 6eo.
上述のように、本発明による積分形制御信号発生器は基
準電圧５の電圧レベルと積分回路１０の出力６２の電子
レベルとを電圧比較器７が常に電圧比較を行いその判定
結果により、緩衝増幅器８および抵抗分千器９を介して
、積分回路１０ に対し出力６２ の７１１ ｔｆレベ
ルを上昇させるか下降させろかのいずれかの指令を与え
る如く動作する。As described above, in the integral type control signal generator according to the present invention, the voltage comparator 7 constantly compares the voltage level of the reference voltage 5 and the electronic level of the output 62 of the integrating circuit 10, and based on the determination result, the buffer amplifier 8 and resistor divider 9, it operates to give a command to the integrating circuit 10 to either raise or lower the 711 tf level of the output 62.
従って基準電圧５のステップ的変化に対して、出力６２
の出力特性は、（３）式が示す如く、上昇も下降も直
線的であり、しかも抵抗分圧器９の分圧比αを可変する
だけで自由に追従の速度を変えることができる。Therefore, for a step change in the reference voltage 5, the output 62
As shown in equation (3), the output characteristic of is linear in both rise and fall, and the tracking speed can be freely changed simply by varying the voltage division ratio α of the resistive voltage divider 9.
木晃明による積分形制御信号元生器を利用しｆこ被制御
装置は、手勧設疋器による調整が容易となるばかりでな
く、負荷に合わせて追従の速度を変えろ場合も抵抗分咥
器を可変するだけでよい。Using the integral type control signal generator developed by Akiaki Ki, the controlled device not only can be easily adjusted with a manual controller, but also can be adjusted using a resistance divider to change the tracking speed according to the load. All you have to do is vary it.
まｆコ被制御装置の負荷にとっても、運転開始時や停止
時の特性が定速度上昇や定速度下降となり、無理なスト
レスがかからない等の効果がある。Also for the load on the controlled device, the characteristics at the start and stop of operation are constant speed increases and constant speed decreases, and there is an effect that undue stress is not applied.
第１Ｎは従来の積分形制御信号発生器の一例を示す結線
図、第２肉は第１図に示した装置の出力特性図、第３図
は本発明の実施例を示す結線図。
第４肉は本発明装置の出力特性図である。
ｌ・・・・・・演算増幅器、 ５・・・・・・基準電
圧６２・・・・・・出 力、 ７・・・・・・電
圧比較器。
８・・・・・・緩衝増幅器、 ９・・・・・・抵抗分
圧器。
１２・・・・・・積分回路。
方 １ 百
大 ２ 目
呼閘1N is a wiring diagram showing an example of a conventional integral type control signal generator, 2nd part is an output characteristic diagram of the device shown in FIG. 1, and FIG. 3 is a wiring diagram showing an embodiment of the present invention. The fourth figure is an output characteristic diagram of the device of the present invention. 1...Operation amplifier, 5...Reference voltage 62...Output, 7...Voltage comparator. 8...Buffer amplifier, 9...Resistor voltage divider. 12...Integrator circuit. Way 1 Hyakudai 2 Eye lock
Claims (1)
分回路出力と基準電圧とを比較する電圧比較器および該
電壬−比較器出力に接続され１こ緩衝増幅器とからなり
、前記緩衝増幅器出力を抵抗分圧器を介して前記積分回
路の入力とするとともに、積分回路出力を制御信号出力
とすることを特徴とする積分形制御信号発生器。It consists of an integrating circuit consisting of a resistor, a capacitor, and an operational amplifier, a voltage comparator for comparing the output of the integrating circuit with a reference voltage, and a buffer amplifier connected to the output of the voltage comparator. An integral type control signal generator, characterized in that the input is input to the integrating circuit via a voltage divider, and the output of the integrating circuit is used as a control signal output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17300282A JPS5962977A (en) | 1982-09-30 | 1982-09-30 | Integral type control signal generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17300282A JPS5962977A (en) | 1982-09-30 | 1982-09-30 | Integral type control signal generator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5962977A true JPS5962977A (en) | 1984-04-10 |
Family
ID=15952363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17300282A Pending JPS5962977A (en) | 1982-09-30 | 1982-09-30 | Integral type control signal generator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5962977A (en) |
-
1982
- 1982-09-30 JP JP17300282A patent/JPS5962977A/en active Pending
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