JPS5963746U - Computer abnormality determination device - Google Patents

Computer abnormality determination device

Info

Publication number
JPS5963746U
JPS5963746U JP15724682U JP15724682U JPS5963746U JP S5963746 U JPS5963746 U JP S5963746U JP 15724682 U JP15724682 U JP 15724682U JP 15724682 U JP15724682 U JP 15724682U JP S5963746 U JPS5963746 U JP S5963746U
Authority
JP
Japan
Prior art keywords
bus
determination device
abnormality determination
output device
computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15724682U
Other languages
Japanese (ja)
Inventor
守本　幸博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Corp
Original Assignee
Meidensha Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Corp filed Critical Meidensha Corp
Priority to JP15724682U priority Critical patent/JPS5963746U/en
Publication of JPS5963746U publication Critical patent/JPS5963746U/en
Pending legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の一実施例を示す全体構成図、第２図は
第１図におけるパスレコーダ６の構成図である。 ７・・・バスドライ−バ／レシーバ、８・・・メモリ部
、９・・・カウンタ部、１０・・・コントロール部。FIG. 1 is an overall configuration diagram showing an embodiment of the present invention, and FIG. 2 is a configuration diagram of the path recorder 6 in FIG. 1. 7... Bus driver/receiver, 8... Memory section, 9... Counter section, 10... Control section.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ｃｐｕ　、メモリ、出力装置をバス結合して各種演算処
理及び内部の各種異常検出手段を持つコンピュータにお
いて、上記バスに結合され該バス上のコン１０一ル信号
の変化に対応して該バスの各ライン上の論理状態をメモ
リ部に２記憶更新し、上記異常検出手段による検出信号
で上記メモリ部の記憶更新を停止し、その内容を上記出
力装置ぽ出力するバスレコーダを備えたことを特徴とす
るコンピュータの異常判別装置。In a computer having a CPU, a memory, and an output device connected to each other via a bus for various arithmetic processing and various internal abnormality detection means, each controller connected to the bus is connected to the bus and each of the buses is The bus recorder stores and updates the logic state on the line in a memory section, stops updating the memory section in response to a detection signal from the abnormality detecting means, and outputs the contents to the output device. Anomaly detection device for computers.
JP15724682U 1982-10-18 1982-10-18 Computer abnormality determination device Pending JPS5963746U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15724682U JPS5963746U (en) 1982-10-18 1982-10-18 Computer abnormality determination device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15724682U JPS5963746U (en) 1982-10-18 1982-10-18 Computer abnormality determination device

Publications (1)

Publication Number Publication Date
JPS5963746U true JPS5963746U (en) 1984-04-26

Family

ID=30346736

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15724682U Pending JPS5963746U (en) 1982-10-18 1982-10-18 Computer abnormality determination device

Country Status (1)

Country Link
JP (1) JPS5963746U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5583915A (en) * 1978-12-20 1980-06-24 Mitsubishi Electric Corp Data recorder
JPS5764853A (en) * 1980-10-08 1982-04-20 Toshiba Corp Bus tracing device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5583915A (en) * 1978-12-20 1980-06-24 Mitsubishi Electric Corp Data recorder
JPS5764853A (en) * 1980-10-08 1982-04-20 Toshiba Corp Bus tracing device

Similar Documents

Publication Publication Date Title
JPS5963746U (en) Computer abnormality determination device
JPS59108942U (en) Computer system self-diagnosis device
JPH0114616B2 (en)
JPS58150184U (en) Vehicle abnormality warning device
JPS60153355U (en) Multi-CPU system control device
JPS596202U (en) Sequence control device
JPS59100346U (en) Microprogram operation storage device
JPS6074061U (en) Yaw angular acceleration and lateral acceleration detection device
JPS63192843U (en)
JPS60135939U (en) Processing device runaway detection circuit
JPS59138928U (en) process output circuit
JPS58138147U (en) Internal state saving device in case of central processing unit malfunction
JPS5934326U (en) Vehicle fuel consumption display device
JPS60170854U (en) microcomputer
JPS6124900U (en) selection circuit
JPS6151548U (en)
JPS59107800U (en) Computer system function check device
JPS6087047U (en) Control device
JPS6071964U (en) Dual port RAM
JPS5938457U (en) recording device
JPH0214152U (en)
JPS61256449A (en) Bus diagnosis system
JPS5827265U (en) Elevator operating status recording device
JPS5881657U (en) Abnormality detection device for computer systems
JPS5988749U (en) CPU monitoring device using watchdog timer