JPS5969950A - Forming method for multilayer wiring - Google Patents

Abstract

PURPOSE:To prevent the generation of a leakage between the layers of wirings even though the smoothing treatment of an inter-layer insulating film by forming the inter-layer insulating film on the wiring of the first layer on a substrate, smoothing the inter-layer insulating film, coating the film with an inter-layer insulating film again and forming the wiring of the second layer on the inter- layer insulating film. CONSTITUTION:The Al wiring 2 is formed on the Si substrate 1, the whole surface thereof is coated with an Si nitride film, and the Al wiring 2 is coated by growing a plasma nitride film 3. A photo-resist film 4 is applied, the substrate 1 is turned through Ar ion milling, Ar ions are implanted, the film 4 is smoothed through etching until the plasma nitride film 3 is exposed, and the Si substrate 1 is washed by an organic agent. A plasma nitride film 5 is grown on the whole surface again, and the second layer Al wiring 6 is formed on the nitride film 5.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming multilayer wiring, and more particularly to a method for forming a smooth interlayer insulating film.

Generally, in order to form multilayer wiring in an integrated circuit, it is necessary to smooth the glabella insulating film in order to eliminate disconnections and short circuits at stepped portions. For example, polysilicon mtt
In c, a PEG film containing phosphorus is formed and heated at approximately 1000°C.
There is a PSG flow method in which a PEG film is flowed and smoothed at a temperature of . However, since this polysilicon has a high wiring resistivity, if an attempt is made to use aluminum wiring, the PSG flow method cannot be used because this aluminum cannot withstand temperatures up to 1000°C.

For this reason, several methods have been proposed for smoothing the glabella insulating film by dry etching. One of these smoothing methods is to form aluminum wiring and cover it with a plasma silicon nitride film as an interlayer insulating film, then apply a resin liquid to reduce the surface difference, and select the incident angle of Ar ions by ion milling. There is a method of smoothing the interlayer insulating film by etching until the resin film is removed. For the resin film, photoresist, polyimide, etc. are used, and argon A
By changing the incident angle of r ions, the etching rate of the resin film and interlayer insulating film is adjusted so that the film becomes smooth.

Another method is to apply a thick layer of resin liquid onto the interlayer insulating film that has a difference in level, and take advantage of the smoothness of the coated surface to create etching conditions where the etching speeds of the resin film and the interlayer insulating film are approximately equal. There is a method in which the resin film is etched until it is completely removed, and the smoothness of the resin film surface is transferred to the interlayer insulating film. This resin liquid uses photoresist, polyimide, etc., and the dry etching method uses cylindrical plasma etching, parallel plate type pnisma etching, etc., and the etching speed is adjusted by changing the amount of 02 added to the CF4 gas. It is.

However, in these methods, when the interlayer insulating film is smoothed [the 1'i interlayer insulating film is inevitably thin], when the second layer wiring is formed, the first and second layers are There is a problem in that leakage tends to occur between the wiring lines. This is especially noticeable when the interlayer insulating film is etched to a large extent.

This phenomenon can be confirmed as follows. However, if a smoothed substrate is immersed in concentrated phosphoric acid at 70°C, it will become diluted.
The wiring will melt in spots, and if the interlayer insulating film is etched to a large extent, both sides of the wiring will partially melt. From this result, A
There are small pinholes and cracks on the A wiring, and 't! It can also be seen that when the interlayer insulating film is etched too much, the side walls of the wiring partially protrude. In general, the insulating film grown at the corners has poor crystallinity, so the etching rate is poor, and it is thought that holes are formed at the corners of the A7 wiring and the particulate protrusions (hills) of the wiring.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming multilayer interconnections that solves all of the above-mentioned problems and prevents leakage between interconnect layers even after smoothing an interlayer insulating film.

The structure of the multilayer wiring forming method of the present invention is that an interlayer insulating film is entirely formed on the first layer of wiring on a substrate, this interlayer insulating film is smoothed, and then an interlayer insulating film is coated again. It is characterized in that a second layer of wiring is formed on top.

Hereinafter, the present invention will be explained in detail with reference to all drawings.

1 to 5 are cross-sectional views illustrating the entire manufacturing process of an embodiment of the present invention in order. First, as shown in FIG.
, an A7 wiring 2 having a width of 2.0 μm is formed, and a plasma nitride film 3 is grown to a total thickness of 20 μm to completely cover the A1 wiring 2. next,
As shown in Figure 2, photoresist film 4'r 1.0μm
As shown in FIG. 3, the flat substrate 1 is rotated by Ar ion milling and &r ions are implanted at an incident angle of 30° to etch and smooth the plasma nitride film 3 until it appears.
The i-substrate 1 is organically cleaned. Next, as shown in FIG. 4, a plasma nitride film 5 is again grown to a thickness of 0.5 μm over the entire surface, and a second layer A7 wiring 6 is formed on this nitride film 5 as shown in FIG.

When the leakage resistance of the multilayer wiring formed in this way was investigated on 50 3-inch S+ substrates, the resistance values between the first layer and the second layer were all 10 MΩ or more.

In addition, in the case of a conventional interlayer insulating film that has only been smoothed, 20
Regarding the average leak resistance of the points, 1 to 2 IOKΩ,
5 pieces of 10-100 pox Σ, 7 pieces of 1100K-IΩ, I
There were 11 pieces with MΩ to iouΩ, and 25 pieces with 10 MΩ or more.

Note that the effect can be seen from the thickness of the plasma nitride film 5 to be coated again in this example from about 0.2 μm. and,
Due to the smoothing process, there are no new lines due to steps in the second layer wiring. Further, in the embodiment, a plasma silicon nitride film is used as the interlayer insulating film, but a silicon dioxide film, a -silicon oxide film, a PSG film, a silicon nitride film, etc. formed by vapor phase growth or sputter deposition may also be used.

As described above, according to the present invention, there will be no leakage between the wiring layers in the multilayer wiring, and no disconnection will occur because the interlayer insulating film is smoothed.

[Brief explanation of the drawing]

FIGS. 1 to 5 are cross-sectional views illustrating embodiments of the present invention in the order of manufacturing steps. In the figure,

Claims (1)

[Claims] An interlayer insulating film is formed on the first layer of wiring on the substrate, and after this interlayer insulating film is smoothed, the interlayer insulating film is covered again, and a second layer of wiring is formed on this interlayer insulating film. A multilayer wiring formation method featuring Koturu.