JPS5998247A - Voice output device - Google Patents

Abstract

PURPOSE:To select the tempo of voice report in accordance with the purpose of use, by providing a key, which selects voice generation time intervals between digits of numerical information, and a means which counts the selected time intervals, and outputting a voice at intervals of a time prescribed by the counting means. CONSTITUTION:In case that numerical information is reported continuously by a voice generation interval switch 9 on a keyboard KU of an electronic calculator, intervals between the voice and the voice are designated by the switch 9. These intervals are displayed by LEDs L5-L8, and a normal electronic calculator mode N and voice report modes V1-V3 are designated by a mode designating switch 6 and are displayed by LEDs L1-L4. The output of the keyboard KU is applied to a central processing unit CU on an LSI, and addresses of rows and columns are designated by counters N1 and N2 of the unit CU and are processed by an address counter VAC, accumulator ACC, and a buffer register B for display. An RAM is controlled in response to the key operation on the keyboard KU to select the tempo of voice report in accordance with the purpose of use.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a voice output device such as a voice calculator that notifies numerical information by voice.

Conventionally proposed voice calculators have the disadvantage that, because the time interval between voices is constant, if the tempo of the voice notification is too fast, the user may miss the message or make transcription errors, which is a problem. If the tempo is too slow, there is a drawback that it takes too much time to check the contents of the notification.

The present invention allows the tempo of voice notification to be slowed down or fastened depending on the purpose of use.

That is, fl+ The present invention provides a calculator that outputs numerical information only by voice.

(2) The present invention also provides a calculator that outputs numerical information in the form of a numeric display and voice.

(3) Furthermore, the present invention provides a calculator that can be equipped with a printer in the above (+) and (2).

(4) The present invention provides a calculator provided with a voice notification start instruction key.

(5) The present invention provides a calculator in which the numerical keys, arithmetic keys, etc. on the keyboard are also used as the start key. Provide a calculator that tells you how to start.

(7) The present invention provides a calculator that automatically notifies at least the calculation result by voice after the calculation is completed.

(8) The present invention provides a calculator that audibly notifies only numerical information stored in a predetermined register.

(9) The present invention provides a calculator that continuously outputs all digits of numerical information to be notified by voice in digit units by operating a voice start key.

(10) The present invention allows all digits of numerical information to be notified by voice to be notified in units of n digits (n: 2) by operating the voice start key.
To provide a calculator which automatically outputs all digits as voice while dividing each digit (above integer) and speaking.

The voice generation interval in the delimiter portion is set to be longer than the voice generation interval between digits within one unit.

θυ The present invention provides a calculator that audibly outputs one digit of numerical information each time a start key is operated, and that audibly announces all digits of the numerical information by operating the key a number of times the number of digits of the numerical information.

(2) The present invention provides a calculator in which numerical information is sequentially announced by voice starting from the upper or lower digits at 0υ.

03 Misfire 1 provides a calculator that continuously outputs one unit of numerical information divided into n digits and to be notified by voice in units of digits by operating a start key.

a→ The present invention provides a calculator that outputs a different unit of numerical information as a voice each time a key is operated in the above α-increase.

αθ The present invention provides a calculator that outputs audio output of the lower units in order from the upper unit in the above αΦ.

(To) The present invention provides a calculator that divides numerical information into n-digit units in the above (!0), α■, 04), and α5) based on the digit having a decimal point.

Q? >The present invention provides a calculator that outputs only the numerical information below the digit board specified in advance in the above (9) to exclamation.

Alpha rays The present invention provides a calculator that automatically outputs the information below the decimal point as voice in successive digit units in (10) to alpha above.

(a) The present invention provides a calculator in which invalid zeros are not outputted as audio in the above (9) to (to).

(A) The present invention provides a calculator in (10) to α9 above, which outputs audio with a decimal point when outputting audio of 10° digits and/or 10' digits of numerical information.

(21) The present invention provides a calculator that repeatedly outputs the numerical information aloud in response to the operation of the voice start key in (9) to (e) above.

(22) The present invention provides a calculator in which, after a predetermined key operation outputs all digits of the numerical information to be voiced, the numerical information can be voiced again by performing the same key operation as above. provide.

<zl The nuclear power plant rl11 provides a calculator that continuously outputs numerical information with a constant voice generation interval (pause period between voices) between digits.

(24) Misfire 81.1 provides a calculator that can adjust the voice generation interval in the above item 3).

(25) The present invention provides a calculator according to the above (24), in which the interval of sound generation can be adjusted by switching a slide switch.

j2 [ij Misfire 1 is the voice stop key that temporarily stops the voice notification during continuous voice notification of numerical information, and after stopping, continues the voice notification of the remaining numerical information. Provide a calculator with a restart key.

(2η) The present invention provides a calculator that performs voice stop and voice restart using the same key in the above (2(2)).

(28) The present invention provides a calculator configured to stop the audio notification only while the keys in (27) are being operated, and to restart the audio notification after the key operation is released.

(29) The present invention provides a calculator in which the audio restart is performed using the audio start instruction key in the above (26).

(30) The present invention provides a calculator in which, in the above (26) to (29), when the voice is restarted, the numerical information is voiced again from the beginning.

(31) The present invention provides a calculator that is provided with a repeat key for re-notifying numerical information by voice from the beginning during continuous voice notification of numerical information.

(Dark) The present invention provides a calculator in which the voice start key in (31) above or the voice stop key in (c) above also serves as a repeat key.

(33) The present invention provides a calculator that can provide voice notification of numerical information in any of a plurality of types of voice notification modes in (+), (2), and (3).

(34) The present invention provides a calculator that can select any one mode in the above (33).

(35) The present invention provides a calculator that allows the selection in (34) above to be made by switching a slide switch or replacing the ROM.

(36) The present invention provides a calculator provided with means for notifying the voice generation interval or type of voice mode selected in (25) and (35) above.

(3η) The present invention provides a calculator in which data to be generated as audio is stored in a ROM as a digital signal.

Embodiments other than those described above will be easily understood from the description of the following examples.

FIG. 1 is an external view of the calculator of the present invention, where l is the calculator body;
2 is a number display, 3 is a speaker, 4 is a power switch, 5
is a key switch, 6 is a mode designation switch, and when the knob is set to the position of a symbol 8 indicating the type of audio notification mode that can be notified, numerical information is announced by voice in the corresponding notification mode. 7 is an LED for notifying which mode the switch 6 has selected. Reference numeral 9 denotes a sound generation interval adjustment switch, which is configured such that when a knob 11 is set to the position of a symbol 10 that indicates the sound notification interval, numerical information is announced by sound at the corresponding notification interval. 12 is an LED for notifying which voice notification interval the switch 9 has selected.

VK is a voice start instruction key, and when this key VK is operated after the calculation result is obtained, the calculation result is announced by voice in a predetermined voice notification mode. The VK key also serves as a repeat key, which is operated when it is desired to repeat the audio notification of numerical information from the beginning while the numerical information is being continuously notified by voice.

S uses the voice stop key to temporarily stop voice notification when this key is operated while numerical information is being voiced. If it is desired to notify the remaining numerical information by voice, the S key may be operated again.

Further, as shown in Fig. 2, the calculator has a keyboard KU, an LSI containing the main circuits, a display section 2, and an audio output section O5.
It consists of four parts B.

The sound generation interval adjustment switch 9 on the keyboard KU can specify the pause intervals 81 to s4 between voices when numerical information is continuously notified by voice. 81
~S4 represents, for example, 0.5 seconds, 1 second, 2 seconds, and 4 seconds, respectively. L5 to L8 represent LEDs that display which pause interval is designated by the switch 9. The output of the switch 9 is introduced into the LSI. Furthermore, the mode designation switch 6 on the keyboard KU allows you to select normal mode N (mode that does not generate sound), which is designated when using it as a normal calculator, and three types of sounds, 41a mode 1'.
OL1-L that can specify VI, V2, ■3
Reference numeral 4 represents an LED that displays which mode is designated by the switch 6. In addition, mode designation switch 6
The output is introduced to the LSI as an instruction output.

The above three modes v1 to V3 are modes in which numerical information is announced by voice as follows.

(Vl mode) This is a mode in which all digits of numerical information are continuously announced by voice with one operation of the voice start key VK.

(Example 1) In the case of ``r012.345.6'', VK key operation → ``Ichi''``2''1゛san''yon''``go''
``Ten''``Roku'''' is the voice announcement.

In this case, an invalid zero is not uttered. In addition, a certain audio pause period is provided between the decimal point part and the three-digit separator part based on the decimal point, that is, "P2" and "SAN" and "TEN" and PAROK, The division between parts and decimal parts is also made clear on the audio announcement.

(Example 2) In the case of rO+, 28456J, VK key operation → "Ichi ° Pachin"゛2"゛San-pa-yon"゛Go-Go-Go-Go-Go-Go-Roku'' is announced.

In this case, the numerical value in the decimal part is continuously announced by voice, and there is no voice pause period for every three digits.

(Example 3) If the VK key or S key is operated during voice notification in this mode, the following will occur.

r012.845.6'', VK key operation → ``1''2''゛ゝsan'' → VK key operation → ``1''2''1'''Yon'' Go ``Ten++
``If you press the VK key in the middle of a voice notification like Rokun, even if the voice notification is in the ``san'' mode, it will immediately return to the first digit ``Ichi'' and start the voice notification from the beginning again.

If you operate the S key in the middle of voice notification, VK key operation → ゛ichi ``2'' san n → S key operation... Stop voice notification → S key operation again → Payonpa'Go' → S key operation.・・Voice notification stop → S key operation again → Sound notification stops with S key operation like a snap “Parok”′
The remaining numerical information will continue to be announced by voice by re-keying the key.

[V2 mode] This is a mode in which only the negative digit of numerical information is sequentially announced by voice each time the start key VK is operated.

(Example) In the case of "r123.456", a voice notification is given as follows: VK key operation → "ichi" → kuniara → "san""ten" → yong → "go → "roku+1". In this case, when the decimal point digit "3" is audibly announced, the decimal point is also audibly announced at the same time.

Also, if the value is invalid, no audio notification will be made.

[Va mode] This is a mode in which numerical information is divided into three digits based on the decimal point each time the start key VK is operated, and three digits are sequentially notified by voice.

(Example 1) r12345678,” VK key operation → “Ichi I” “2” → “San”’Yon 1111 gon → “Roku゛Nana” “Hachiη ゛Ten” In this case, if you divide the above numerical value into every 3 digits, “ 12” “345”
” and “678”, so only the top two digits are voiced. Of course, if it is disabled, no audio notification will be made.

(Example 2 Nr1234, 5678JVK key operation → ``ichi'' → ``two''``ten'' → ``go''``rok''``nanahachi''' In this case, the decimal part is 4 digits, but the decimal The numbers are announced continuously by voice regardless of the three-digit separation.

The key operations on the keyboard KU, such as -, are the L S
It is transmitted into the LSI via the external terminal of I. ,”−
The LSI is composed of a random access memory RAM that functions as a register, a read-only memory ROM that stores control program constants, etc., and a central processing unit Cu that performs logical processing. This processing device Cu includes a counter Nl for specifying the column position of the RAM, and a counter N2 for specifying the row position. Address counter VAC, accumulator register A that specifies the RQM address
C.C.

A display buffer register B and means for its low logic processing are provided, and predetermined control operations are performed in response to key operations on the keyboard KU.

In the above configuration, when a numerical key on the keyboard KU is operated, coded numerical information is stored in a predetermined position in the RAM via the accumulator register ACC, and this R
The contents of the digits in AM are supplied to the display unit 2 via the ACC buffer register B.

Japanese voice data corresponding to the numerical values +T O++ to +゛91Z (,), ie, "ichi", "two", "paisan" 618, etc., are stored in advance in the ROM as digital codes like other control programs.

The above audio output part O5
When the word is generated from B, the address counter VAC is set to the initial address of the ROM where the word is stored. Then, the digital signals in the ROM are sequentially derived and supplied to the audio output section O5B via the central processing unit, so that a predetermined audio signal is output.

The audio output section O5B is a digital-to-analog converter 1) A1 that converts a digital signal into an analog signal.
It consists of a low-pass filter LPF that converts the output of this converter DA into an analog audio wave, and a driver Dr that drives a speaker SP in response to this analog audio wave.

The outline of the calculator of the present invention is as described above.
This will be explained in more detail with reference to FIG.

FIG. 3 is a block diagram of the main parts of the Kienori 1 calculator, and the same parts as in FIG. 2 are designated by the same symbols. Further, ■ indicates a micro order, and 0 indicates a determination means. In the figure, X in the RAM is a numeric register that stores numbers or calculation results, Z is a zero suppression register that is also used for calculations, W is a register for audio output, and X is a register for storing decimal point information, all of which are 1.
The digits are in units of 4 bits. Writing to and reading from each digit of each of the above registers is performed through the accumulator register ACC. When storing information in the i-th digit of the register in the above RAM, for example, the X register, the row code NX corresponding to the register
After storing the binary coded decimal code of i in the counter N1 and selecting the row and column direction of the RAM, the contents of the accumulator register ACC are transferred to the RAM 1. The contents of the counter N2 are microorder@.

Determined by [phase]. Further, the counter Nl is an up/down counter, and its contents are increased or decreased by an adder/subtractor AD. That is, AD works as an adder when there is a micro-order [phase], and works as a subtracter when there is no [phase].

Note that in this embodiment, it is also a requirement to transfer the contents of the Z register to the W register;
Information is transferred via AGI, but in reality the following operations can be repeated. That is, first N
1. Select Zi in the RAM using the N2 counter and read the contents of this Zi to the ACC. Next, R with Nl and N2 counters.
Select Wi in AM and store the contents of ACC in wt.

This is repeated for n digits.

Counter C is a down counter for creating a puncture signal, and SB is a subtracter.

Microorder [phase] is used to clear counter C and O is used to set the contents of counter C to '2'. The punctuation signal is generated every 3 digits with the decimal point as a reference, so when the decimal point is detected, the counter C22 is set and every time the decimal point changes, -
1, when the counter C=0, that is, the judgment means JCO is
A puncture signal may be output when "0" is detected.

ROM Il"i IJ-only memory, in particular only the voice data storage section is shown. To derive the numerical voice data stored in the accumulator register ACC, input the initial address of the language corresponding to the contents of ACC to the address counter VACK. Set.

Since the counter V to C automatically counts up at the final step of this language block, for example, "2'", the audio data for "P2" is sequentially derived from RO.I) A
When the END code provided at the last step of each language block supplied to the converter is output from the ROM, the EN
The D code detector JE is activated, the counter VAC is reset, and the next control is started. The speaker SP may be driven all the time, but since noise etc. will be generated, the power supply is turned on only during audio notification.
s is supplied to the driver Dr.

When to apply the power supply PS is controlled by the flip-flop Fsp and the gate AG. Counter G is a down counter for counting voice pause intervals, and GSB is a subtracter.

Switch 9 is a switch for selecting the audio pause interval as described above, and is used to select any of the constants nGl to nG 4.
It is selected by AG2 to AG5 and supplied to counter G. The constants nGI to nG4 have a relationship of nG I < nG2 < nG3 < nG4, and the one introduced into the counter G by the micro order [phase] becomes the initial value for time setting. The content introduced into the counter G is decremented by ``1'' every time a micro order ■ occurs thereafter.When the content of the counter G becomes 0'', the judgment means JG=0 detects this and performs the next operation. FT is a flip-flop whose state is reversed each time the S key is pressed. This state is detected by the judgment means JFT in the flip-flop.VT is reset by the micro-order [phase] in the R S type 7-renobu float which is set by the operation of the VK key.JVT is the state judgment means of the flip-flop VT. The above flip-flop FT
, VT are auto-cleared when the power is turned on (both are reset by No. ii ACL).

FI~F7. FD is R5 type flip-flop, JFI
~JF7. JFD, JKV, and JVI to JV8 are determination means, respectively. Also, when JACC1=1, the contents of the first pit of accumulator register ACC are ll, I+
means for determining that JACCI=0, JAC
C2=I and JACC4=O are also similar judgment 'rJ1 means.

"RAM, ROM, DA in 2nd figure 3.

L P F , D r , S P , p S ,
KU is used in CU in FIG. 2 except for U.

Next, the voice notification operation when "r0001284.5" is obtained in the X register as the calculation result will be described.

The contents of the x and X registers immediately after the above calculation results are obtained are as shown in FIG. 4, and Z and W are all +T OI+. Immediately after the calculation result is found, the zero suppress operation that is not displayed automatically starts. When this operation is completed, the contents of registers X, X, and Z are as shown in Figure 4, and W is "0". Noma1. This state is the voice start key VK
It will not change unless it is manipulated.

The bits in each digit of the Z register have the following meanings: 4th bit = 1... This means that the corresponding digit of the X register is a significant digit.

4th bit -0...Indicates that the corresponding digit of the X register is an invalid zero digit.

1st bisotonite...Means that the corresponding digit of the X register is a decimal digit. 2nd. The third bit has no particular meaning.

In the calculator of the present invention, only the digit of the X register corresponding to the digit where the fourth bit of the Z register is 1'' is displayed, but a detailed explanation will be omitted.

In this state, if you operate the voice start key VK, the information for outputting the p-mouth voice shown in Figure 4 will be input to the W register (L), and then the voice notification will be sent every 11 times.75=This explanation 1. Each bit Wn of each digit Wn of the above W register is input to AiJ.
The meaning of i will be explained in advance.

Wn+: 1st bit = 1...Means that the corresponding digit of the X register is a decimal number.

Wn2: 2nd bit = 1...Means that the corresponding digit of the X register corresponds to the punctuation digit.

W n 4: tg 4 bits = 1...
...Means that the corresponding digit of the X register is a significant digit.

Therefore, by looking at the contents of each digit of the W register in FIG. 4, the following can be seen.

W1-W5・・・・・・・・・Significant digit W2 ・・・・・・・・・Significant digit, decimal point digit, 74
Invalid digit [Operation theory with reference to the flowchart in Figure 5] ] FIG. 5 is a flowchart showing in detail the operation of the calculator of the present invention. In the figure, the initial state is register X + X +
z is in the state shown in FIG. 4, and the contents of the W register are 0''.No means that the operation of determining the operation of the voice start key VK is repeated in 115 steps, and the determination means J is in the state shown in FIG.
KV force; used.

In this step no, when JKV=0 (no operation of VK), the same step is repeated, and when JKV-1, the process moves to the next step old. nl is a step of determining whether the operation of the voice start key VK is the first operation after the end of the calculation or the second or later operation, and is achieved by determining the state of the flip-flop F1 by the determination means JFI.

That is, the flip-flop Fl is set in response to the VK key operation, and when Fl-0, the first V
It is a K main key work, and when F ] = 1, it is determined that it is the second or later work. F1=0 for the first VK main key work
The NO branch is selected and the routine moves to an audio output information creation routine nll consisting of steps n2 to n17. This routine stores the fourth register in the W register based on the contents of the X register.
In the routine that stores the information as shown in the figure, this information allows V
Various sound generation in 3 modes from 1 to 2 can be obtained. The detailed operation of this routine nll will be described later. ml is related to the case where the audio is repeated in the step of resetting the R3 type flip-flop VT that stores the VK main key operation.

Reference numeral n12 is a mode determination routine consisting of steps n18 to n2o++ for determining which mode the mode designation switch 6 is in, and JVI to JV3 are used.

For V1 mode, flip-flop F5 for storing V1 mode
．． For V2 mode, flip-flop F4 for storing the mode
．． For V3 mode, flip-flop F7 for storing the mode
are set respectively. In this way, a dedicated 7 lip 7
The reason why the 0 tab is provided is that even if the designation of the mode designation switch 6 is changed during the voice notification, the numerical information will be voice reported until the end in the mode before the change.

n13 is a routine that determines whether the decimal point digit is a punctuation digit or another digit, based on the bit contents of each digit of the W register, and the corresponding flip-flop is selected based on the determination result. is set.

n14 outputs the contents of the digit of the X register corresponding to the digit of the W register determined in the above n13 routine to the accumulator register ACC [$J, and generates a voice in the language corresponding to the contents of the accumulator register ACC by the operation described above. It's a routine. In this routine n14, voice notification for one digit is normally performed.

Reference numeral 138 is a step for determining whether or not the audio notification has been made at the lowest digit Xlt of the X register, in which determination means JNI is used. If voice notification is performed at X1 digit 1, numerical information has been voice notified in - ways, so the process moves to voice notification end r routine n15 regardless of the V1 to ■3 modes. Also X
If it is other than 1 digit, j:',)'+j It is determined that the notification digit remains, and the process moves to the next digit selection routine n16.

The 8-voice end routine n15 is a routine that resets the flip-flops that have been reset seven times in the routines nll to n14 and returns them to the initial state.

The next digit selection routine n16 selects the lower digit of the voice-announced digit, determines which mode is Vl-V3, and then selects whether to return to the initial state or move to the nl routine.

The n11-i routine uses flip-flop F5. VT.

Determine the state of the FT and stop the voice notification, then
This routine selects whether to return to step 51 or step n1.

The flowchart of the calculator of the present invention is thick as shown above.
Ql n II m lI n3 B step and n
It consists of routines 11 to n1□.

Next, the operation of each of the above routines will be explained in detail.

(nJ routine) This routine is selected by pressing the VK main key for the first time after the calculation is completed or by pressing the VK main key during audio notification in ■1 mode. Using the decimal point digit and significant digit of the X register as clues, "I" is stored in the 2-bit Wn2. In the flowchart of FIG. 5, "■" represents a micro order, which corresponds to the micro order of FIG.

In this routine n 11 , Fl is set (n2 step), and the contents of the X register are transferred to the W register (na step. Next, the counters Nl, N
After specifying the W1 digit in RAM by storing +11” and NWt in 2, respectively, write this digit W1 from RAM.
Take out the contents of to accumulator register ACC (n
4-n6).

The next "7" n16 step is to obtain the decimal point, and the first bit ACC of the ACC register is
If ACC, = 0, count up the N1 counter (n16 step) and take out the next digit' (HACC register). This operation kAcc, == I K Since ACC,=1, the decimal point digit is stored in the accumulator register ACCK.In this example, since WILri is "1000" and ACC,=0, the Nl counter is counted up to 1. 2” and W2→
When ACC, ACC,=1, and it can be seen that W2 is the decimal point digit. The n8 step is to set the counter c = 4 ``o'' in order to prepare for the setting of the punctuation digit. n]+If the digit taken out to the CC register in the step of determining the end condition of the routine is the most significant first digit of the W register,
It operates so as to stop the subsequent operation and return to the n1 step. The determination means JNI is used for this purpose.

n1o~n15I n+□ step is 1 in the 2nd bit of the puncture chain digit every 3 digits based on the decimal point digit.
” is to be memorized.

That is, the step of determining the n, on counter C20 by the determining means JC, storing ``1'' in the second bit of the n, 2 HACC register, and then transferring the contents of this ACC register to the designated digit in the RAM. This is a memorizing step. n12 is a step for setting the counter CK "2" and plays an important role in obtaining the punctuation digit, similar to the n1□ step for counting down the contents of the counter C. n13゜n, 4HW register next digit 1 Acc
This is the step of taking out the digit into the register, and "+5" is the step of determining whether the taken out digit is a valid digit or an invalid digit using '1JACC4. If it is judged as an invalid digit in n15VC, N1-1 is taken out in one step of n. After that, go back to step n and step 5. This is because the voice is not output for invalid digits.If it is a valid digit, go through n9→n10 and perform step n1□.

Now, in this example, if we execute the ng+ng step after determining that W2 is the decimal point digit in the n7 steps and reach the nIQ step, then since it is C-0, we move to the nII step and the second bit of the ACC register at this time is ACC2.
++ is set in micro-order [phase]. Therefore, ACC=
1011, and +011 is stored in W2. The decimal point digit does not need to be a puncture chain digit, but in order to efficiently use the n1O1nl+step required to set the puncture chain digit 1→ACC2 when C=0, this step is also used for the decimal point digit for convenience. is passing through.

Here, 2 → C is performed, and then W3 → ACC.
Since 13=1000, the process moves to the n91nIO step. nl while C=2 in the nIQ step.

The process moves to step C-1=1. This l】13
→"+4-→n9→n10-+n17→n13 is repeated until C=Oi/(. Therefore, in this example, W3→ACC, C=2: W4→ACC, C=
1: W5→ACC, C=0, and when W5 is taken out to the ACC register, it becomes C-0. This time of C20 corresponds to the third digit counting from the decimal point digit, which is the puncture chain digit. When C=0, 1d:n]+step is selected, so that P1'' is stored in the second bit of W5, which corresponds to the punctuation digit.

In the following step n12, 2→C is performed again, so if there is a significant digit in the higher order digits than this digit W5, the same operation is repeated to obtain the next bank chain digit. In this example, ACC is performed at "1BIn+4 (W6-)", but since ACC4=0 in n steps, the shift counter Nl to "I11" is transferred to step 5n15.
is subtracted, the operation of the nll routine is completed, and the process returns to the n1 step.

With this, the operation of creating audio output information is completed.

[n1 step, m1 step, n12 routine] n
Since F1=1 in the 1st step, the YES branch is selected this time and the process moves to the ml step.

The 7 lip-flop VT was set by the previous VK main key work, but this step m! Since it is reset with , the previous operation is considered to be the voice start controller instruction. Since the flip 70 key stores the fact that the VK main key was operated during the VTfl audio notification, it is reset when starting from the first step.

The following n12 routine operates as described above, but if none of the V1 to ■3 modes are set, then n12. Return to step. In other words, even if the key VK is operated, the system returns to the initial state without generating any sound.

In this example, assuming that the Vl mode is designated, the flip-flop F5 is set at step n and step n21 at 8, and then the process moves to step n51.

Cn1a Routine] In this state, the counter N1 is set to NW, and the counter N
2 stores 5, and the content 101O of W5, which corresponds to the most significant digit of the significant digits, is retrieved from the ACC register (
n51 step).

The following steps n2□ and n23 are for determining whether the extracted digit is a decimal point digit, a punctuation digit, or any other digit. In the case of decimal point (ACC, = 1)
, a voice pause flip 70 knob F6 used for determining a pause to give a certain pause period after the utterance of the decimal point digit and distinguish the decimal part from the integer part vocally: Flip 70 knob F3 to remember that it is a decimal point digit :
and set the flip 70 knob FD to indicate that the digit to be extracted from now on is the decimal part digit (n
24' (25+26 step) 0, or if it is a puncture chain digit (ACC2=1), set the flip-flop F2 for storing punctuation digits.If it is any other digit, go directly to step n28 without asking. In this example, since ACC2=I, ACC,=0 at W5→ACC, the F2 flip 70 knob is set and the process moves to the n14 routine.

[n14 Routine] This routine outputs the numerical value of the digit in the X register corresponding to the digit determined in n I g above.

The n2B step and step store the NX code in the counter N2 to specify the corresponding digit of the X register, and the next n2
Through 9 steps, the digit of the X register corresponding to the digit determined in n13 is taken out to the ACC register. In this example, the old X52oo is extracted to the ACC.

nao is for setting a flip-flop SP for turning on the power Ps to the speaker SP.

ROM of audio data corresponding to the contents of n3, 1jAcc
All addresses must be set. In other words, by moving the contents of ACC "0001" to the address counter ACCVc, the ininya/l of the 1" area of the ROM is
/7L/Suwo setting. address counter VACt,
After L, it runs free until the END code arrives, and supplies the audio data in the ROM to the tDA converter. For this reason, speaker S
"1 n" is generated from P. When the END code is derived from the ROM, "C" is detected by the determination means JE, and n3
Move from 2 steps to n31 step on 33 c
-1 flip-flop SP? : This is a reset step. Numeral n34 is a step provided for adjusting the pause period between voices, and consists of three steps n341-n343 as shown in FIG. ``1 step of 34 is a constant corresponding to the period specified by the adjustment switch 9, for example, n.
G 2'it: Counter G by micro order @
It is intended to be introduced to

2 in n34 is a step for determining whether or not the content of the counter G is 00", and the determining means JG is used. If G is 0, it is assumed that the voice is in a pause period, and the process moves to step 3 in n84, and the function of the micro order O is executed. Execute the countdown.

This operation is repeated until 'kG=0', and when 'G=0', it is determined that the audio pause period has ended at step n34, and the process proceeds to step n85. Initial value n G 2 k count The period from the introduction of GVC to the time of G-OVC is defined as an idle period and is expressed as 'kDL I. DLI is 1 second in this case.

JF3 is used in n35 in the step of determining whether the digit just uttered is the decimal point digit. For decimal place 'n:
161 n37 step is selected, and if there is no decimal place, n38 step is selected. n36゜n8□ is a step to make the decimal point digit and then the decimal point ゛tenlIwo be uttered. After resetting F3ffi,
Initial address for decimal point I) Take out to P C1AcC register. And nao-na5 for voice notification
Execute the steps in sequence, and use the speaker Sr to
utter. When you come to n35 again, it will be F320, so be sure to move to n88 step. In this example, X5=000
Since it is 1 and is not in the decimal place, it moves to step n38 without passing through the n361"3□ step.The 13g step determines whether the series of voice generation has ended, but in this example, it is X5, so it moves to the nI6 routine. .

[n16 routine] 143+144fl -1 of the digit of the X register that was notified by voice
This is a step in which the contents of counters Nl and N2 are set to (N, -1) and NW, respectively, in preparation for taking out to the digit 1 Acc register of the W register corresponding to the lower digit.

JF4 is used in the step 5 to determine whether or not the mode is ntriV2 mode. When in V2 mode, F4=
1, so select the YES branch. Return to step. In this example, if V2 mode is specified, n43' =4 in 44 steps, N2=N
Where it was marked W, it was n. The process returns to the step, so after uttering "Ichi", no voice will be uttered until the next VK primary key operation is performed. If the VK primary key is operated, n1→n −+n −+
The operation is 18 1 in the order of 1 of n → n51...
9 19 Proceeds, and the "2" of X4 is pronounced as "two".

In this example/I'i Since the mode is not V2 mode, proceed to step n46. In this step, it is determined whether the voice-announced digit is an integer part or a decimal part, and FD is used. In this example, since X5=1 and it is an integer part, it is determined whether or not the uttered digit is a punctuation digit using On4'8 digits F2 which moves to step n48. The X5 digit is a punctuation digit and F2=1, so “491
Select n50 step. n 4g + n 5
In the case of oI/i punctuation digits, this is to provide an extra utterance interval with the next digit. The second delay time DL2 is a proportionally long time (for example, about 1 sec). Note that since F2 is reset in step n49, it does not affect the next digit (!:t/'i. Move to m2 step, but in ■3 mode return to n step and prepare for the next VK key operation.In other words, in V3 mode, the sound generation fc-J stops at the puncture chain digit. In the example, the v1 mode is specified, so move on to the m2 step.Is the m2 step HVI mode?■3
This is a step of determining whether the mode is set. That is, m
2 steps are passed in ■1 mode and ■3 mode when the Nozank chain J digit is not present. In this example, the m
Two steps are necessary.

Note that even in the ■3 mode, if it is desired to perform a voice repeat operation or a voice stop operation for a non-puncture chain digit, the step number m2 is not necessary.

Since this example is the Vl mode, the YES branch is selected and the process moves to the m3 step.

The m3 step is a step to determine whether the flip 70-tub VT is set or reset.If it is set, it moves to the m5 step to perform a repeat operation, and if it is reset, it moves to the m4 step to continue generating the four sounds of the lower digits.
In this example, the VK key was operated at the beginning of drawing, but the VT was reset at m1 step. m4 step is selected.

The m4 step is a step for determining whether or not to stop the audio based on the state of the flip-flop FT. In this example, the S key is not operated at all, so FT=0, and the process returns to step 51. At this time, W4=1000 is taken out to the ACC register.This W4 is ACC2
Since it is -0, we move directly to the n2g step and after that, n29
~ Execute n35 and set the contents of the X4 digit of the X register to 2”.
The 4 digits of OX that announce the voice notification as "2" are neither the decimal point digit nor the lowest digit, so the following is n381 n43 + n4
41 ``451 Executes n46 step and reaches n4g step. n 4 BVI As mentioned above, the state of <F2 flip-flop is determined, but this time, since F2 = 0, it is determined that there is no punctuation digit. Move to n53 step.

Step n53 is for determining whether or not the mode is V3 using the state of flip-flop F7 as a clue. ■３
mode, the lower digits will continue to be announced by voice.
Select step 51. In other words, in ■3 mode, if a puncture chain digit is announced, for example, "'I", 'i voice notification, the next VK main key work will be in standby mode.
When a digit outside the punctuation digit board, for example, ゛2pa, is audibly notified, the lower digits are automatically audibly notified.

In this example, since it is not in V3 mode, it moves to the n52 step, and since it is in v1 mode, it passes through the n1□ routine and returns to the n51 step again as described above. After that, n again
When the 51st step is reached, W2=101 is written in the ACC register.
1 is retrieved, but by this time the audio is
“Pa’san” is being heard.

The pause period between ``1'' and ``2'' above is the 11th and 2nd.
The delay time 1) corresponds approximately to the sum of Ll and DL2, and is 1'
The pause period between “2” and “Sun” is the first delay time DL.
IVc is approximately equivalent.

[Audio repeat operation]

However, if the VK primary key is operated during step 34, immediately after the audio notification of ゛san, the 7 lip-flop VT is immediately set.The operation from step n3 to step m2 is as described above. However, the operations after the m3 step are different.

In other words, since HVT=1 at m3 step, Y
Select the ES branch and move to m5 step.

The m5 step is for resetting the HF5 flip-flop, and after executing this step, the process returns to the hn1 step. n
Since t/1FI=0 in one step, nl
+Select the routine, but the following actions will be performed first with VK.
It is the same as when operating the primary key, and the numerical information is announced again by voice as "1", "2", and "san" (voice repeat operation). Note that the VT flip 70 knob is reset when passing the ml step, so the operation VcH after the n18 step
No problems will occur.

In this way, the voice notification is repeated up to ``san'', and then ``ACC is performed when the step 51 is reached''; 7. Evening tLdW2=lu
11 is taken out 0 [, 7: H, voice stop operation] If you press the vcVK key all the way immediately after the voice notification of ``PASAN'' as described above, the voice repeat operation will be performed, but if you operate the voice stop key ST instead of the above VK primary key. For example, F i flip-flop is set.However, if the operation i, I: n 3
There is no change at all until reaching the 5~m2→m3 step. m3
Since VT=0 in the step, it is N this time. The branch is selected and the process moves to m4 step Vζ. In the m4 step, since the flip-flop ■ and go = 1, the YES branch (L- is selected) and this step m4vC remains. In other words, while Fi' = 1, the audio notification operation stops. If you press the S key again in this state, the state of the 7 lip flow knob F'r will be reversed and FT = 0.
becomes. Then, at the In 34th step, it immediately becomes N. The branch is selected and goes back +151 steps. This is similar to the case of the audio repeat operation in that W2=lull is taken out to the ACC register at step n51.

[Voice notification operation below the second digit of X] Now, since W2 is “1011”, ACC2-1
ACC=1, the decimal point is determined at 123 steps, and F6. F3. FD is set. n
In step 28-n34, the operation exactly the same as described above is carried out, and X2=4 is announced audibly as "Yon".

However, in the n85 step, since F3=1, n3
61 n3□l"30...n84 steps are selected and the decimal point 1'ten" is announced audibly. Continued<n3. In the step, F3=1, so the process moves to the n88 step.

The steps from n48 to "45" are executed below, and when the step n46 is reached, the n4° step is selected because FD=1. n4□ is the step for determining whether or not it was a voice notification with a decimal place, and is sent to JF6. Since the above X2=4 is the decimal point digit and F6=1, n steps are selected.The loop of n54+150+4 n5□ is a constant loop after the voice notification of the decimal point digit, as in the case of the puncture digit. This is provided to provide an audio pause period. Such a pause period makes it clear to distinguish between the integer part and the decimal part in the audio notification. Since it is reset at the flip 70 step F6un54 step,
It does not affect the audio notification below the first decimal place.

n5 □ Step 7i, since it is tVI mode, n1
□ Return to step n51 again via step -. If ■3 mode, n. The process returns to the step and waits for the next VK primary key operation. In other words, in the V3 mode, the sound generation is temporarily stopped when the decimal number is played.

In addition, in the above n4° step, when F620 is set, it is straight J'
&n s + Return to step. This is F6=0. FD
When = 1, that is, when the voice notification digit is a decimal part,
This means that all digits of the decimal part are voiced at a constant speed whether in the Vl mode or the ■3 mode. For example, N, 23456J 112” or less is n231
""381 n431 "4411°n47" n5
Through the loop of II n23, a voice notification of "2""SUMPAYON'""GO90" is made regardless of the Vl or V3 mode.

Now, when wt=tooo is fetched into the ACC register at step n51, since ACC,=0, n22→n28→・→n3. The step is executed and the contents of the X5 digits are announced audibly. In this state, N1
= 1, the YE-, S branch is selected at step n8B, and the routine moves to the audio notification end routine.

[nl, routine]

This routine consists of steps n39-n4°+n55+n56, including Fl, F4. F5. FD, F2. This is to reset each flip-flop of F7, and after this routine has passed, n. Return to step. In other words, it becomes an initial state, and audio notification is stopped. If the VK key is operated again at this point, the previously described operation will be repeated in its entirety, and the calculation results will be continuously announced by voice.

[V] Mode] As mentioned above, in the V1 mode, the voice notification is that ``r 12g4.5'' is ``Ichi'T ++ ++ 11 sun''''Yon υ ゞゞTENl', but in the middle of the VK main If you press the key, “Ichi 5” - “san” → “Ichi 11”
LL2"" Sana] "1 Yon" α Ten" τ1
If you press the S key in the middle of the notification, it will be ``Yes''.
++-111+san''→S key operation→Sound stops after this→S
Key operation again → “Yon” Ten” 1 Ko” as a reward J
[In case of V2 mode] When mode designation switch 6't is set to V2 mode,
There is no major difference from V1 mode except that F4 is set in one step of n19. However, in this mode, it returns to the 11° step after 11 steps, so the voice notification is performed one digit at a time each time the 5&:i VK key is operated. Between digits (1/Voice generation interval U or VK corresponds to the main key operation interval, so the operator can set it arbitrarily. In this mode,
Also, when the voice notification is made in the last year of the X Renstar, n will be announced via the n 1'5 routine. Return to step. Therefore, V
When you operate the K primary key, it becomes Fl-0 (n39
(Fl is reset in step), the n l 1 routine is executed, and the most significant digit [1] of the numerical information is audibly announced 41j times. The subsequent operation is exactly the same as the first sound)+j notification operation.

['In case of V3 mode] When mode designation switch 6 is set to v3 mode'
There is no major difference from the Vl and V2 modes except that F7 is set in the n20 step and the n and 7 steps.

In this mode, the numerical information r1234.5J, VK
Key operation→ “ichi” →α2η αsan” αyon＋＋ αten”→
Since it is announced as 1 (ko ゛) 5, the punctuation number digit ゛ ichi'
In this case, the n5o step, which gives a certain pause period after the decimal point digit and the decimal point digit, is meaningless.Also, if the last digit of the numerical information is audible, the nl
n via routine. Since the display returns to the Stellar screen, if you continue to operate the VK primary key, the nJ screen will be executed and a voice notification will say "I".

That is, if the VK main key is operated after the numerical information has been audibly announced up to the last digit, the numerical information can be audibly announced with exactly the same operation as the first operation.

The voice notification in the Vl-V3 mode is controlled as described above.

[Other Examples]

In the above embodiment, the voice notification of the calculation result is performed using the voice start key V.
Although this was done by operating K, it is also possible to automatically notify the calculation result by voice after the calculation is completed. That is, all occurrences of the computation end signal are detected and all n1 steps are executed.

[Other Examples]

In the above embodiment, the zero suppression register and the audio output register W are separate, but the zero suppression register Z can also be used as the W register. It would be nice to create a flowchart in which all the W's in the steps are replaced with Z's.

[Other Examples]

In the above embodiment, the control programs corresponding to each audio mode are stored in the same ROM, and the V I
-E -F ROM, V2 mode ROM.

■ Separate ROM' for each mode like 3 mode ROM'
The mode may be selected by preparing and replacing this as appropriate.

In this case, the mode designation switch 611- becomes unnecessary.

[Other Examples]

In Fig. 3, a T-type flip-flop FT is added to the voice stop key S, but if this FT is removed, the S
The structure is such that the sound generation stops only while the key is pressed, and as soon as the S key is released, the remaining numerical information continues to be announced by sound.

As described above, the audio output device of the present invention is provided with a key for selecting all audio output time intervals between digits of numerical information, means for counting the selected audio output time intervals, and defined by the counting means. Since it consists of a means for outputting sound at time intervals, the optimum tempo of sound notification can be selected depending on the purpose of use.

[Brief explanation of the drawing]

Fig. 1 is a plan view showing the external appearance of the voice calculator of the present invention, Fig. 2 is a block diagram showing the configuration of the calculator shown in Fig. 1, Fig. 3 is a block diagram showing the main parts of Fig. 2, and Fig. 4 is the main part of the calculator. 1, 5, and 6 are flowcharts to explain the operation of the calculator of the invention. 0 Code 1: Calculator; 3: Speaker. 6: Mode specification switch. 9: Audio pause period adjustment switch. VK: Voice start instruction key. S: Voice stop key.

Claims (1)

[Scope of Claims] 1. A device configured to notify numerical information by voice, which includes a key for selecting a voice output time interval between digits of the numerical information, and a key for selecting a voice output time interval between digits of the numerical information, and An audio output device comprising: means for counting; and means for outputting audio at time intervals defined by the counting means.