JPS60141008A - Waveform operating circuit - Google Patents

Abstract

PURPOSE:To make the rising rime and the falling time of an output waveform equal by inserting a circuit having different impedance at charge and discharge t to a path of a charge current of a capacitor in a time constant circuit unsharpening the rising/falling of a rectangular signal and selecting the impedance value properly. CONSTITUTION:Circuits 11, 12 surrounded by chain lines have similar constitution, each output is coupled with a transformer 13 in opposite polarity to obtain an output Vo of a bipolar signal. The time constant on the charging path LP1' of a capacitor C is (R5+R7+ on-resistance of a transistor (Tr)Q4)XC and the time constant of the discharge path LP2' is (R6+ on-resistance of TrQ1)XC. Thus, the time constant at charge/discharge is made equal by selecting properly the value of resistor R6, and then rising time/falling time of an output signal VOUT' are made equal.

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to digital signal transmission circuits, and in particular to waveform manipulation for reducing crosstalk between lines by slowing the rise and fall of signals. Anything related to circuits.

Conventional technology and problems In order to reduce the amount of crosstalk between lines, waveform manipulation circuits that reduce the rise and fall of signals use the charging and discharging of capacitors to perform such waveform manipulation. circuits are commonly used.

FIG. 1 shows the configuration of a conventional waveform manipulation circuit. In the same figure, (lh to Q4 are transistors, D
I+D2 is a diode, R1 to R5 are resistors, C is a capacitor, and T is a transformer.

Further, FIG. 2 shows signals of various parts in the waveform manipulation circuit of FIG. 1. In the same figure, VXN is the input signal, VIN
' is the signal at the connection point of input resistor EIN and diode D1,
Vl is the collector signal of transistor Q1, Vl is the emitter signal of transistor Qs, VOUT is the collector signal of transistor Q4% I'+1:UT is the signal on the secondary side of transformer T, and each of these signals is Also indicated by the same reference numerals in corresponding positions in FIG.

First, if we ignore the capacitor C, the input signals v, N
1) When X'pz is equal to 5V (for example), transistor Q1 is conductive. When the transistor Q+ is conductive, its base voltage is I'BB (VBE is the base-emitter voltage! 0.77), while the resistor R1 = B2
Therefore, the signal Vllj becomes 2VBB.

At this time, the signal V1 has a value lower than the signal V1' by the forward voltage drop (=Vnn) of the diode D1, that is, V
It becomes BII and becomes stable. Furthermore, the signal V2 is the signal V1
The voltage of the transistor Q3 is lower by VBB, and therefore OY. Therefore, the base voltage of the transistor Q4 becomes OV and is cut off, and the signal VCm at the collector becomes the power supply voltage (syn).

Next, when the input signal WIN is at a low level, transistor Q1 is cut off and therefore the signal V at its collector
1 rises. As a result, the transistor Q5 becomes conductive, and the signal Y2 at its emitter also rises, so that the transistor Q4 also becomes conductive. The base voltage when transistor Q4 conducts is VBB, while the resistor E, = R
, so the signal V2 becomes 2VBH. Since transistor Q3 is conductive as described above, signal V1 at its base is higher than signal V2 by VBE, so signal V1 is 5VBB. If the signal V1 tries to become higher than this, the base potential of the transistor Q4 increases and the collector voltage of the transistor Q4 tends to decrease.
1 The signal V1 is pulled down through the diode D2, so the signal V1 is stabilized at 3YBE. In this state, the signal VOUT at the collector of transistor Q4 is greater than the signal V1 and the diode D2. It is stabilized at a value lower by 'G'BB of transistor Q2, and the value is VBB.

By performing the above operation, the signal VOUT of the collector of the transistor Q4 becomes the power supply voltage (5Y) when the input signal T'IN is at a low level, and '@V' when the input signal T'IN is at a low level.
BB (0,71') pulse, therefore, the signal VOUT on the secondary side of the transformer T becomes a pulse of ov and 4.5V.

FIG. 6 shows an example of application of the waveform manipulation circuit shown in FIG. In the same figure, (α) indicates the configuration, and (b) indicates the output signal. As shown in Figure 3 (ω), circuits 1 and 2 having the same configuration as the circuit portion shown within the chain line in Figure 1 are combined, and their respective outputs are reversely polarized by the transformer shown in 5 By coupling them together so that the inputs have the same polarity and applying pulse inputs of the same polarity to the respective inputs, it is possible to send out an output VO consisting of a bipolar signal as shown in FIG. 3 (6) from the secondary side of the transformer 30.

On the other hand, when considering the capacitor C, as shown in Figure 1, if the charge movement within the capacitor is small, the voltage across the capacitor will be maintained. The signal I'
OUT, when the signal V1 transitions from high level to low level, the signal V2 decreases and the base potential of the transistor Q4 decreases. Therefore, the signal VOUT at the collector of the transistor Q4 tries to rise, but the signal V1 also tries to rise through the capacitor C.

Further, when the signal V1 transitions from low level to high level, if the signal V1 tries to rise, contrary to the above, the signal VOUT at the collector of transistor Q4 tries to fall, and the signal V1 goes through the capacitor C. do.

In the circuit shown in FIG. 1, a feedback action based on such a mirror effect occurs, and the rise and fall times of the signal VOUT become longer by 9 hours. The transition time in this case is determined by the time constant of charging and discharging the capacitor C.

In the circuit of FIG. 1, the charging path LPt in the capacitor C is the resistor R5, the capacitor C,
The discharge path r, p2 is one of the transformer T.
On the next side, it passes through a capacitor C and a transistor Q1, and their time constants are also not the same. Therefore, as shown in FIG. 4, the collector signal VOU of transistor Q4
Output signal vou'' on the secondary side of T and transformer T
: The short rise time T1 is longer than the short fall time T2,
Becomes embattled.

OBJECT OF THE INVENTION The present invention aims to solve the problems of the prior art, and its purpose is to create a waveform that does not cause a difference in the short rise time and short fall time of the output current. The purpose is to provide an operating circuit.

Structure of the Invention The waveform manipulation circuit of the present invention has a time constant circuit that slows the rising and falling edges of a rectangular wave signal, and has different impedances during charging and discharging in the path of the charging and discharging current of the capacitor. By inserting a circuit and appropriately selecting this impedance value, the short rise time and short fall time in the output waveform are made equal.

Embodiment of the Invention FIG. 5 shows the configuration of an embodiment of the waveform manipulation circuit of the invention. This figure shows a case where a bipolar signal sending circuit is configured corresponding to FIG. 3, and the circuit 1 shown surrounded by a chain line
1.12 has a similar configuration, and the respective outputs are coupled with opposite polarities by a transformer 16 to obtain an output Vo consisting of a bipolar signal. Further, in the same figure, the outputs are coupled by a transformer 16 with opposite polarities to produce an output V consisting of a bipolar signal. It is structured so as to obtain the following. Also, in this figure, the same parts as in FIG. 1 are indicated by the same numbers, Q5 is a transistor, and R6, R, are resistors.

The waveform manipulation circuit of the present invention inserts a circuit consisting of a resistor E 6 + R7 and a transistor Q5 in the charging/discharging path of the capacitor C, and the impedance of this circuit is determined by the output signal v.
The charging/discharging time constant of capacitor C is balanced by being small when ou'j rises (when input signal VIN falls) and increases when VOUT falls (when VrN rises). This is how it was done.

In FIG. 5, transistor Q5 is connected to input signal T'IN
transitions to a low level, transistor Q4 becomes conductive, and when a charging current flows to capacitor C via resistor R5, a base bias is applied by the voltage drop across resistor R7 and the transistor Q4 becomes conductive. This reduces the impedance of the parallel circuit of resistor R6 and transistor Q5. On the other hand, the input signal VIN transitions to the NO level, transistor Q4 is cut off, and transistor Q is turned off.

When the discharge current of the capacitor C flows through the transistor Q5, the transistor Q5 is in a cut-off state and the impedance of the parallel circuit of the resistor R6 and the transistor Q5 does not change.

FIG. 6 is a diagram showing the function of a circuit consisting of transistor Q5 and resistors R5 to R7 added to the circuit of FIG. In the figure, α, 6. c corresponds to the same symbol in FIG. 5, D is a diode representing the function of transistor Q5, and its forward voltage drop α is α
=VBw-IR7 ('I'BE is the base-emitter voltage of transistor Q5, I is the current of resistor R7).

In the circuit of FIG. 5, the charging path LP of capacitor C
,' is (R5+R,+) transistor Q
The time constant in the discharge path r, rp2' is (R6 + on-resistance of transistor Q1)
It is C. Therefore, by appropriately selecting the value of resistor R6, the time constants during charging and discharging can be made equal.
This makes it possible to equalize the short rise time and short fall time of the output signal VOUT.

At this time, the smaller the forward voltage drop α when the transistor Q5 is turned on, the smaller the on-resistance of the transistor Q5 becomes, and the short-circuiting of the resistor R6 is completed. VB,,-I
From the relationship of R, it is desirable to determine the circuit conditions so that the voltage drop α is as small as possible.

FIG. 7 shows an example of a bipolar signal output waveform by the waveform manipulation circuit of FIG. In the figure, it is shown that the short rising time 11' and falling time 12' of the positive pulse, and the short rising time 13' and falling time T4 of the negative pulse are all equal.

FIG. 8 is a block diagram of main parts showing another embodiment of the waveform manipulation circuit of the present invention. In the same figure, only the portion of the additional circuit according to the present invention is shown, and the points G and 6.6 in the figure can be replaced by corresponding to the same reference numerals in FIG. In FIG. 8, the same parts as in FIG. 5 are designated by the same numbers; Q6 is a transistor, D3 is a diode, and R8, R, . . . Rlo are resistors.

Further, FIG. 9 is a diagram showing the functions of the additional circuit shown in FIG. 8. In the figure, V is a transistor Q6r diode D3. Denotes a constant voltage source formed by resistor R8+ 4 r RTG, V = RB/Bp VBB (
VBE is the base emitter voltage of the transistor Q6.

According to the embodiment of FIG. 8, the transistor Q5 is made conductive by the constant voltage source V when charging the capacitor C, but in this case, the voltage drop of the transistor Q5 is α=vBE−v, and
It is constant regardless of the value of resistor R5. Therefore, when the circuit shown in FIG. 8 is used, there is no need to change the value of the resistor R5 even if the power supply voltage VaC is changed, and there is an advantage that a regulator is not required.

As described in detail, according to the waveform manipulation circuit of the present invention, the charging and discharging current paths of the capacitor in the time constant circuit for slowing the rise and fall of a rectangular wave signal are Insert a circuit that exhibits different impedance depending on the time,
By selecting this impedance value, we made the rise and fall times of the output waveform equal, so
By inputting a rectangular wave signal, it is possible to realize a waveform manipulation circuit that can output a waveform in which the degree of slowing of the rising edge and falling edge is balanced.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the entire configuration of a conventional waveform manipulation circuit, Fig. 2 is a time chart showing the signals of each part in the circuit of Fig. 1,
FIG. 3 is a diagram showing the configuration of a bipolar signal sending circuit using the circuit of FIG. 1, FIG. 4 is a diagram showing the output signal waveform in the waveform manipulation circuit of FIG. 1, and FIG. 5 is a diagram showing the waveform manipulation of the present invention. 6 is a diagram showing the configuration of an embodiment of the circuit. FIG. 6 is a diagram showing the function of the additional circuit in the circuit of FIG. 5. FIG. 7 is a diagram showing an example of the output waveform in the waveform manipulation circuit of the present invention. The figure is a main part configuration diagram showing another embodiment of the waveform manipulation circuit of the present invention.
FIG. 9 is a diagram showing the function of the circuit of FIG. 8. 01-Q6...Transistor, D1-D3...Diode, R1-B. ...Resistor, C...Capacitor, T...Transformer Patent applicant Fujitsu Ltd. agent Patent attorney Gobe Tamamushi (1 other person) Figure 3 (a) Figure 4/5hf Figure 5 Figure 6 Figure 7 Figure 8 Figure 9

Claims (1)

[Claims] A waveform manipulation circuit in a digital signal transmitting device, which has a time constant circuit including a capacitor, and when a rectangular wave signal is input, the time constant circuit blunts the rising and falling waveforms of the rectangular wave signal and outputs the same. A circuit that exhibits different impedances when charging and discharging the capacitor is inserted into the charging/discharging current path of the capacitor in the time constant circuit, and the rise and fall times of the output waveform are determined by selecting the impedance value. A waveform manipulation circuit characterized by equalizing the .