JPS601975A - Gradation recorder - Google Patents

Abstract

PURPOSE:To simplify the driving circuit of a thermal head and to obtain a print data with high quality by controlling power of a heating resistor only when a down-counter counts down a given data signal so as to control the power application time digitally. CONSTITUTION:A time when a base of an output transistor (TR) 4 is at ''0'' level by a count data value inputted to the down-counter 1 in other words the power application time to the heating resistor is controlled and it is also possible to control the power application time to the heating resistor depending on the pulse period and the count data value by varying the pulse period of the clock pulse. In this case, the period to make an output terminal 14 to ''0'' level is (nX T), where (n) is the count data and T is the clock pulse period, lots of gradations are obtained and a gradation recording data having always stable print density and with constant quality independently of ambient temperature by controlling the period of the clock pulse in matching with the thermal head ambient temperature condition.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a gradation recording device, particularly a thermal printer that outputs image data such as a television image as a note copy, by controlling the voltage application time to a heating resistor. The present invention relates to a gradation recording device capable of obtaining a print density of .

Hitherto, gradation recording devices have been known that control the print density by controlling the voltage application time to the heating resistor, but it is possible to control the printing density by controlling the voltage application time to the heating resistor. Because this processing is performed, inconsistencies are more likely to occur compared to those in which the recording density changes digitally in 8 to 16 steps, and a conversion element is required to connect to a logic element such as a microcomputer, and the processing speed is high.・There was a problem with ease of use.

The present invention aims to digitize all processing, simplify the driving circuit of the thermal head, and obtain high-quality print data.

The present invention will be explained below with reference to FIGS. 1 to 6. 1st
The figure is a block diagram for explaining the basic concept of the gradation recording apparatus of the present invention, and FIG. 2 is a time chart thereof.

In FIG. 1, in a hexadecimal down counter, data input from count data terminals 12a, 12b, 12c% 12d is temporarily stored by a load pulse input from a load terminal 11, and the data is input from a clock terminal 10. A clock pulse, which is a countdown pulse, is used to cause a downward count, and when the count reaches "o o o o", a carry pulse is output from the carry terminal 1-a. The data stored in the storage device in the form of binary numbers so that it can be recorded with density corresponding to the amplitude level is sequentially read out and supplied as a 4-bit digital signal.Then, For example, a data l of "1111" is output from the count data terminals 12a to 12d.
is input, a load pulse is input from the load terminal 11, and the data is temporarily stored in the down counter 1.Next, a clock pulse is applied from the clock terminal 10, and when 16 pulses are input, the down counter 1 outputs a pulse from the carry terminal 1-a.

2 is an R-S flip-flop (hereinafter referred to as R-3FF); 3 is an AND gate; 13 is a set gate input terminal; the carry terminal 1-a is connected to the reset terminal of R-8FF2; Set gate input terminal is R-8
It is connected to the set terminal of FF2 and one input end of AND gate 3, and the output end of R-8FF is connected to the other input end of AND gate 3. 4 is an output transistor whose emitter is grounded, and the above AND gate 3
The output end of is connected to the pace, and the collector is the output end 14.Next, the operation of the above configuration will be explained with reference to FIG. Now, for example, "110" is input to the count data terminals 12a to 12d.
By inputting all the signals of 1" and inputting the load pulse to the load terminal 11, the down counter 1 receives "' 110
1" is temporarily stored. Next, when the set gate input terminal 13'e'1" level is set and R-8FF2 is set, the gate of the PC AND gate 3 is opened, and all outputs of the AND gate 3 are set. n I II level, and the base y of the output transistor 4 is at the ``i'' level, that is, the collector is all at the N o '' level, and the conduction of this transistor 4 causes the current to flow to the heating resistor.On the other hand, R-'5
When FF2 is set, a clock pulse is input to the down counter 1 from the clock terminal 10, and the contents of the down counter 1 change from "1101" to "1" 100 → "101"
The clock pulse decreases sequentially from 1'' to 1010'' until the clock pulse reaches 1.
When one is input, its content becomes 0000'' and a pulse is output from the carry terminal 1-a.

Along with the output of this carry pulse to R-8FF2, R
-8FF2 is reset, one input terminal of AND gate 3 becomes 0", AND gate 3 is closed, and the base of transistor 4 becomes 60" level, so output terminal 1
4 becomes 1'' level by cutting off the transistor, and the power supply to the heating resistor is cut off.

That is, as mentioned above, the pace of the output transistor 4 is set to "0" by the count data value input to the down counter l.
° In other words, the time when the current is applied to the heating resistor is controlled. In the case of Figure 2, the clock pulse is fixed, but by making the pulse period of the clock pulse variable. , the current supply time to the heating resistor is determined by this pulse period and the count data value.
It is also possible to control. In this case, count data is n.

If the period of the pulse is T, all 6 of the output terminals 14
The period of 0" level is nxT, and a large number of gradations can be obtained. By controlling the clock pulse period according to the temperature conditions around the thermal head, it is possible to achieve constant quality that is not affected by the environmental temperature. Figures 3 to 6 relate to a gradation recording device according to an embodiment of the present invention, which allows gradation recording data of printing accuracy to be easily obtained, although some parts are omitted from the drawings. It is designed to drive a 32-dot thermal head.

In the figure, 1-1.1-2. ......, 1-32
is a down counter corresponding to the above 1, 2-1.2-2,
..., 2-32 is R-8FF corresponding to 2 above
.

3-1.3-2. ..., 3-32 is an AND gate corresponding to 3 above, 4-1, 4-2, ...
..., 4-32 is an output transistor corresponding to 4 above,
1-1as12as...1-32a is a carry terminal corresponding to 1-a, 5-1.5-2.・
..., 5-32 is a heating resistor connected to the collector of each output transistor, 6 is a voltage supply terminal provided to supply voltage to each heating resistor, xi-i, 1i
-2,...

11-32 is a load terminal corresponding to the above-mentioned 11, and 7 is a load terminal which selects one of the above-mentioned load terminals 11-1 to 11-32 by two communication signals inputted to selection signal terminals 8a to 8e.
In the above configuration, which is a binary to hexadecimal decoder that operates based on the operating truth table of FIG. 5, as shown in the time chart of FIG. 4(a), first,
1111 corresponding to selection signal terminals 8a to 8e, respectively.
” is applied, and only the load terminals 11-32 are fully selected among the output terminals of the decoder 7. In this state, the count data terminals 12a to 12a, which are common data terminals, are selected.
For example, when a signal "1011" is input to 12d and a signal "ooooo" is input to the selection signal terminals 8a to 8eK, the output of the decoder 7 is output from the load terminal 11-1.
only becomes 1” level, and at the same time the down counter 1-1
A data signal of 10 i i ” is temporarily stored.

Next, count data t7ja child 12a ~ 12dfC"
1010” and select signal terminals 8a to 8.
If you input the signal "e ic "00001'",
In the decoder 7, only the load terminal 11-2 becomes the "1" level, and a signal of "1010" is temporarily stored in the down counter 1-2. Below, count data terminal 1
2a to 12d, the desired data signal to the selection signal terminal 8a.
Data is stored in each of the down counters 1-1 to 1-32 by applying all signals for selecting all down counters corresponding to data signals to 8e. Note that the count data terminals 12a to 12d correspond to each down counter 1-1.
1-32 are connected in parallel, and the timing of temporary accumulation in each down counter 1-1 to 1-32 is input at the rising edge of the output pulse from the decoder 7. Here, the signal shown in the time chart of FIG. 4(a).

For reference, the data stored in each down counter 1-1 to 1-32 is shown in Table 1 below.

FIG. 4(b) of Table 1 is a time chart showing the control of the energization time to each heating resistor 5-1 to 5-32. As described above, each down counter 1-1 to 1-32 stores predetermined data. From this state, set gate terminal 13
'f:, 1'' level, and each AND gate 3-1 to 3-
32 is opened, the output terminals of each R-8FF 2-1 to 2-32 are set to 1" level. As a result, each output transistor 4-1 to 4-32 is all conductive, and the voltage supply terminal 6 The voltage applied to each heating resistor 5-1
〜Supplied to 5-32. Thereafter, by continuously inputting 16 clock pulses with period T from the clock terminal 10 which is a common down clock terminal, each down counter 1'-1 to 1-32 performs downward counting, and each down counter l is 000o. ”, a carry pulse is output, the corresponding R-8FFk is reset, and the energization state to the corresponding heating resistor is cut off.

In other words, the carry pulse of the down counter 1-1 rises at 11 clock pulses, resets the R-8FF 2-1, cuts off the output transistor 4-1, and outputs 11×
After the heating resistor 5-1 is energized and generates heat for a period of T, the energization to the heating resistor 5-1 is stopped. Similarly, the down counters 1-2 are at the 10th pulse of the clock pulse, the down counters 1-3 are at the 4th pulse, the down counters 1-4 are at the 13th pulse, and the down counters 1-32 are at the 13th pulse. Stops heating and energizing the corresponding heating resistor.

let Therefore, each heating resistor 5-1.5-2.5-3
, 5-4, 5-32 is IIX T, 10x T, 4
, XT.

The heating resistors 5-1 to 5-32 are energized to generate heat and are energized for periods 13X T and 13X T, and as shown in FIG. 6, the print density is approximately proportional to the voltage application time. -1 to 1-321C Recording data of density (gradation) based on the input data signal, that is, data corresponding to print density, is printed on the thermal paper.

As described above in detail, according to the present invention, the heating resistor is energized and controlled only while the down counter is down-counting the given data signal, and the energization time is digitally controlled. , it is possible to obtain multi-gradation recorded data with extremely good consistency, and since all processing is digital, it is easy to connect with highly integrated logic elements such as microcomputers, speeding up processing, miniaturizing equipment, It is extremely effective in reducing costs, has extremely high resistance to environmental changes such as reduced voltage, and generally simplifies the drive circuit of the thermal head and can provide high-quality print data.

[Brief explanation of the drawing]

The drawings all relate to the present invention; FIG. 1 is a block diagram for explaining the basic concept of the present invention, FIG. 2 is a time chart thereof, and FIG. 3 is a gradation recording device according to an embodiment of the present invention. 4(a) and (b) are the time charts, FIG. 5 is the operation truth table of the decoder, and FIG. 6 is a graph showing the relationship between the energization time to the heating resistor and the print density. It is. 1.1-1 to 1-32・・・Down counter, 1
-a %1-1 a ~1-32a--Carry terminal, 2゜2-1~2-32...R-S fribbed flow rough, 3゜3-1~3-32... ...And gate, 4.4-1 to 4-32...Output transistor, 5-1 to 5-32...Heating resistor, 6.
...Voltage supply terminal, 7...Decoder, 8
a~8e...Selection signal terminal, 10...
Clock terminal, ii, 11-i to 11-32...
・Load terminal, 13...Set gate terminal. Figure 3 Figure 4 (a)

Claims (1)

[Scope of Claims] α) A plurality of down counters respectively corresponding to a plurality of heating resistors of a thermal head, means for supplying a data signal corresponding to print density to each of the down counters, and a means for supplying a data signal corresponding to a print density to each of the down counters, A gradation recording device characterized by comprising means for energizing the heating resistor corresponding to the down counter only while counting down the signal. (2) The gradation recording device according to claim ?), characterized in that a clock pulse serving as a countdown pulse input to the down counter is made variable.