JPS60200552A - Lead frame used for resin-sealed semiconductor device - Google Patents

Lead frame used for resin-sealed semiconductor device

Info

Publication number
JPS60200552A
JPS60200552A JP59057904A JP5790484A JPS60200552A JP S60200552 A JPS60200552 A JP S60200552A JP 59057904 A JP59057904 A JP 59057904A JP 5790484 A JP5790484 A JP 5790484A JP S60200552 A JPS60200552 A JP S60200552A
Authority
JP
Japan
Prior art keywords
resin
lead frame
lead
forcibly
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59057904A
Other languages
Japanese (ja)
Inventor
Koichi Hirata
弘一 平田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP59057904A priority Critical patent/JPS60200552A/en
Publication of JPS60200552A publication Critical patent/JPS60200552A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To eliminate air bubbles by forming the shape of a lead disposed near a resin filling portion of a lead frame to forcibly alter the flowing direction of the resin to be filled. CONSTITUTION:A lead frame 2' which is finished in a die placing and a wire bonding is clamped between upper and lower transfer molds. The frame 2' used here has a projection 12 to forcibly alter the flowing direction of resin at the outermost end lead 11 opposed to a gate 6. The projection 12 is preferably provided near the gate. As a result, the filling resin is forcibly elevationally deflected toward a mold cavity wall surface 7 to forcibly move remaining air bubbles near the wall surface to an air vent 13 side. Thus, a package having no air bubble can be obtained.

Description

【発明の詳細な説明】 〔技術分野〕 本発明はリードフレームに関し、とくに樹脂側止型半導
体集積回路装置に適するリードフレームに関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a lead frame, and particularly to a lead frame suitable for a resin-side stop type semiconductor integrated circuit device.

（従来技術） 従来、第１図に示される如く、半導体集積回路素子ｌ（
以下、ダイという）がリードフレーム２のダイ搭載部３
に固着された後、金属剛線４でダイ電極部とリードフレ
ームＱ内端部間が接続され。(Prior Art) Conventionally, as shown in FIG.
Hereinafter referred to as die) is the die mounting part 3 of the lead frame 2.
After being fixed to the lead frame Q, the die electrode part and the inner end of the lead frame Q are connected with the metal rigid wire 4.

しかる後に第２図に下す如きトランスファーモールド金
型５ａ、５ｂ円にセットされ、高温加圧状態でこの金型
内に樹脂を注入する事によって樹脂ｍｌ止ＩＣは製造さ
れる。この時注入される樹脂は、金型の樹脂注入部６（
以下、ゲートという）から注入された後、ゲート部によ
って方向づけがなされているものの、金型内部（キャビ
ティ部）では比較的自由な流動をする為にゲート部極近
傍のキャビティー整面７，７′には樹脂９が充填されず
。Thereafter, it is set in transfer mold molds 5a and 5b as shown in FIG. 2, and resin is injected into the mold under high temperature and pressure, thereby producing a resin-molded IC. The resin injected at this time is the resin injection part 6 (
After being injected from the gate (hereinafter referred to as the gate), the direction is determined by the gate, but in order to allow relatively free flow inside the mold (cavity), the cavity surfaces 7, 7 near the gate are oriented. ' is not filled with resin 9.

気泡８が残留する現象が発生しやすい、とくにこの気泡
８は下側キャビティに多くみられる。A phenomenon in which air bubbles 8 remain is likely to occur, and in particular, many air bubbles 8 are found in the lower cavity.

この現象は、樹脂の注入条件だけでは解決する事が困難
で、ゲート部の位ｉｔ１寸法等と併せて考慮を要し、そ
れによって得られた最適条件を安定して艮時間維持する
事も又困難である。この様な気泡の残留は単に製品外観
を損なうのみならず。This phenomenon is difficult to solve with resin injection conditions alone, and must be taken into consideration along with the position and dimension of the gate part, etc., and it is also possible to stably maintain the optimum conditions obtained by this for the injection time. Have difficulty. Such residual air bubbles not only impair the appearance of the product;

樹脂厚を薄くする傾向にある昨今では、気泡近傍部の樹
脂充填密度の低下は製品信頼度低下の大きな原因となる
。In recent years, there has been a trend toward thinner resins, and a decrease in the resin filling density near the bubbles is a major cause of lower product reliability.

（発明の目的） 不発明の目的は上記気泡の発生のないリードフレームを
提供することである。(Object of the invention) An object of the invention is to provide a lead frame in which the above-mentioned bubbles are not generated.

（発明の構成） 不発明は樹脂封止型半導体装置に用いられるリードフレ
ームにおいて、該リードフレームの樹脂注入部近傍に位
置するリード形状を注入される樹脂の流動方向を強制的
に変更させる様な形状にしたこと全特徴とする。とくに
、キャビティの樹脂注入口に近接して、その注入口の幅
および高さより大きな側面をもつ付加リード部を設けた
ことを特徴とする・ （実施例の説明） 以下、本発明に係る一実施例全図面を用いて説明する。(Structure of the Invention) The invention is directed to a lead frame used in a resin-sealed semiconductor device, in which the shape of the lead located near the resin injection part of the lead frame is such that the flow direction of the injected resin is forcibly changed. All features are the shape. In particular, it is characterized in that an additional lead portion having a side surface larger than the width and height of the resin injection port is provided in the vicinity of the resin injection port of the cavity. An example will be explained using all the drawings.

第３図においてダイ搭載、ワイヤボンディングを終、ｔ
たリードフレーム２′はトランス７アーモールド上下金
型間にクランプされる。ここで使用されるリードフレー
ム２′は、ゲート部６と対向する最端部リード１１が樹
脂流動方向を強：ＩｔｌＪ的に変向させる様な突起部１
２を有している。In Figure 3, die mounting and wire bonding are completed.
The lead frame 2' is clamped between the upper and lower molds of the transformer 7 armor mold. The lead frame 2' used here has a protrusion 1 in which the endmost lead 11 facing the gate part 6 strongly changes the resin flow direction.
It has 2.

この突起部１２は第３図に示すようにゲート部の極止傍
に設ける方がよい、この結果、第４図にボす如く、注入
樹脂は金型キャビティ部壁面７へ向けて強制的に上下へ
変向され、壁面付近に残留する気泡をエアベント１３側
へ強制的に移動させる。It is better to provide this protrusion 12 near the pole stop of the gate part as shown in FIG. The air bubbles that remain in the vicinity of the wall surface are forcibly moved toward the air vent 13 side by being deflected upward and downward.

不実施例の場合、突起部の大きさは樹脂流動を変向させ
るに充分な寸法、即ち、第５図Ａ、　Ｈにおいてその巾
ＷＬがゲート開口端巾ＷＧ以上あり、ゲート開口の両端
より外側まで延びている方がよい、又、その厚さＴＬが
ゲート開口端厚（深さ）ＴＧ　より薄くない孕、そして
、その端部とゲート開口端との相対距離りがゲート開口
端厚Ｔ。の２台１以下である事が望ましいことが実験に
よって確認された。この結果、第２図に示す気泡の発生
のないパッケージが得られた。In the case of non-example, the size of the protrusion is sufficient to change the direction of the resin flow, that is, the width WL in FIGS. It is better that the thickness TL is not thinner than the gate opening end thickness (depth) TG, and the relative distance between the end and the gate opening end is the gate opening end thickness T. It has been confirmed through experiments that it is desirable for the number of 2 units to be 1 or less. As a result, a package without bubbles as shown in FIG. 2 was obtained.

不実施例はチーアルインラインタイプ樹脂刺止型半導体
集積回路装置についてｎピ述したが、本発明は上記パッ
ケージについてのみならず、他のパッケージ、例えば、
シングルインラインタイプ。Although the non-embodiments have been described with reference to the in-line type resin-embedded semiconductor integrated circuit device, the present invention is applicable not only to the above-mentioned package but also to other packages, for example,
Single inline type.

フラットタイプ、その他各機のパッケージに対してＭ効
であり、従来方法にみられる気泡残留による品質、信頼
性の低下を防ぎ、更にはトランスファーモールド条件を
長期にわたって安定化し、容易に高品質の樹脂封止型半
導体集積回路装置を得ることができる。It is M-effective for flat type and other machine packages, prevents deterioration of quality and reliability due to residual air bubbles seen in conventional methods, and also stabilizes transfer molding conditions over a long period of time, making it easy to produce high-quality resin. A sealed semiconductor integrated circuit device can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図、第２図はそれぞれ従来方法にかかる半導体集積
回路装置のリードフレーム平面図と樹脂封止断面図、第
３図、第４図、第５図Ａ、　Ｂは不発明にかかるリード
フレーム平面図、ゲート部所面図、ゲート部付近拡大平
面図と断面図である。 １・・・・・半導体集積回路素子、　２．２’・・・・
・・リードフレーム、３・・・・・・ダイ搭載部、４・
・・・・金九細緋、５ａ・・・・・・トランスファーモ
ールド上：！ｊＬ５ｂ・・・・・　・トランスファーモ
ールド下型、６・・・・・・樹脂注入部。 ７．７′・・・・・・ゲート部近傍壁面、８・・・・気
泡、９・・・・・充填樹脂、１１・・・・・最端部リー
ド、１２・・・・最端部リード突起部、１３・・・・・
・エアベント部。 ＷＬ・・・・・・最端９１５　ＩＪ−ド突起部巾、Ｗｏ
・・・・・・ゲート開口端部巾　ｒｌｌＬ・・・・・・
最端部リード突起部属、′１゛。・・・・・ゲート開口
嬬部厚。1 and 2 are respectively a plan view and a resin-sealed cross-sectional view of a lead frame of a semiconductor integrated circuit device according to a conventional method, and FIGS. 3, 4, and 5 A and B are lead frames according to an uninvented method. FIG. 2 is a plan view, a top view of the gate portion, an enlarged plan view of the vicinity of the gate portion, and a sectional view. 1...Semiconductor integrated circuit element, 2.2'...
...Lead frame, 3...Die mounting section, 4.
...Gold, nine thin scarlet, 5a...Top of transfer mold:! jL5b... - Transfer mold lower mold, 6... Resin injection part. 7.7'...Wall surface near the gate, 8...Bubble, 9...Filled resin, 11...Lead at the end, 12...The end Lead protrusion, 13...
・Air vent part. WL・・・・・・End 915 IJ-do protrusion width, Wo
・・・・・・Gate opening end width rllL・・・・・・
Endmost lead protrusion, '1゛. ...Thickness of the gate opening.

Claims (1)

【特許請求の範囲】 （１１樹脂封止型半導体集積回路装置に用いられるリー
ドフレームにおいて、樹脂注入部と近接せる位置に樹脂
流動方向を強制的に変更させる様な形状の付加リード部
を設けた事を特徴とする樹脂封止型半導体装置に用いら
れるリードフレーム。 （２）前記付加リードの形状は注入部間口部に対して、
厚さが開口部厚みと同寸法或いはそれ以上。 又そり巾が開口部巾と同寸法或いはそれ以上ある様に設
計された事を特徴とする特許請求の範囲第１項記載のリ
ードフレーム。[Claims] (11) In a lead frame used in a resin-sealed semiconductor integrated circuit device, an additional lead portion having a shape that forcibly changes the resin flow direction is provided at a position close to the resin injection portion. A lead frame used in a resin-sealed semiconductor device characterized by: (2) The shape of the additional lead is such that the shape of the additional lead is
The thickness is the same as or greater than the opening thickness. The lead frame according to claim 1, wherein the lead frame is designed so that the warpage width is the same as or larger than the opening width.
JP59057904A 1984-03-26 1984-03-26 Lead frame used for resin-sealed semiconductor device Pending JPS60200552A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59057904A JPS60200552A (en) 1984-03-26 1984-03-26 Lead frame used for resin-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59057904A JPS60200552A (en) 1984-03-26 1984-03-26 Lead frame used for resin-sealed semiconductor device

Publications (1)

Publication Number Publication Date
JPS60200552A true JPS60200552A (en) 1985-10-11

Family

ID=13068973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59057904A Pending JPS60200552A (en) 1984-03-26 1984-03-26 Lead frame used for resin-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPS60200552A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5371044A (en) * 1991-05-27 1994-12-06 Hitachi, Ltd. Method of uniformly encapsulating a semiconductor device in resin

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5371044A (en) * 1991-05-27 1994-12-06 Hitachi, Ltd. Method of uniformly encapsulating a semiconductor device in resin

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