JPH0320975A - Hybrid ic connecting terminal - Google Patents

Hybrid ic connecting terminal

Info

Publication number
JPH0320975A
JPH0320975A JP1153982A JP15398289A JPH0320975A JP H0320975 A JPH0320975 A JP H0320975A JP 1153982 A JP1153982 A JP 1153982A JP 15398289 A JP15398289 A JP 15398289A JP H0320975 A JPH0320975 A JP H0320975A
Authority
JP
Japan
Prior art keywords
hybrid
package
mounting
conductor
connecting terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1153982A
Other languages
Japanese (ja)
Inventor
Masahiko Takeuchi
雅彦 竹内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1153982A priority Critical patent/JPH0320975A/en
Publication of JPH0320975A publication Critical patent/JPH0320975A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Multi-Conductor Connections (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)

Abstract

PURPOSE:To facilitate the direct mounting into a package and automatic assembly by flattening the bottom face of a connecting device provided on a substrate formed with a hybrid IC, and making it leadless. CONSTITUTION:The first conductor 3A, a dielectric substance 4, the second conductor 3B, a resistor 4 and a protector 6 are formed on a ceramic substrate 2 by thick-film printing to constitute a pattern circuit. Electronic components are fitted on the thick-film-printed substrate formed with the pattern circuit to form a hybrid IC, which is installed into a package, the bottom face of a hybrid IC connecting terminal 1 is flattened against the installation pad of the package, thereby direct surface mounting is allowed. The connecting terminal 1 is made leadless, automatic assembly and high-density mounting can be realized, the package side is not damaged, thus the reliability of electric connection can be increased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はハイブリッドIC接続端子に関し、特にパッケ
ージの平面実装を実現するハイブリッドIC接続端子に
関する. 〔従来の技術〕 従来、この種のハイブリッドICのパッケージ実装用接
続端子はディスクリートタイプのリードを有するクリッ
プ端子が一般に用いられている.第3図はかかる従来の
一例を説明するためのディスクリートタイブクリップ端
子を有するハイブリッドICの縦断面図である。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a hybrid IC connection terminal, and particularly to a hybrid IC connection terminal that realizes planar mounting of a package. [Prior Art] Conventionally, a clip terminal having a discrete type lead has generally been used as a connection terminal for mounting a package of this type of hybrid IC. FIG. 3 is a longitudinal cross-sectional view of a hybrid IC having discrete tie clip terminals for explaining an example of such a conventional technique.

第3図に示すように、従来のハイブリッドICはセラミ
ック基板2上に厚膜印刷からなる第一の導体3A、第一
の導体3A上にコンデンサ用として形或される誘電体4
、誘電体4上に形或される厚膜印刷された第二の導体3
B、あるいは厚膜印刷による抵抗体5が形或され、これ
らの上に保護膜などによる保護体6が被覆されて形或さ
れている. また、かかるハイブリッドICを形成したセラミック基
板2には、他の基板に電気的に接続するためのバッド7
が設けられ、このバッド7に他の基板へパッケージ実装
するためのディスクリートタイプのリードを有するクリ
ップ端子9が接続されている. 要するに、従来のハイブリッドIC接続端子はリードを
有するタイプが一般的である。
As shown in FIG. 3, the conventional hybrid IC has a first conductor 3A formed by thick film printing on a ceramic substrate 2, and a dielectric 4 formed for a capacitor on the first conductor 3A.
, a thick film printed second conductor 3 formed on the dielectric 4
A resistor 5 is formed by B or thick film printing, and a protector 6 such as a protective film is coated thereon. The ceramic substrate 2 on which such a hybrid IC is formed also includes pads 7 for electrical connection to other substrates.
A clip terminal 9 having a discrete type lead for mounting the package on another board is connected to the pad 7. In short, conventional hybrid IC connection terminals are generally of a type having leads.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のハイブリッドIC接続端子はディスクリ
ートタイブの接続端子となっているので、パッケージへ
の組立時においては、パッケージのスルホールヘ挿入す
る際ディスクリートタイブの接続端子に変形等のゆがみ
が生じ、実装しにくく自動化が困難であるという欠点や
、折れ曲がりによる電気的接続不良の発生および生産性
の低下の問題を生ずるという欠点がある。
The conventional hybrid IC connection terminals mentioned above are discrete-type connection terminals, so when assembling them into a package, the discrete-type connection terminals may be deformed or otherwise distorted when inserted into the through-hole of the package, making it difficult to mount. There are disadvantages in that automation is difficult, and problems such as electrical connection failure due to bending and decreased productivity occur.

本発明の目的は、かかるパッケージへの直接搭載および
自動組込実装と、電気的接続の信頼性の向上および生産
性の向上とを実現するハイブリッドICの接続端子を提
供することにある。
An object of the present invention is to provide a connection terminal for a hybrid IC that enables direct mounting and automatic integration into such a package, and improves reliability of electrical connection and productivity.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のハイブリッドIC接続端子は、ハイブリッドI
Cをパッケージ実装するためのハイブリッドIC接続端
子において、前記ハイブリッドICを形成した基板に設
ける接続手段の底面を平坦化し且つリードレスとして構
或される。
The hybrid IC connection terminal of the present invention is a hybrid IC connection terminal according to the present invention.
In the hybrid IC connection terminal for package mounting the hybrid IC, the bottom surface of the connection means provided on the substrate on which the hybrid IC is formed is flattened and leadless.

〔実施例〕 次に、本発明の実施例について図面を参照して説明する
。
[Example] Next, an example of the present invention will be described with reference to the drawings.

第1図は本発明の第一の実施例を説明するための厚膜印
刷による接続端子を有するハイブリッドICの縦断面図
である。
FIG. 1 is a longitudinal sectional view of a hybrid IC having connection terminals formed by thick film printing to explain a first embodiment of the present invention.

第1図に示すように、本実施例におけるハイブリッドI
Cは前述した従来例と同様に、セラミックス基板2上に
厚膜印刷による第一の導体3A,誘電体4.第二の導体
3B,抵抗体5,保護体6が形成され、パターン回路を
構成している゛。本実施例はこのパターン回路が形成さ
れた厚膜印刷基板に電子部品を実装しハイブリッドIC
となったものをパッケージ実装するが、パッケージの搭
載パッドに対し、ハイブリッドIC接続端子lの底面を
平坦化することにより直接平面実装が可能なようにして
いる.従って、本実施例の接続端子1はリードレスとな
り、組込みの自動化や高密度実装が実現できる上、パッ
ケージ側を傷つけることがないので、電気的接続の信頼
性も向上させることができる。
As shown in FIG. 1, the hybrid I in this embodiment
Similarly to the conventional example described above, the first conductor 3A, dielectric material 4. A second conductor 3B, a resistor 5, and a protector 6 are formed to constitute a pattern circuit. In this example, electronic components are mounted on a thick film printed circuit board on which this pattern circuit is formed, and a hybrid IC is created.
This is then mounted on a package, but by flattening the bottom surface of the hybrid IC connection terminal l to the mounting pad of the package, direct planar mounting is possible. Therefore, the connection terminal 1 of this embodiment is leadless, which enables automation of assembly and high-density mounting, and also improves the reliability of electrical connection because the package side is not damaged.

第2図は本発明の第二の実施例を説明するためのクリッ
プ端子による接続端子を有するハイブリッドICの縦断
面図である。
FIG. 2 is a longitudinal sectional view of a hybrid IC having connection terminals using clip terminals for explaining a second embodiment of the present invention.

第2図に示すように、本実施例におけるハイブリッドI
Cのパターン回路形成に関しては、前述した従来例およ
び第一の実施例で説明したのと同様である.本実施例で
は、セラミック基板2の表裏面に形成したバッド7相互
を接続するための平面実装タイプのクリップ端子8を用
いてパッケージ搭載するものであり、クリップ端子8の
底面が平坦化されている。従って、リードレスとするこ
とができ、組立て時の自動化が可能となり、他の実装部
品である平面実装部品と同時にパッケージ搭載が可能で
ある。また、1回の半田付け工程でハイブリッドICを
実装できる利点がある。
As shown in FIG. 2, the hybrid I in this embodiment
The pattern circuit formation of C is the same as that described in the conventional example and the first embodiment. In this embodiment, the package is mounted using a flat mount type clip terminal 8 for connecting the pads 7 formed on the front and back surfaces of the ceramic substrate 2, and the bottom surface of the clip terminal 8 is flattened. . Therefore, it can be leadless, automation during assembly is possible, and it is possible to mount the package simultaneously with other planar mount components. Another advantage is that a hybrid IC can be mounted in a single soldering process.

〔発明つ効果〕[Invention and effect]

以上説明したように、本発明のハイブリッドIC接続端
子はパッケージへの接続リードを設けず、接続手段とし
てのパッドもしくはクリップ端子底面を平坦化すること
により、パッケージ側の部品搭載パッドが平面実装タイ
プの搭載パッドに変更することが可能となるので、パッ
ケージへの直接搭載および組立て時の自動化が容易にな
り、また他の搭載電子部品と同様に半田付け工事ができ
るため生産性の向上および電気的接続の信頼性の向上な
どを実現できるという効果がある。
As explained above, the hybrid IC connection terminal of the present invention does not provide a connection lead to the package, and by flattening the bottom surface of the pad or clip terminal as a connection means, the component mounting pad on the package side can be used as a flat mount type. Since it can be changed to a mounting pad, direct mounting on the package and automation during assembly are easy, and soldering can be done in the same way as other mounted electronic components, improving productivity and making electrical connections. This has the effect of improving the reliability of the system.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第一の実施例を説明するための厚膜印
刷による接続端子を有するハイブリッドICの縦断面図
、第2図は本発明の第二の実施例を説明するためのクリ
ップ端子による接続端子を有するハイブリッドICの縦
断面図、第3図は従来の一例を説明するためのディスク
リート型クリップ端子による接続端子を有するハイブリ
ッドICの縦断面図である。
FIG. 1 is a vertical cross-sectional view of a hybrid IC having connection terminals formed by thick film printing for explaining the first embodiment of the present invention, and FIG. 2 is a clip for explaining the second embodiment of the present invention. FIG. 3 is a vertical cross-sectional view of a hybrid IC having connection terminals using discrete clip terminals, for explaining a conventional example.

Claims (1)

【特許請求の範囲】[Claims]  ハイブリッドICをパッケージ実装するためのハイブ
リッドIC接続端子において、前記ハイブリッドICを
形成した基板に設ける接続手段の底面を平坦化し且つリ
ードレスとすることを特徴とするハイブリッドIC接続
端子。
A hybrid IC connection terminal for packaging a hybrid IC, characterized in that a bottom surface of a connection means provided on a substrate on which the hybrid IC is formed is flattened and leadless.
JP1153982A 1989-06-16 1989-06-16 Hybrid ic connecting terminal Pending JPH0320975A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1153982A JPH0320975A (en) 1989-06-16 1989-06-16 Hybrid ic connecting terminal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1153982A JPH0320975A (en) 1989-06-16 1989-06-16 Hybrid ic connecting terminal

Publications (1)

Publication Number Publication Date
JPH0320975A true JPH0320975A (en) 1991-01-29

Family

ID=15574324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1153982A Pending JPH0320975A (en) 1989-06-16 1989-06-16 Hybrid ic connecting terminal

Country Status (1)

Country Link
JP (1) JPH0320975A (en)

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