JPS60206143A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS60206143A
JPS60206143A JP59060997A JP6099784A JPS60206143A JP S60206143 A JPS60206143 A JP S60206143A JP 59060997 A JP59060997 A JP 59060997A JP 6099784 A JP6099784 A JP 6099784A JP S60206143 A JPS60206143 A JP S60206143A
Authority
JP
Japan
Prior art keywords
semiconductor element
lead
finger
film carrier
edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59060997A
Other languages
Japanese (ja)
Other versions
JPH0462458B2 (en
Inventor
Minoru Hirai
平井 稔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP59060997A priority Critical patent/JPS60206143A/en
Publication of JPS60206143A publication Critical patent/JPS60206143A/en
Publication of JPH0462458B2 publication Critical patent/JPH0462458B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/0711Apparatus therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/077Connecting of TAB connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/701Tape-automated bond [TAB] connectors

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To separate the electric contact between a lead and an edge of element by a method wherein, after bonding a bump electrode on a semiconductor element to a finger lead on a film carrier, the lead is trimmed while heating the element and the lead. CONSTITUTION:A bump electrode 2 on a semiconductor element 1 is bonded to a finger lead 4 on a film carrier 3 and then the lead 4 is bent downward to come into contact with an edge of semiconductor element 1. Before performing a probing inspection, a heated stage 10 is laid immediately below the element 1 and the surface of semiconductor element 1 made of teflon etc. is pressurized downward by a pressurizing jig 11 not to scratch the surface thereof. Through these procedures, the lead 4 may be trimmed instantaneously while separating the electric contact between the finger lead 4 and the edge of the semiconductor element 1.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は複数本のリード群と半導体素子上の電極群との
接続後のリード整形に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to lead shaping after connecting a plurality of lead groups to an electrode group on a semiconductor element.

(従来例の構成とその問題点) フィルムキャリアを用いた場合の、フィルムキャリアと
半導体素子との接続方法及びその後のプローブ検査につ
いて第1図、第2図、第3図に従って説明する。1は半
導体素子、2は半導体素子上の突起電極、3はフィルム
キャリア、4はフィルムキャリア上のフィンガーリード
、5[加熱ノール、6は接合終了した半導体素子、7は
フィルムキャリア上のグローブ検査用)ξ7ド、8はグ
ローブ、9は酸化膜等の絶縁膜でるる。
(Structure of conventional example and its problems) A method of connecting a film carrier and a semiconductor element when a film carrier is used and a subsequent probe test will be described with reference to FIGS. 1, 2, and 3. 1 is a semiconductor element, 2 is a protruding electrode on the semiconductor element, 3 is a film carrier, 4 is a finger lead on the film carrier, 5 is a heating knob, 6 is a semiconductor element after bonding, 7 is a glove for inspection on the film carrier ) ξ7, 8 is a globe, and 9 is an insulating film such as an oxide film.

半導体素子1上の突起電極2とフィルムキャリア3上の
フィンガーリード4とを位置合せした後に加熱ツール5
で加熱加圧し両者を接合せしめる。
After aligning the protruding electrodes 2 on the semiconductor element 1 and the finger leads 4 on the film carrier 3, the heating tool 5
Heat and pressurize to join the two.

接合終了した半導体素子6は次に接合の良否をみるため
にプローブ検査を行う。グローブ検査は第2図、第3図
に示す如く、フィルムキャリア3」二のフィンガーリー
ド4の延長上にある検素用パッド7にグローブ8を接触
させて行う。ところが、半導体素子1上の突起電極2と
フィルムキA、 17ア3上のフィンガーリードとの接
合時に、加熱ツール5の熱の影響によりフィルムキャリ
ア3やフィンガーリード4の加熱ンール5に近い部分が
熱変形し、第3図に示す如くフィンガーリード4が半導
体素子lのニップ部に接触することがある。半44体素
子1のエッヂ部は半導体ウェハーを個々の半導体素子に
切断分割するのを容易化するために酸化膜等の絶縁膜9
を除いである。そのだめ、半導体素子lのエッヂ部は一
般にSiが直接露出している。フィルムキャリア3やフ
ィンガーリード4の熱変形のためにフィンガーリード4
が半導体素子1のエッヂ部に接触した場合、(実際は半
導体素子1は正常に動作する良品であっても)プローブ
検査時には不良と判断される。
After the bonding is completed, the semiconductor element 6 is then subjected to a probe test to check the quality of the bonding. The glove test is carried out by bringing the glove 8 into contact with the test pad 7 located on the extension of the finger lead 4 of the film carrier 3, as shown in FIGS. 2 and 3. However, when bonding the protruding electrodes 2 on the semiconductor element 1 and the finger leads on the film keys A and 17A 3, the portions of the film carrier 3 and finger leads 4 near the heating ring 5 are heated due to the influence of heat from the heating tool 5. The finger leads 4 may be deformed and come into contact with the nip portion of the semiconductor element 1, as shown in FIG. An insulating film 9 such as an oxide film is formed on the edge of the semi-44-piece device 1 to facilitate cutting and dividing the semiconductor wafer into individual semiconductor devices.
except for. However, Si is generally directly exposed at the edge portions of the semiconductor element 1. Finger lead 4 due to thermal deformation of film carrier 3 and finger lead 4
If the semiconductor element 1 comes into contact with the edge portion of the semiconductor element 1, the semiconductor element 1 is determined to be defective during the probe test (even if the semiconductor element 1 is actually a good product that operates normally).

(発明の目的) そこで、本発明は上記欠点を除去するために、プローブ
検査前にリード4と半導体素子1のニップ部との電気的
接触を断つ方法を提供するものである。
(Object of the Invention) Therefore, in order to eliminate the above-mentioned drawbacks, the present invention provides a method of breaking electrical contact between the lead 4 and the nip portion of the semiconductor element 1 before probe testing.

(発明の構成) 本発明は、半導体素子1上の突起電極2とフィルムキャ
リア3上のフィンガーリード4との接合後かつプローブ
検査時に半導体素子1及びフィンガーリード4を加熱し
ながらフィンガーリード4を整形することにより、フィ
ンガーリード4と半導体素子1のエッヂ部との電気的接
触を断つものである。
(Structure of the Invention) The present invention involves shaping the finger leads 4 while heating the semiconductor element 1 and the finger leads 4 during probe inspection and after bonding the protruding electrodes 2 on the semiconductor element 1 and the finger leads 4 on the film carrier 3. By doing so, electrical contact between the finger leads 4 and the edge portions of the semiconductor element 1 is cut off.

(実施例の説明) 本発明による一実施例を第4図および第5図に従って説
明する。第1図、第2図、第3図と同一部分には同一番
号を付している。10は加熱ステージ、11は加圧治具
、12は吸引孔である。
(Description of Embodiment) An embodiment according to the present invention will be described with reference to FIGS. 4 and 5. The same parts as in FIGS. 1, 2, and 3 are given the same numbers. 10 is a heating stage, 11 is a pressure jig, and 12 is a suction hole.

半導体素子1上の突起電極2とフィルムキャリア3上の
フィンガーリード4との接合後は第3図に示す如くフィ
ンガーリード4は下方へ折れ曲り半導体素子1のエッヂ
部と接触している。この状態でプローブ検査前に半導体
素子1の下方から300℃程度に加熱されたステージ1
0を1冑接させる。さらに半導体素子lの上方よりテフ
ロン;′Cどの半導体素子表面を傷っけないような加圧
治具11で半導体素子1を加圧する。フィンガーリード
4は常温時に比べて加熱することにより変形が容易にな
るため、加圧治具11・の加圧力は数十g程度で良く、
きわめて短時間で整形することができる。これによりフ
ィンガーリード4と半導体素子1のエッヂ部との電気的
接触を断つことができる。半導体素子表面に加圧治具1
1を押しつけられない場合は、ステージ1oに吸引孔1
2を設け、半導体素子裏面を加熱すると同時に吸引し、
下方に少し引っ張った状態で吸引を中止すれば同イ糸の
効果が得られる。
After the protruding electrodes 2 on the semiconductor element 1 and the finger leads 4 on the film carrier 3 are bonded, the finger leads 4 are bent downward and are in contact with the edge portions of the semiconductor element 1, as shown in FIG. In this state, the stage 1 is heated to about 300°C from below the semiconductor element 1 before the probe test.
Connect 0 to 1. Further, the semiconductor element 1 is pressurized from above the semiconductor element 1 using a pressing jig 11 made of Teflon or other such material that does not damage the surface of the semiconductor element. Since the finger leads 4 are easier to deform when heated than when heated at room temperature, the pressing force of the pressing jig 11 may be approximately several tens of grams.
It can be shaped in an extremely short time. This makes it possible to break electrical contact between the finger leads 4 and the edge portions of the semiconductor element 1. Pressure jig 1 on the surface of the semiconductor element
If you cannot press the suction hole 1 on the stage 1o.
2 is installed to heat the back surface of the semiconductor element and simultaneously suck it,
If you stop suction while pulling it slightly downward, you can get the same effect as the same thread.

本発明の一実施例として半導体素子1上に突起電極2か
形成されている場合について説明したが逆にフィルムキ
ャリア3のフィンガーリード4の先端に突起物が形成さ
れている場合についても同様の効果が期待できる。
As an embodiment of the present invention, a case has been described in which a protruding electrode 2 is formed on a semiconductor element 1, but conversely, the same effect can be obtained when a protruding object is formed at the tip of a finger lead 4 of a film carrier 3. can be expected.

(発明の効果) 以上、本発明により半導体素子のエッヂ部とフィンガー
リードとの接触は完全に断つことができる。半導体素子
上の突起電極とフィルムキャリア上のフィンガーリード
と接合後では半数以上のICが半導体素子のエッヂ部と
フィンガーリードのうち少なくとも1本以上が接触して
いたが、実施例に示した方法により、接触は完全に無く
することができた。
(Effects of the Invention) As described above, according to the present invention, the contact between the edge portion of the semiconductor element and the finger lead can be completely cut off. After bonding the protruding electrodes on the semiconductor element and the finger leads on the film carrier, more than half of the ICs had at least one of the finger leads in contact with the edge of the semiconductor element, but by the method shown in the example , contact could be completely eliminated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は半導体素子上の突起電極とフィルムキャリアの
リード群との接合方法を示す図である。 第2図はプローブ検査時の図である。 第3図は半導体素子のエッヂ部とリード群との接触を示
す図である。 第4図、第5図は本発明における実施例を示す図である
。 1・・・半導体素子、2・・・突起電極、3・・・フィ
ルムギヤリア、4・・リード、5・・・加熱ソール、6
 接合後の半導体素子、7・・・検査用ハツト・ 8°
゛ゾ0−ブ・9・・絶縁膜、10・・・加熱ステージ、
11・・加圧治具、12・吸引孔。
FIG. 1 is a diagram showing a method of joining protruding electrodes on a semiconductor element and a lead group of a film carrier. FIG. 2 is a diagram at the time of probe inspection. FIG. 3 is a diagram showing the contact between the edge portion of the semiconductor element and the lead group. FIGS. 4 and 5 are diagrams showing embodiments of the present invention. DESCRIPTION OF SYMBOLS 1...Semiconductor element, 2...Protruding electrode, 3...Film gear rear, 4...Lead, 5...Heating sole, 6
Semiconductor element after bonding, 7...Inspection hat 8°
゛zo0-bu・9...Insulating film, 10...Heating stage,
11. Pressure jig, 12. Suction hole.

Claims (3)

【特許請求の範囲】[Claims] (1)複数本のリード群と半導体素子上の電極群とを接
続終了後に、半導体素子及びリード群を加熱しながら半
導体素子主面から裏面に向う方向へ力を加えリード群を
一括整形することを特徴とする半導体装置の製造方法。
(1) After connecting a plurality of lead groups and an electrode group on a semiconductor element, applying force in a direction from the main surface of the semiconductor element toward the back surface while heating the semiconductor element and lead group to collectively shape the lead group. A method for manufacturing a semiconductor device, characterized by:
(2)先端に耐熱性樹脂部を有する治具で半導体素子表
面を押圧することを特徴とする特許請求の範囲第(1)
項記載の半導体装置の製造方法。
(2) Claim No. 1, characterized in that the surface of the semiconductor element is pressed with a jig having a heat-resistant resin portion at the tip.
A method for manufacturing a semiconductor device according to section 1.
(3)半導体素子裏面が載置されたステークの吸引孔で
該素子を吸引し主面から裏面に向う方向へ力を加えるこ
とを特徴とする特許請求の範囲第(1)項記載の半導体
装置の製造方法。
(3) The semiconductor device according to claim (1), wherein the device is sucked by a suction hole of a stake on which the back surface of the semiconductor device is placed, and force is applied in a direction from the main surface to the back surface. manufacturing method.
JP59060997A 1984-03-30 1984-03-30 Manufacture of semiconductor device Granted JPS60206143A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59060997A JPS60206143A (en) 1984-03-30 1984-03-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59060997A JPS60206143A (en) 1984-03-30 1984-03-30 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS60206143A true JPS60206143A (en) 1985-10-17
JPH0462458B2 JPH0462458B2 (en) 1992-10-06

Family

ID=13158576

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59060997A Granted JPS60206143A (en) 1984-03-30 1984-03-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS60206143A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04343239A (en) * 1991-05-20 1992-11-30 Fujitsu Ltd Bonding tool

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5449069A (en) * 1977-09-27 1979-04-18 Nec Corp Method and device for lead correction

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5449069A (en) * 1977-09-27 1979-04-18 Nec Corp Method and device for lead correction

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04343239A (en) * 1991-05-20 1992-11-30 Fujitsu Ltd Bonding tool

Also Published As

Publication number Publication date
JPH0462458B2 (en) 1992-10-06

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