JPS6020728A - Power source for flash discharge lamp - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] The present invention relates to a power supply device for a flash discharge lamp.

A flash discharge lamp is used as a light source for exposure or a heat source for toner image fixing in copying machines, facsimile machines, etc.As a power supply device for lighting a flash discharge lamp, for example,
Conventionally, power supply devices using a leakage transformer, power supply devices using a commercial transformer, etc. are known, but all of these power supply devices have the drawbacks of being large and heavy. In particular, when a flash discharge lamp is used as a heat source for toner image fixing in a copying machine, a facsimile machine, etc., the above-mentioned drawbacks are greatly exacerbated because in recent years there has been a strong desire for smaller and lighter copying machines and facsimile machines.

For this reason, a flash discharge lamp power supply device using an inverter having a semiconductor switching device has recently been developed, and this power supply device has the advantages of being small and lightweight.

FIG. 1 is an explanatory circuit diagram showing an example of the configuration of such a flash discharge lamp power supply device. In this example, 1 is an inverter connected to a DC power source E, and this inverter 1 includes transistors 11 and 12 made up of semiconductor switching elements, three capacitors 13, 14, and 15. diode 16°]7. The collector of the transistor 11 is connected to the positive side of the DC power supply E;
t,) The emitter of the transistor 11 is connected to the collector of the transistor 12, and the emitter of the transistor 12 is connected to the negative side of the DC power supply E. A capacitor 13 and a capacitor 14 are connected in series between the connection point between the positive side of the DC power supply E and the collector of the transistor 11, and the connection point between the negative side of the DC power supply E and the emitter of the transistor 12. 13 and the connection point of the capacitor 14,
Transistor 11. A capacitor 15 and the 11th coil of the step-up transformer 2 connected to the next stage are connected in series between the emitter of and the collector of the transistor 12.The bases of the transistors 11 and 12 will be described later. 2υ, between the collector and emitter of transistor 11 and between transistor 12
Diodes 16 and 17 are connected between the collector and emitter of the diodes 16 and 17, respectively.

2 is a step-up transformer, and the primary coil of this step-up transformer 2 is connected in a straight line as described above.
The secondary coil is connected to the input terminal of the next stage rectifier circuit 3. 03 is a voltage doubler rectifier type rectifier circuit, and this rectifier circuit 3
is composed of four diodes 31, 321, 33v34 and four capacitors 35, 36, 37238. A capacitor 35 and a diode 31 are connected in series to the secondary coil of the transformer 2, and a diode 33 and a capacitor 37 are connected in series to both ends of the diode 31. , a capacitor 36 and a diode 32 are connected in series between the connection point of the secondary coil and the diode 31,
A diode 34 and a capacitor 3 are connected to both ends of the diode 32.
8 are connected in series.

4 is a t'tfC charge/discharge capacitor connected between the output terminals of the advection circuit 3; a flash discharge lamp 7 is connected to both ends of the charge/discharge capacitor 1; The electric charge necessary for flash generation is supplied to the flash.

100 is a semiconductor switching element control mechanism (hereinafter simply "
control mechanism. ), this control mechanism 100 is
An error amplifier 101 that receives the voltage across the charging/discharging capacitor 40 as input 1g, a reference voltage source 102 that provides a reference voltage to this error amplifier 101, an oscillator 103 that generates a rectangular wave-like pulse signal, and from this oscillator 103 a pulse width converter 104 which receives a pulse signal, adjusts the pulse width of this path signal based on a signal from a total error amplifier 101, and outputs the signal alternately from an output terminal; The drive circuit 105 is configured to alternately drive the transistors 11 and 12 based on signals alternately output from the output terminal.

The pulse width converter 104 includes a sawtooth wave generator 106 that receives a pulse signal from the oscillator 103 and generates a sawtooth wave signal of the same frequency, and a signal from the error amplifier 101 and a sawtooth wave generator 106. A converter that receives a sawtooth wave signal from the error amplifier 101 and outputs a "low level" signal when the signal voltage from the error amplifier 101 is larger than the sawtooth signal voltage, and outputs a "high level" signal when it is smaller than the sawtooth signal voltage. 107, the output signal of this comparator 107, the pulse signal from the oscillator 103, and the ρ AND signal are output, and when the output signal of the comparator 107 is "low level", the output is zero, and conversely, when it is "high level", the output signal is "low level". oscillator 1 when
An AND gate 108 outputs a signal with the same pulse width as the Norx signal of 03, and receives an output signal from this AND gate 108, and outputs this signal alternately from two output terminals Q and Q'. An ant game 1 which receives three signals from a Noritsubu flop circuit, an AND gate 108, one output terminal Q of the flip-flop circuit 109, and a glow prevention ID generator 9, and outputs an AND signal thereof. −
110 and ANDGATE 108. Three signals from the other output terminal Q of the flip-flock circuit 109 and the glow prevention signal generation mechanism 9! The glow prevention signal generation mechanism 9 operates in conjunction with the generation of a trigger circuit drive signal that drives a trigger circuit 8, which will be described later. 8n, when activated, the anti-glow signal is "low level" 77
:The anti-glow signal is at a "high level" when not activated.
, and when this anti-glow signal is at a "low level", II
8 is a trigger circuit for driving the trigger electrode 71 provided in the flash discharge lamp 7; this trigger circuit 8' is a trigger circuit for driving the trigger electrode 71 provided in the flash discharge lamp 7; A pulse transformer 81 with a secondary coil connected between the pulse transformer 81 and the cathode of the flash discharge lamp 7, a capacitor 82 and a thyristor 83 connected in series to both ends of the primary coil of this pulse transformer 81, Zener diode 84 connected to both ends of thyristor 83
, a resistor 85 connected between the anode of the thyristor 83 and the anode of the flash discharge lamp 7, and a resistor 86 connected between the gate and the cathode of the thyristor 83,
When a trigger circuit drive signal is manually applied to the signal input terminal a connected to the gate of the thyristor 83, the trigger electrode 71
According to a power supply device having a configuration in which a high voltage is applied to 8 or more, in Inno Niri 1, the control mechanism 100 turns on and off the transistors 11 and 12 alternately, so that the DC power supply E1m, The direct current of 9 is once converted to alternating current, and then this alternating current is again converted to direct current by the rectifier circuit 3, and charges are accumulated in the charging/discharging capacitor 4 by this direct current. When the voltage across the charging/discharging capacitor 4 reaches a level necessary for flash generation, the control mechanism 100
As a result, the pulse width of the pulse current supplied to the bases of the transistors 11 and 12 is controlled to be almost zero, so that the voltage across the charging/discharging capacitor 4 becomes equal to the reference voltage of the reference voltage source 102 of the error amplifier 101. The voltage will be maintained at the set voltage corresponding to the voltage. When the voltage across the charging/discharging capacitor 4 has reached the set voltage in this way, when the trigger circuit drive signal is input to the signal input terminal a, a high voltage is applied to the trigger electrode 71 by the trigger circuit 8, and this As a result, dielectric breakdown occurs between the discharge electrodes of the flash discharge lamp 7, and at this moment, the charge accumulated in the charging/discharging capacitor 4 is supplied to the flash discharge lamp 7, and a flash is generated. Then, in conjunction with the generation of the trigger circuit drive signal, the glow prevention signal generation mechanism 9 is activated, and the AND gate is activated.
A "low level" glow prevention signal is input to 110 and 111 for a certain period of time, and this causes the transistors j1 and 12 to
operation is stopped, the output from the Inno Niri 1 becomes zero, and charging to the charging/discharging capacitor 4 is stopped for a certain period of time, and the flash discharge lamp 7 is prevented from entering a glow discharge state after the flash disappears. Ru.

When the glow prevention signal becomes a "high level" after a certain period of time has elapsed, the control mechanism 100 controls the ditransistors 11 and 1.
The pulse width of the Noculus current supplied to each base of 2 is controlled to be large, and the charge is accumulated in the charging/discharging capacitor 4 again.Flashing occurs repeatedly in the same manner as described above. Let's do it.

However, in the above-mentioned power supply device, after the occurrence of a flash of light, the glow prevention signal is generated and the output of the input terminal 1 is stopped for a certain period of time, but when the generation of the glow prevention signal stops, the transistors 11 and 12 are immediately Since the transistors 11 and 12 are activated again with a large on-time width, a large inrush current may flow into the transistors 11 and 12 at the initial stage of operation, causing the transistors 11 and 12 to be destroyed.On the other hand, the transistors 11 and 12 It is conceivable to provide a soft start circuit that gradually increases the on-time width from zero at the initial stage of operation, but if this is provided separately, the number of parts will increase and the cost will increase. Since it is necessary to operate in synchronization with the prevention signal generation mechanism, its configuration becomes considerably complicated, which is disadvantageous in terms of design.

The present invention has been made based on the above-mentioned circumstances, and has a simple structure, and also allows for strict control of the generation time of the glow prevention signal and the generation time of the soft start signal. The purpose is to provide a complete flash discharge lamp power supply device with a new configuration that can reliably prevent discharge and destruction of semiconductor switching elements in the inverter. an inverter, a rectifier circuit connected to the output end of the inverter, a charging/discharging capacitor connected to the output end of the rectifying circuit, and a flashlight I connected to both ends of the charging/discharging capacitor. ``The lamp includes a trigger circuit that applies a trigger voltage upon receiving a trigger circuit drive signal, and a trigger circuit that detects the discharge current of the charging/discharging capacitor, and based on this detection signal, a glow prevention signal and a software an inverter control signal generating mechanism that generates a start signal; and upon receiving a glow prevention signal from the instantaneous control signal generating mechanism, stopping the operation of the semiconductor switching elements in the inverter; and upon receiving a soft start signal, a semiconductor switching element control mechanism that gradually increases the on-time width of the semiconductor switching element from zero, and the inverter control signal generation mechanism is sequentially connected between a reference voltage source and ground. a first voltage dividing resistor and a second voltage dividing resistor, a capacitor connected to both ends of the first voltage dividing resistor, and a capacitor connected to both ends of the capacitor; A switching element that shorts the capacitor, a first voltage dividing resistor, and a second voltage dividing resistor.
An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is an explanatory circuit diagram showing an embodiment of the present invention,
Components that are the same as those shown in FIG. 1 are denoted by the same reference numerals, and explanations thereof will be omitted because they are the same. Reference numeral 90 denotes an inverter control signal generation mechanism, and as shown in detail in FIG. a current transformer 901 connected to the current transformer 901, a waveform shaping resistor 902 connected to both ends of the secondary coil of the current transformer 901, a waveform shaping capacitor 903 connected to both ends of the resistor 902, and a waveform shaping capacitor 903 connected to both ends of the resistor 902. A voltage dividing resistor 90 connected in series to both ends of the capacitor 903
4 and 905, a diode 906 and a capacitor 907 connected to both ends of one voltage dividing resistor 904, a transistor 908 whose base is connected to the connection point between the voltage dividing resistors 904 and 905, and the emitter of this transistor 908. and a photocoupler 909 with a light emitting diode connected between the connection point between the voltage dividing resistor 904 and the resistor 902.
and a switching element such as a transistor 910 whose base and emitter are respectively connected to the collector and emitter of the phototransistor of this photocoupler 909.
, a resistor 911 connected between the emitter and base of this transistor 910, a capacitor 912 and a first voltage dividing resistor 913 connected between the collector and emitter of the transistor 910, and a connection between the collector of the transistor 910 and the ground. a second voltage dividing resistor 914 connected between
, a comparator 915 whose input terminal is connected to the connection point between the first voltage dividing resistor 913 and the second voltage dividing resistor 914, the capacitor 912, the emitter of the transistor 910,
A reference voltage source 916 whose positive side is connected to the connection point of the first voltage dividing resistor 913 is connected to the reference voltage terminal of the comparator 915. 106 is connected, and the comparator 915
The output terminals of are connected to AND gates 110 and 111 of the control mechanism ioo.

In this comparator 915, when the signal input to the input terminal is larger than the reference voltage, that is, the sawtooth wave voltage, a signal of "r' low level" is output; A pulse width signal is output. The capacitor y'912, the first voltage dividing resistor 91
3. Each of the second voltage dividing resistors 914 can be set according to the required lengths of the glow prevention signal generation time and the soft start signal generation time.

9゛1 is a confirmation signal generation circuit, and this confirmation signal generation circuit 91 is connected to a photocoupler 92 in which a light emitting diode is connected to the collector of a transistor 908 in the inverter control signal generation mechanism 9゜, and an anode of the light emitting diode. A confirmation signal is generated between the output terminals c and d connected to the collector and emitter of the phototonon resistor of the photocoupler 92, respectively. A visualization mechanism such as a pilot lamp or a light emitting diode is connected between the terminals d and d. Signal input terminal M at the other end of the resistor 93
A signal synchronized with the trigger circuit drive signal input to the signal input terminal a connected to the gate of the cyrisk 83 in the trigger circuit 8 is input here.

According to the above embodiment, when the charging/discharging capacitor 4 starts discharging, a discharge current flows through the primary coil of the current transformer 901, and an induced current flows through the secondary coil, so that the current flows across the voltage dividing resistor 904. A voltage corresponding to the discharge current is generated.

This voltage causes conduction between the base and emitter of the Citranlisk 908, causing a current to flow, which activates the photocoupler 909, causing current to flow between the emitter and base of the transistor 910, turning on the transistor 910. . When the transistor 910 is turned on, the first voltage dividing resistor 913 is short-circuited as shown in FIG. The potential at the connection point P of the resistor 914 becomes larger than the peak voltage value Vp from the sawtooth wave generator 106 , and a “low level” signal is output from the comparator 915 . and 1
11, and the outputs of AND gates 110 and 111 become zero. At this time, transistor 1 of inverter 1
1 and 12 are turned off, the output of the inverter becomes zero, and the supply of charge to the charging/discharging capacitor 4 and the flash discharge lamp 7 is stopped, thereby preventing glow discharge after the flash disappears. Ru. Simultaneously with the generation of this anti-glow signal, the capacitor 912 is discharged by the transistor 9]0. Next, charging of the capacitor 912 is performed based on a time constant determined by the capacitance of the capacitor 912 and the resistance of the second voltage dividing resistor 914. In this case, the potential at the connection point P gradually decreases as shown in FIG. 4 in response to the charging of the capacitor 912, and when it becomes smaller than the peak voltage value Vp of the sawtooth wave voltage, as shown in FIG. The comparator 915 outputs a "high level" pulse, that is, a pulse whose time width gradually becomes narrower, corresponding to the time width during which the potential at the connection point P becomes smaller than the sawtooth wave voltage. This signal causes AND gates 110 and 11
1, output signals are generated alternately, transistors 11 and 12 are alternately turned on, and a soft start is performed.

In this way, AC is output again from the inverter l,
Charge is again accumulated in the charging/discharging capacitor 4, and the voltage is charged to the voltage required for the next flash.

As described above, according to the inverter control signal generation mechanism 90,
Switching of transistor 910 and capacitor 912
By utilizing the discharge of the charged charges, it is possible to generate a glow prevention signal and a soft start signal with a simple configuration, thereby preventing glow discharge and inrushing into the transistors 11 and 12 of the inverter 1. Inflow of current can be prevented. The generation time of the glow prevention signal and the generation time of the soft start signal are determined by the capacitance of the capacitor 912, the resistance value of the second voltage dividing resistor 914,
Since the voltage value of the reference voltage source 916 can be precisely determined by selecting the voltage value, the anti-claw signal and the soft start signal can be easily and reliably controlled, which makes it possible to design the device advantageously. can.

In the above, the glow prevention signal generation time is, for example, about 15
The soft start signal generation time is, for example, about 15 to 50 m5ec.

As described above, the invention provides an inverter having a semiconductor switching element 7, a rectifier circuit connected to the output end of the inverter, a charging/discharging capacitor connected to the output end of the rectifying circuit, and a charging/discharging capacitor connected to the output end of the rectifying circuit. A trigger circuit that applies a trigger voltage to the flash discharge lamp connected to both ends of the discharge capacitor when receiving a trigger circuit drive signal, and a trigger circuit that detects the discharge current Z of the charge/discharge capacitor and uses this detection signal -j. '171/IJ, an inverter control signal generator that generates a glow prevention signal and a subsequent soft start signal; a semiconductor switching element control mechanism that stops the operation and gradually increases the on-time width of the semiconductor switching elements in the inverter from zero when receiving a soft start signal, and the inverter control signal generation mechanism is configured to generate a reference voltage a first voltage dividing resistor and a second voltage dividing resistor connected in sequence between the source and the ground; a capacitor connected across the first voltage dividing resistor; and a capacitor connected across the capacitor. It comprises a switching element that shorts the capacitor when receiving the detection signal Z, and a comparator whose input terminal is connected to the connection point of the J-th voltage dividing resistor and the second voltage dividing resistor. Because it is a power supply device for flash discharge lamps characterized by
It has a simple configuration and can strictly control the generation time of the glow prevention signal and the soft start signal generation time, making it possible to reliably prevent glow discharge and damage to the semiconductor switching elements in the inverter. .

[Brief explanation of the drawing]

Fig. 1 is an explanatory circuit diagram showing an example of a conventional flash discharge lamp power supply device, Fig. 2 is an explanatory circuit diagram showing an embodiment of the present invention, and Fig. 3 is an explanatory circuit diagram showing the main part of Fig. 82. 4 and 5 are a curve diagram showing the relationship between the voltage at the connection point P and the sawtooth wave voltage, and an explanatory diagram showing the output signal of the comparator 915, respectively. 1... Inverter E... DC power supply II, 12...
・Transistor 2...Step-up transformer 3...Rectifier circuit 4...Charging/discharging capacitor 7...Flash discharge lamp
71...Trigger electrode 8...Trigger circuit 9...
Glow prevention signal generation mechanism 100...Semiconductor switching element control mechanism 101...Error amplifier 103...
Oscillator 104...Pulse width converter 105...Drive circuit 106...Sawtooth wave generator 107...Comparator 108...AND gate 109...Nurisono/70 knob circuit 110.311... AND gate 90... Inverter control signal generation mechanism 901... Current transformer 904, 905... Voltage dividing resistor 908...
...Transistor 909...Photocoupler 9]0
...L run lister 913...first voltage dividing resistor 9
14...Second voltage dividing resistor 9+5...Comparator 916...Reference voltage source 9
1... Confirmation signal generation mechanism 92... Photo coupler

Claims (1)

[Claims] 1) An inverter having a semiconductor switching element, a rectifier circuit connected to the output end of the inverter, a charging/discharging capacitor connected to the output end of the rectifier circuit, and a charging/discharging capacitor connected to the output end of the rectifier circuit. Both ends of the charging/discharging capacitor (two connected to the flash discharge lamp (2), when the trigger circuit receives a drive signal (the trigger circuit that applies Nidoriger voltage and the discharge of the charging/discharging capacitor) detects the current, An inverter control signal generation mechanism generates a glow prevention signal and a subsequent soft start signal based on the detection signal C, and when the glow prevention signal from the inverter control signal generation mechanism is received, the inverter (semiconductor switching a semiconductor switching element control mechanism for stopping the operation of the element and gradually increasing the on-time width of the semiconductor switching element in the inverter from zero to two when receiving a soft start signal; , between the reference voltage source and earth (two sequentially connected Sl
a voltage dividing resistor and a second voltage dividing resistor, a capacitor connected to both ends of the first voltage dividing resistor, and a capacitor connected to both ends of the capacitor C.
a switching element that shorts the capacitor when receiving the detection signal, and a comparator whose input terminal is connected to a connection point between the first voltage dividing resistor and the second voltage dividing resistor. A power supply device for a flash discharge lamp 0 characterized by comprising: