JPS60257609A - Output circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] This invention relates to an output circuit that is optimal for use with t- or R old, + seated H alliance, and is ideal for power saving. is.

[Prior art]

In a semiconductor integrated circuit, for example, an example of a conventional output circuit of this type that converts the output of a differential amplifier into impedance to reduce impedance is shown in FIG. 1. In the figure, 1 is a power supply terminal to which a power supply voltage is applied. , 2 is an output terminal from which an output can be obtained, 63 is a signal source, 4.5 is an NPN transistor whose emitters are connected in common, and 6 is this NPN transistor.
) A constant current source is connected between the emitter connection point of the transistors 4 and 5 and ground, and these constitute a differential amplifier 7. Each base of the NPN) transistor 4.5 in this differential amplifier 7 is connected to the signal source 3,
The collector of the NPN) transistor 4 is connected to the power supply terminal 1, and the collector of the NPN) transistor 5 is connected to the power supply terminal 1 via the load resistor 8. 9 is an NPN transistor constituting the output circuit, the collector of which is connected to power supply terminal 1, the emitter grounded via constant current source 10 and connected to output terminal 2, and the base of which is an NPN transistor.
) is connected to the connection point between the collector of the transistor 5 and the load resistor 8. This output terminal 2 is grounded via a load 11 having a resistance value RL and a capacitor 12 in series.

The operation of the output circuit configured in this manner will be explained with reference to FIGS. 2(a) and 2(b), which are explanatory diagrams showing the flow of current.

Since the operation of the differential amplifier 7 is generally well known, a detailed explanation thereof will be omitted, but an input is applied from the signal source 3 to each base of the NPN transistors 4 and 5. A differential output is obtained from the collector of the NPN transistor 5.

Then, consider the case where a load 11 with a resistance value RL is connected to the output terminal 2 and the output amplitude is a sine wave of 2Vp -P.
During one positive half cycle of the sine wave, Fig. 2 (a)
As shown by the arrow in Figure 2, current flows from the output circuit to the resistor of the load 11, and in the negative half cycle, the current flows from the resistor of the load 11 as shown by the arrow in Figure 2). Current will flow towards the circuit.

Therefore, the current flowing through the NPN transistor 9 of the output circuit is (0+2/2R
L) At the peak of 1 negative I from ampere (To-2/2R
,,) will vary up to amperes. Here, To
is the current value of the constant current source 10.

Further, in order to prevent the NPN transistor 9 from being cut off at the peak of the negative 1 of the sine wave, the constant current source 10 must constantly flow a current of IO>2/2RL.

In this way, in the conventional output circuit, a current corresponding to the output amplitude flows through the NPN transistor 9, and therefore,
The drawback is that the power supply current fluctuates depending on the output amplitude, and it is necessary to keep a large amount of constant current flowing.

[Summary of the invention]

In view of the above points, the present invention has been made to solve such problems and eliminate such drawbacks.The purpose of the present invention is to use a simple circuit configuration to operate the output transistor with the same current regardless of the output amplitude. You can also
An object of the present invention is to provide an output circuit that can reduce current and realize power saving.

In order to achieve such an object, the present invention uses a load resistor and a diode connected in series as a load of a differential amplifier, and connects the connection point between the load resistor and the diode to a first terminal whose collector is connected to a power supply. The other end of the diode is connected to the base of a second transistor whose emitter is connected to the power supply via a resistor and whose polarity is different from that of the first transistor. A current mirror circuit using a third transistor having the same polarity as the first transistor is connected between the emitter of the transistor and the collector of the second transistor, and an output is output from the emitter of the first transistor. It was designed to be taken out.

[Embodiments of the invention]

Embodiments of the present invention will be described in detail below based on the drawings.

FIG. 3 is a circuit diagram showing an embodiment of the output circuit according to the present invention.

In FIG. 3, the same reference numerals as in FIG.
is a PNP) transistor connected to 15 is a load resistor, 16 is a diode connected in series to this load resistor 15, and these are connected between the collector of the differential amplifier TO negative load (NPN) transistor 5 and power supply terminal 1, The connection point between diode 16 and diode 16 is connected to the base of NPN transistor 9, and diode 1
The cathode side of 6 is connected to the base of a PNP transistor 13. 5. 17 is a current mirror circuit connected between the emitter of the NPN transistor 9 and the collector of the PNP transistor 13; PNP) diode 18 connected between the collector of the transistor 13 and ground;
The collector is connected to the emitter of NPN) transistor 9, the emitter is grounded and the base is PNP) transistor 13
NP connected to the connection point between the collector of and the diode 18
N) Consisting of transistors 19.

Next, the operation of the embodiment shown in FIG. 3 will be explained with reference to FIG. 4, which shows the flow of current.

First, since the current flowing through the current mirror circuit 17 is set by the PNP transistor 13, the emitter potential of the PNP transistor 13 increases during the 1 positive half cycle of the output, so the emitter potential across the emitter resistor (resistance 14) increases. Since the collector current of the transistor 13 (PNP) decreases, the current 11 (see current line 1 shown in FIG. 4) flowing through the current mirror circuit 17 decreases.

-10,000, from the output NPN transistor 9 to the load 1 in Figure 4
Since the current rs flowing through the resistor 1 increases as in the conventional circuit shown in FIG. 1, the current rs flowing through the output NPN transistor 9 does not change much.

Conversely, during the negative half cycle of the output, the current Is decreases while the current 1 increases, and as shown by the arrow, the current flowing through the output NPN) transistor 9 becomes 11+1.
．． will not change.

In addition, in the conventional circuit shown in FIG.
While the constant current source 10 always supplies a large amount of current assuming the maximum value of Since it uses , there is no need to keep unnecessary current flowing, and it is possible to save power.

As described above, the present invention suppresses fluctuations in the operating point of the output transistor in the output circuit and reduces the current by using a current source whose current changes according to a signal instead of a constant current circuit. The overall current can be reduced by reducing fluctuations in the current flowing through the output transistor and by allowing an optimum current to flow.

In the above embodiment, an NPN type polarity transistor is used as the transistor 9°19, and the transistor 1
3, the case where a PNP type polarity transistor is used has been explained as an example, but the present invention is not limited to this.It goes without saying that the same advantages can be obtained even if the transistors are replaced with NPN transistors and PNP transistors. stomach.

In this case, the polarity of the power supply and the polarity of the diode connection may be reversed.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, the output transistor can be controlled according to the amplitude of the output by using a simple circuit configuration using a current source whose current changes according to the signal, without using complicated means. First, it can be operated with the same current, and the current can be reduced to achieve power saving, so the practical effects are extremely significant.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an example of a conventional output circuit, FIG. 2 is an operation explanatory diagram showing the flow of current in FIG. 1, and FIG. 3 is a circuit diagram showing an example of an output circuit according to the present invention. Figure 4 is the third
FIG. 3 is an operation explanatory diagram showing the flow of current in the figure. 7・@-・Differential amplifier, 9Φ...-NPN) transistor, 13...PNP) transistor, 14゜15-・
--Resistance, 16.9, Tie Auto, 17, Struggle, Current Mirror Circuit, 1811-Fist, Diode, 19, Medium...
NPN) transistor. Agent Masuo Oiwa Figure 2 i'1 11 Figure 3 Figure 4

Claims (1)

[Claims] A load resistor and a diode connected in series are used as the load of the differential amplifier, and the connection point between the load resistor and the diode is connected to the base of a first transistor whose collector is connected to the power supply, and the other end of the diode is connected to the base of a first transistor whose collector is connected to the power supply. is connected to the base of a second transistor whose emitter is connected to the power supply via a resistor and whose polarity is different from that of the first transistor, and the emitter of the first transistor and the collector of the second transistor are connected to each other. An output circuit characterized in that a current mirror circuit using a third transistor having the same polarity as that of the first transistor is connected therebetween, and the output is taken out from the emitter of the first transistor.