JPS6026468B2 - Calibration circuit for forward current amplification factor measurement device - Google Patents

Description

Detailed Description of the Invention The present invention provides a forward current amplification factor measuring device used to correct measurement errors in a forward current amplification factor measuring device that regularly measures the current amplification factor of an element under specified conditions. Regarding the Samesho circuit.

FIG. 1 is a block diagram showing a schematic configuration of a daily current amplification factor measuring device for measuring the forward current amplification factor (hF8) of an NPN type transistor as a mystery transistor.

To measure hFE of transistor 1 with such a device, the collector-emitter voltage VcE of transistor 1 must be
The base current IB is changed by adjusting the output voltage of the power source 2 so that the voltage becomes a specified value, and adjusting the output voltage of the bias power source 3 so that a specified collector current lc flows. And hFE can be determined by the ratio of the collector current lc to the base current 8, that is, the ratio. At this time, lc,
When IB is a large current, the base current IB is periodically switched on and off by switch 4 in order to minimize changes in hF8 due to temperature rise at the junction of transistor 1.
In the figure, a resistor 5 is connected in series with the switch 4.
is for protecting transistor 1. FIG. 2 is a block diagram specifically showing the forward current amplification factor measuring device shown in FIG. 1 above. In the figure, 11 is a voltage setting circuit for setting the collector-emitter voltage VcE of the transistor 1, and this voltage setting circuit 1 1 is a D/A converter 12 that outputs a current of a value according to n bits of digital information. , a voltage converter 13 that outputs a voltage according to the output current of this D/A converter 12, this voltage converter 13
An inverting amplifier 1 inverts and amplifies the output voltage of and supplies this voltage to the collector of the transistor 1 via a force terminal (Ci) while detecting the supply voltage at a sense terminal (Cv).
4. The emitter voltage of transistor 1 is connected to the sense terminal (Ev
), an inverting amplifier 16 that inverts and amplifies the output voltage of the voltage follower 15, and a resistor connected between the output terminal of the inverting amplifier 16 and the input terminal of the inverting amplifier 14. It consists of 17. That is, in the voltage setting circuit 11, the emitter voltage of the transistor is detected by the voltage follower 15, and this detected voltage is inverted and supplied to the input terminal of the inverting amplifier 14, thereby setting the emitter voltage of the transistor 1 regardless of the emitter voltage. Collector-emitter voltage VcE
is always set to a voltage according to input digital information. Further, in the figure, 21 is a current setting circuit for setting the collector current lc of the transistor 1, and this current setting circuit 21 is connected to the D/A converter 2 which outputs a current of a value according to n bits of digital information.
2. An inverting amplifier 24 that outputs a voltage according to the output current of the D/A converter 22, which is connected between the output terminal of the inverting amplifier 24 and the force terminal (Ei) to which the emitter of the transistor 1 is connected. a voltage follower 26 that detects the voltage at one end a of the variable resistor 25; an inverting amplifier 27 that inverts and amplifies the voltage at the other end b of the variable resistor 25; By inverting and amplifying the added voltage with the output voltage of the inverting amplifier 27, the variable resistor 2
6, and a resistor 29 connected between the output terminal of this inverting amplifier 28 and the input of the inverting amplifier 24.

That is, in the current setting circuit 21, the force terminal (
A specified collector current lc is applied to the variable resistor 25 via Ei).
flows, the voltage drop across the variable resistor 25 is operated so as to match the voltage corresponding to the input digital information of the D/A converter 22, and a specified collector current lc is caused to flow through the transistor 1. ing. Furthermore, in the figure, 31 is a current measuring circuit for measuring the value of the base current 18 flowing into the base from the force terminal (Bi) connected to the base of the transistor 1, and the input terminal of this current measuring circuit 31 is Force terminal (
Bi), an operational amplifier 32 whose output end is connected to the force terminal (Ei) via a resistor 33, and an operational amplifier 34 that forms a closed loop with the operational amplifier 32 to flow the base current IB; The operational amplifier 32
A variable resistor 35 is connected between the input terminal and the output terminal of the terminal for determining the range of the current flowing in the closed loop, a voltage follower 36 is for detecting the voltage at the force terminal (Ei), and a voltage follower 36 for detecting the voltage at the phase terminal (Ei). Difluorois 36,
An inverting amplifier 37 that inverts and amplifies the voltage of the voltage follower 36, a resistor 38 connected between the output terminal of the inverting amplifier 37 and the input terminal of the operational amplifier 34, and an output terminal of the operational amplifier 32 and the aforementioned operational amplifier. A resistor 39 connected between the input terminal of the amplifier 34, an operational amplifier 40 that detects the output terminal voltage of the operational amplifier 32, and an A/D that converts the output voltage of the operational amplifier 40 into n-bit digital information.
It is composed of a converter 41.

That is, in the current measurement circuit 31, the base current 18 is passed through a closed loop consisting of two operational amplifiers 32 and 34,
The base current 18 is measured by holding the voltage of the force terminal Ei constant by the voltage follower 36, the inverting amplifier 37, and the operational amplifier 34, and converting the output voltage of the operational amplifier 32 into A/○. In order to correct the forward current amplification factor measuring device configured as above,
A standard forward current amplification factor measuring device is prepared in advance, and the element whose hFB is measured with this measuring device is used as a standard element, and its hF8 is taken as a standard value. When calibrating another measuring device, the standard element is measured with the measuring device being calibrated, and each circuit constant is adjusted so that the measured value is not close to the standard value. . Furthermore, if the measured value does not approach the standard value even after adjusting each circuit constant, means such as obtaining an approximate value using a correlation graph or the like is used. In this way, when correcting a forward current amplification factor measuring device, there is a drawback that a large number of standard elements from small current to large current must be prepared, and the standard forward current amplification factor measurement device is This method has the disadvantage that it cannot be calibrated with high precision due to accuracy errors in the device itself and fluctuations due to the temperature of the standard element hFB.

This invention was made in consideration of the above-mentioned circumstances, and its purpose is to provide a forward current amplification method that does not require standard elements and can be used to perform daily current amplification measurement equipment with high accuracy. An object of the present invention is to provide a same-correct circuit for a rate measuring device.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 3 is a circuit configuration diagram of an embodiment of the shark positive circuit of the forward current amplification factor measuring device according to the present invention.

In the figure, terminal T is the force terminal (Ci) and sense terminal (Cv) of the forward current amplification factor measuring device shown in FIG.
), and terminals T2 and T3 are similarly connected to a sense terminal (Ev) and a force terminal (Ei), respectively. A resistor 51 is connected between the terminals T and T2, and a resistor 52 is connected between the terminals T and T3. Furthermore, one end a of the resistor 52 has an input end of a voltage follower 53 for detecting the voltage thereon, and the other end b has an input end of another voltage follower 54 for detecting the voltage here. are connected to each other. The output terminal of the voltage follower 54 is connected to the input terminal of an operational amplifier 56 via a resistor 55. Further, a resistor 57 is connected between the input end and the output end of the operational amplifier 56. That is, the operational amplifier 56' together with the two resistors 55 and 57 constitute an inverting amplifier 58 that inverts and amplifies the output voltage of the voltage follower 54 at a multiplier according to the resistance ratio of the two resistors 55 and 57.
Its output terminal is connected to the input terminal of an operational amplifier 60 via a resistor 59. On the other hand, the output terminal of the voltage follower 53 is connected to the input terminal of the operational amplifier 60 via a resistor 61. Further, a resistor 62 is connected between the input end and the output end of the operational amplifier 60. That is, the operational amplifier 60 constitutes an inverting amplifier 63 together with the three resistors 59, 61, and 62, and inverts and amplifies the output voltage of the voltage follower 53 at a multiplier according to the resistance ratio of the resistors 61 and 62. The output voltage of the inverting amplifier 58 is inverted and amplified at a magnification according to the resistance ratio of the inverting amplifiers 59 and 62, and the two inverted and amplified voltages are summed and output. Further, one end of a variable resistor 64 is connected to the output end of the inverting amplifier 63, and the other end of the variable resistor 64 is connected to the force terminal (Bi) via the terminal T4. Next, a description will be given of the same method using the circuit configured as described above.

Now, in the forward current amplification factor measuring device shown in FIG. 2, the circuit shown in FIG. The voltage between the force terminal (Ci) and the sense terminal (Ev), that is, the collector-emitter voltage Vc8, is set to a predetermined value, and the force terminal (Ei
), that is, the collector current lc, is set to a predetermined value. At this time, the voltage VcE is applied to both ends of the resistor 51 in FIG. 3, and the collector current lc flows to the resistor 52. Therefore, the resistor 52
In this case, a voltage drop corresponding to the collector current lc will occur. Then, the voltage at one end a of the resistor 52 is ea
Then, the voltage follower 53 detects this voltage ea and outputs it to the inverting amplifier 63. Similarly, the resistor 52
Letting the voltage at the other end b be eb, . The voltage follower 54 detects this voltage eb and converts it into an inverting amplifier circuit 58.
Output to. Further, the inverting amplifier circuit 58 inverts and amplifies the voltage eb. Now, the two resistors 55 of this inverting amplifier 58
, 57 are equal, this inverting amplifier 58
The output voltage ec becomes -eb. Furthermore, the inverting amplifier A
Assuming that the resistance values of the three resistors 59, 61, and 62 are equal, the output voltage ed of the inverting amplifier 63 is the sum of the output voltage ea of the voltage follower 53 and the output voltage ec of the inverting amplifier 58 ea + ec becomes. Here e
Since c is -eb, the voltage ed is ea-eb, that is, the output voltage ed of the inverting amplifier 63 is the voltage drop across the resistor 52 when the collector current lc flows. Further, when the output voltage of the inverting amplifier 63 is ed, and the resistance value of the variable resistor 64 is R, the current IB' flowing through the terminal L and the terminal (Bi) becomes blue. By adjusting the resistance value R of the variable resistor 64, it is possible to flow a base current IC having an arbitrary value among the values of the collector current lc.

For example, if the resistance value of the resistor 52 is 1 (Q), this resistor 5
If the collector current lc flowing through 2 is 1 (A), ea=
1(V), eb=0(V), and ed=-1(V). At this time, when the resistance value R of the variable resistor 64 is adjusted to 10 (Q), the value of the base current 118 becomes floo (A), assuming that the direction flowing into the terminal L is the positive direction. That is, in this case, when lc is 1 (A), the circuit shown in FIG. 3 has the same effect as an NPN transistor with a forward current amplification factor hFE of 10. Therefore, at this time, if each circuit constant is adjusted so that the reading at the A/D converter 41 of the forward current amplification factor measuring circuit shown in FIG. The modification of the transistor with hFE=10 is completed. Also, if the resistance value R of the variable resistor 64 is set to 100 (Q) and 1 (KO), respectively,
The values of base current IB are +10 (MA) and 11 (MA), respectively.
In this case, in the circuit shown in Fig. 3, lc is 1 (
When A), hF8 is 100 or 1000, respectively.
It has the same effect as an NPN transistor.

Therefore, at this time, the reading at the A/D converter 41 of the forward current amplification factor measuring device shown in FIG.
If you adjust each circuit constant so that (A) and IB = +1 (mA), hF8 = 10 at lc = 1 (A).
The correction for the transistor with hFB=1000 or hFB=1000 is completed. Further, when the value of the collector current lc is large, the resistance value of the resistor 52 may be made small.

In this way, in the above embodiment, by flowing the specified lc and adjusting the resistance value R of the resistor 64, an arbitrary hF8
Since this circuit is designed to have the same effect as a transistor with , instead of using standard elements, this circuit can be used to correct all types of lc and hP8.

Furthermore, since there is no need to use a standard element whose hFE fluctuates depending on temperature as in the case of a secondary device, the accuracy of the same measurement can be made extremely high. In the above embodiment, the same test was explained when measuring hF8 of an NPN transistor, but it goes without saying that this can also be applied to the same test when measuring a PNP transistor.

As explained above, according to the present invention, a predetermined collector-to-emitter voltage is supplied to the transistor under test, as well as a predetermined collector current, and the base current value input to the base current input terminal is measured. A forward current amplification factor measuring device for determining the forward current amplification factor of a supply transistor includes a first resistor to which the collector-emitter voltage is applied, and a second resistor inserted into the current path of the collector current. a resistor, a means for detecting the potential difference between both ends of the second resistor, and a resistor inserted in series between the means and the base current input terminal of the forward current amplification factor measuring device, and a means for detecting the potential difference between the two terminals of the second resistor, It is equipped with a third resistor whose resistance value is adjusted accordingly, and can provide the same effect as a transistor with any bF8, so there is no need for standard elements and the forward current can be adjusted with high precision. It is possible to provide a correction circuit for a forward current amplification factor measuring device that can perform the same correction of an amplification factor measuring device.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a block diagram showing a schematic configuration of a forward current amplification factor measuring device, FIG. 2 is a block diagram specifically showing the above device, and FIG. FIG. 3 is a circuit configuration diagram of the Samemasa circuit of the current amplification factor measuring device. 11... Voltage setting circuit, 21... Current setting circuit, 3
1...Current measurement circuit, 51, 52...Resistance, 53, 54
...Voltage follower, 58, li...Inverting amplifier, 64...Variable resistor. Figure 1 Figure N Ship chart side

Claims (1)

[Claims] 1. Supply a predetermined collector-to-emitter voltage and a predetermined collector current to the transistor under test, then measure the base current value input to the base current input terminal to determine the forward current amplification factor of the transistor under test. In the forward current amplification factor measuring device, a first resistor to which the voltage between the collector and emitter is applied, a second resistor inserted in the current path of the collector current, and both ends of the second resistor. and a resistor inserted in series between the means and the base current input terminal of the forward current amplification factor measuring device, the resistance value of which is adjusted according to the forward current amplification factor to be set. A calibration circuit for a forward current amplification factor measuring device, characterized in that it comprises a resistor of No. 3.