JPS603203B2 - Control device using electronic timer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device using an electronic timer used to control various functions required in a refrigerator, such as starting and stopping a compressor, starting and ending defrosting, etc. It is.

Conventionally, in controlling refrigerators, control is often performed using various times.

A typical example is '11: The time during which excessive current flows, such as when starting up a compressor (If this time is long, it is determined that there is an overload and the current must be turned off.

Hereinafter, this time will be referred to as overload time. ) Control ■ The time required until the next restart after the above-mentioned overload time (hereinafter, this will be referred to as the overload suspension time).

) [3' Control of defrosting time' 41 Control of the time from the completion of defrosting to the start of the next defrosting (hereinafter referred to as defrosting pause time), etc.

Normally, the time required for [1'~'] is several seconds, several minutes, several tens of minutes, and several hours to several liters of time, respectively. subordinate,'
For 11 and 21, a bimetal switch using a thermal time constant or a timer using a time constant circuit with capacitor C and resistor R is used.For 31 and 21, a mechanical timer is used. However, each of these has the following disadvantages. '11 C,R
Charge/discharge timers require extremely large capacitors to generate times of several minutes, making them impractical.

'21 If mechanical electrical contacts such as bimetals are used, the opening and closing of the contacts may generate sparks, which may cause a gas explosion if used in a gas-filled room. is necessary.

There is also the problem of contact deterioration. [M] Mechanical timers are often single-unit units, so it is necessary to prepare multiple timers depending on the purpose of use. '41 Timers that involve mechanical movement may have lower reliability due to deterioration of the moving parts.

Therefore, it is known to obtain various control time signals using an electronic timer in which a plurality of flip-flop circuits are connected in cascade.

However, when using the electronic timer described above to obtain control signals for setting compressor overload time and overload pause time, each control signal had to be generated by a separate electronic timer.

That is, the compressor overload time is the time after the compressor is started, and the compressor overload down time is the time after the compressor is stopped, so the timing of resetting the timers is different. An object of the present invention is to make it possible to obtain control signals for setting compressor overload time and overload rest time using one electronic timer.

In order to achieve this purpose, in the present invention, the compressor overload downtime itself does not need to be very accurate;
In addition, we focused on the fact that in order to reset the control signal taken out from the electronic timer, if only the vicinity of the stage from which the control signal is taken out is reset, there will be almost no error in the set time. , the first from a predetermined stage of an electronic timer in which flip-flop circuits are connected in cascade in multiple stages.
A second control time signal is output from an upper stage, and the compression is performed in response to the detection signal of the overload current flowing through the compressor and the first control time signal. flip-flop circuits in at least some of the stages that stop the drive of the machine and output the second control time signal, and the stage that is lower than the stage that outputs the first control time signal. The compressor is characterized in that the compressor is reset and restarted in response to the second control time signal.

Embodiments of the present invention will be described in detail below with reference to the drawings.
FIG. 1 is a diagram showing an embodiment of the present invention, and is an overload control circuit for a compressor of a refrigerator.

In other words, in a refrigerator compressor, if the overload time at startup exceeds a specified period (for example, about 2.5 seconds), it is necessary to stop the compressor startup in order to protect the compressor from the overload condition. be. Further, when restarting the compressor after it has stopped, it is necessary to restart the compressor after a specified overload downtime (for example, about 160 seconds) due to the load on the compressor. The embodiment shown in FIG. 1 has these functions. In Fig. 1, terminal 1 is a digital signal input terminal for starting or stopping compressor 2, and this digital signal is sent, for example, from a temperature sensor (not shown) that measures the temperature inside the refrigerator. Input all the circuits.

Reference numeral 3 indicates an alternating current for driving the compressor 2, and 4 indicates a control element (for example, FLS; Five Layer
h is used for Swi), and 5 is an overload detection circuit (details will be described later) that detects overload of the compressor 2.

6 and 7 are logic circuits, and 8 is a differential circuit. 9 is R
- In the S flip-flop, when “1” is input to the reset terminal R and “0” is input to the set terminal S, “1” is input to the output terminal Q.
is output, and the reset terminal R is set to “0”.

When “1” is input to the set state S, “0” is input to the output terminal Q.
” is output. 10 is a binary counter (the figure shows a 14-bit binary counter)
It has a structure in which flip-flops C, C2, .

Note that each flip-flop constituting each bit is not limited to this. 11 is a power supply terminal of each flip-flop, R,, R2, . . . R, 4 are reset signal input terminals of flip-flops C, , C2, .・・・・・・
0 and 4 are flip-flops C,, C2...
...This is the output terminal of C,4.

Further, 12 is a clock pulse generation circuit for driving the binary counter 10, which uses, for example, a pulse whose waveform has been shaped after half-wave rectification of a commercial power source. The operation shown in FIG. 1 will be explained below.

Now, as the clock pulse generation circuit 12, the commercial frequency 5 is used.
When using a clock pulse obtained by half-wave rectification of 0Hz, 2
At the output terminal C8 of the eighth flip-flop C8 of the advance counter 10, a signal at a level of "0" or "1" appears approximately every 2.5 seconds by a well-known counter operation. Similarly, a signal of ``0'' or ``1'' appears at the output terminal ○, 4 of the 14th flip-flop C, 4 about every 16 terms. Therefore, the compressor control signal input Satoko 1
When “1” is input as the drive signal for the compressor, R-
When the output terminal Q of the S flip-flop 9 is set to "1" (it is set to "1" at the same time as the power is turned on), "1" is output as the output of the logic mirror circuit 6. , This signal turns on the control element 4 and drives the compressor 2.

On the other hand, the rising signal of the output of the AND circuit 6 is passed through the differentiating circuit 8 to the flip-flops C, , C of the binary counter 10.
2...C8 reset signal input terminals R,, R2...R
8 and these flip-flops C, . C2・
...Clears C8, sets the initial value of the overload time of the compressor 2 to 0, and starts counting. Now, an overload signal is detected from the overload detection circuit 5 at the same time as the compressor 2 is started, and this signal is applied to the logic mirror circuit 7.

Here, the overload signal means that the compressor 2 normally runs until it reaches a sufficient rotation speed after startup, or when the load is heavy and the compressor 2
If the compressor 2 does not start, this is a signal when an overload current exceeding the rated value flows through the compressor 2. This overload current is detected, for example, by an overload detection circuit as shown in FIG. That is, the overload current detection circuit uses the current transformer 21,
A driving current of the compressor is applied to the primary winding 22, and a resistor 25 is connected to the secondary winding 23 from a DC power supply 24 to maintain a predetermined DC bias, that is, the value of the driving current is within a specified value. If there is, no output will appear at the overload detection output terminal 26, and a pulse signal synchronized with the frequency of the AC power supply 3 will be output from the output terminal 26 only when an overload current (current greater than a specified value) flows. The DC bias under these conditions is left open. The signal at the output terminal 26 is applied to the logic circuit 7 either as is or after passing through a processing circuit such as rectification. On the other hand, the output terminal 08 of the eighth flip-flop C8 of the binary counter 10 is connected to the logic circuit 7, and "1" is output to this output terminal 08 about 2.5 seconds after the compressor 2 is started. appear.

Now, if we consider the case where the overload time continues for 2.5 seconds or more, the output from the overload detection circuit 5 will also be "1", so
"1" appears as the output of the logic register circuit 7, and this signal is applied to the set terminal S of the R-S flip-flop 9. At this time, since "0" is applied to the reset terminal of the R-S flip-flop 9, a "0" signal appears at its output terminal Q. Therefore, even if the drive signal "1" is applied to the input signal terminal 1, the logic mirror circuit 6
The output of the control element 4 becomes "0", and this signal causes the control element 4 to
is turned off, and the compressor 2 stops driving. That is, this control circuit automatically stops driving the compressor 2 when the overload time continues for about 2.9 hours or more. Next, control of overload downtime will be described.

As mentioned above, when "1" appears at the output of the logic neck circuit 7, this output signal is sent to the reset terminal R9 of each of the flip-flops C3, C, and C of the binary counter 10.
・Applied to R,4, flip-flop C9...C
, 4, and start counting by setting the initial value of the overload pause time to approximately 0. Note that the reason why the value is almost 0 is due to an error that occurs because the binary counter 10 also serves to detect overload time. Now, when the compressor 2 stops as a result of the above-mentioned overload control, the output of the overload detection circuit 5 becomes "0", and therefore "0" is applied to the set terminal of the R-S flip-flop 9. Therefore, in this state, the compressor 2 continues to be in a stopped state. In this stopped state, the binary counter 10 counts the overload stop time, and approximately 160 seconds after the compressor 2 stops, the output terminals "1" of the flip-flops C and 4 appear, and this signal is R. -S is applied to the reset terminal R of the flip-flop, so "1" is output to its output terminal Q. If "1" is applied to input terminal 1, the control element 4 is turned on and the compressor 2 is turned on. Start work again. In other words, the control circuit is such that the compressor 2 is not restarted until about 160 seconds after it is stopped. This operation is repeated thereafter. Note that if the overload time is within about 2.5 seconds, "1" will not appear in the output of the AND circuit 7, so the compressor 2 will enter steady operation.

In the embodiment described above, the overload time was set to approximately 2.5 seconds and the overload pause time to approximately 16 seconds, but these times can be easily adjusted by appropriately setting the number of flip-flop stages of the binary counter 10. can be changed to .

Furthermore, the output of the differentiating circuit 8 causes the flip-flop C,
- C8 are cleared, but for example, even if only flip-flops C6, C7, and C8 are cleared, the time error is small. At the same time, the output of the AND circuit 7 clears the flip-flops C9, . , . . . Even if only C, 4 is cleared, the time error is small. In particular, by limiting the clear to some flip-flops in this way, the number of IJ set terminals required for each flip-flop can be reduced, which is advantageous when constructed from integrated semiconductors. Also, flip-flop C9,...
It is also easy to clear C, 4 using the output of the differentiating circuit 6. FIG. 3 is a diagram showing another embodiment of the present invention, in which a defrosting control circuit for a refrigerator is added.

That is, in a refrigerator, fog is formed in the evaporator during the cooling period, and if a large amount of fog is formed, the cooling efficiency of the refrigerator deteriorates. Therefore, it is necessary to defrost the evaporator at an appropriate time. In this example, the defrosting time (
A defrosting control circuit is added which periodically performs a defrosting pause time (approximately 42 minutes) and a defrosting pause time (approximately 21 hours). In the figure,
30 is a defrosting heater, and 32 is a control element (for example, F) that controls the supply of electric power to the defrosting heater. 33 is a binary counter, flip-flop C., C2,...
・This is a binary counter in which C23 is connected in cascade, and the number of stages is increased compared to the embodiment shown in FIG.

Therefore, it is not limited to what is shown in FIG. 36 is a clock pulse generation circuit, which is the same as the clock pulse generation circuit 12 shown in FIG. Other numerals correspond to those of the same numerals in FIG.

Since the control of the compressor has been explained in detail previously, the control of the defrosting heater 30 will be mainly explained here.

Assuming that the flip-flop of the binary counter starts counting from the state of "0", the output terminal ○, 8 of the 18th flip-flop C, 8 of the binary counter outputs "" every 42 minutes.
1" and "0" signals are also sent to the output terminal 023 of the flip-flop C crab of the 22nd flea every 2 hours.
1” and “0” signals appear.

Note that when counting starts from a state in which some of these flip-flops are not "0", the output terminals 0, 8 and 023 initially become "1" or "1" at a time different from about 42 minutes and about 2 hours, respectively. Although the "old" signal appears, such errors only occur when the refrigerator is installed or in the event of a power outage, and these errors in the initial stage do not significantly affect the condition of the refrigerator. Of course, it is also possible to easily set an initial value to the binary counter. Now, to simplify the explanation, let us assume that counting starts with each flip-flop set to "0", and then "1" will be output to the output terminals ○, 8 of flip-flops C and 8 after about 42 minutes. Output.

The power of this world is flip-flop C crab IJ set terminal R2
However, at this point, the flip-flop C is in the "0" state, so there is no change in its output terminal 023. Next, after the start of counting, an output "1" appears at the output terminal 023 of the flip-flop C23 at a very short time. Furthermore, approximately 42 minutes after "1" appears at the output terminal 023, "1" appears at the output terminal ○, 8 of the flip-flop C, 8.
appears, and this output resets the flip-flop C23, and "0" appears at its output terminal 023.
Control element 32 is turned off and the defrost heater stops operating. That is, by this circuit, the flip-flop C2
At the output terminal 023 of No. 3, an output waveform as shown in FIG. 4 is obtained. In the figure, T is the defrosting period (approximately the secretion time),
L indicates the defrosting time (approximately 42 minutes). Note that the defrosting pause time is T, -T2 (approximately 21 hours). With the above circuit, a control circuit with a defrosting period of about 2 hours and a defrosting time of about 42 minutes can be constructed, but each time is not limited to these times, and the number of stages of the binary counter and the final stage can be configured. It is possible to set it appropriately depending on how to take out the reset signal applied to the flip-flop. Generally, the defrosting heater 30 operates while the compressor 2 is stopped.

Therefore, the defrost heater 3 is connected in parallel to the control element 4 of the compressor 2, and when the control element 4 is off, the defrost heater 30' receives power from the power supply 3 through the windings of the compressor 2. It is configured so that it can be used as a gift. Note that the impedance of the winding is very small, so there is little loss. In addition, since the binary counter is used for both overload control and defrost control, and the 1st to 14th flip-flops are shared, several minutes are given to the defrost period T and defrost time T2. Although some error occurs, it is sufficiently small compared to T, , T2, so there is no practical problem. As described above, according to the present invention, it is possible to set the overload time and the overload pause time starting from different times using a single crow-type timer, thereby reducing the size and cost of the control device. Pricing can be realized.

etc., can have extremely excellent advantages.

[Brief explanation of drawings]

FIG. 1 is a diagram showing one embodiment of the present invention, FIG. 2 is a diagram showing a specific embodiment of an overload current detection circuit, FIG. 3 is a diagram showing another embodiment of the present invention, and FIG. The figure is a diagram showing the output waveform of the circuit shown in FIG. 3. In the figure, 1 is an input signal terminal, 2 is a compressor, 3 is an AC source, 4 is a control element, 5 is an overload current detection circuit, 6 and 7 are an AND circuit, 8 is a differential circuit, and 9 is an R- S flip-flop, 1 river or binary counter, 1 1 is power supply terminal, 1
2 is a clock pulse generation circuit, C,,C2,...C,4
0, 02, . . . ○, 4 are output terminals, and R, , R2 . Figure 2 Figure 4 Figure 1 Figure 3

Claims (1)

[Claims] 1. An electronic timer in which flip-flop circuits are connected in series in multiple stages, and a first control time signal is transmitted from a predetermined stage of the electronic timer to a second control time signal from a stage higher than the predetermined stage. means for outputting a control time signal; means for detecting overload current flowing through the compressor; and a detection signal from the detecting means;
In response to the first control time signal obtained from the output means, the drive of the compressor is stopped, and the first control time signal is output at the stage for outputting the second control time signal and at the stage below it. means for resetting the flip-flop circuits of at least some of the stages higher than the stage for outputting the control time signal; and responsive to the second control time signal obtained from the output means, the compressor is operated. 1. A control device using an electronic timer, characterized by comprising means for restarting the timer. 2 Furthermore, when starting and restarting the compressor,
2. The control device according to claim 1, further comprising means for resetting flip-flop circuits in the stage for outputting the first control time signal and at least some stages below the stage.