JPS6039939A - Reception circuit in spread spectrum communication system - Google Patents

Abstract

PURPOSE:To generate a normal sample signal even if noise is superimposed on an inter-phase output by storing the timing which takes a maximum value in one frame of a pseudo noise code so as to generate a sample signal based thereupon. CONSTITUTION:A spread spectrum signal including an information data d(t) and the pseudo noise PN code p(t) is inputted to a correlation circuit 1, shifted by a clock from a shift clock generator 2 to input an output signal phi(t) to a comparator 3 deciding the signal in polarily and a sample and hold circuit 21 detecting the maximum value of the signal. A window signal generating circuit 23 generates a window signal A in one frame length with the output of a ring counter CT22 taking one frame of the PN code as a period, and when the value of the signal phi(t) exceeds the value of the circuit 21 during the period of the signal A, a timing signal generating circuit 24 generates a signal B. A sample signal generating circuit 25 stores the content of the CT22 in response to the signal B, outputs a sample signal C to an FF5 on the basis of the stored content afterward and the signal d(t) is outputted from the FF5.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of the Invention) The present invention relates to improvements in receiving circuits for spectrum broadening (communication systems).

(Prior art and its problems) Spectrum expansion in spread spectrum communication system 11
The signal 5(t) is expressed as 5(t)=d(t)・p(t)・cosωL. Here, d ([) is information data and p(t)
is a pseudo-noise code (hereinafter referred to as PN code), COSω[ is a carrier wave 1, and information data d(
t), PNN code ([) is a 2(plane signal of (+1.-1)).

On the receiving side, a receiving circuit that receives this spectrum spread signal S (t) and demodulates information data d(t) is as follows.
For example, the one shown in FIG. 1 is known.

This receiving circuit mainly shows the parts that are the object of the present invention, and the code string d is
(t)・p (t) is input to the correlation circuit 1, the output signal 5 of the correlation circuit 1; The sample signal generating circuit 4 outputs a sample signal, r3S, and the output of the comparator circuit 3 is taken in at the same timing as the sample signal S, and the information data d(t) is output. It is cultivated with 1 knob 5 for the output flip.

1. The PN code is a code string consisting of one frame of M pits, and the PN code of one frame corresponds to the code of information data. Therefore, the code string d(
t) and p(t) are obtained by inverting the four-dimensional character of the PN code depending on the code of the information filer.

The correlation circuit 1 includes a shift circuit 1a which shifts the code strings d(t) and p(t) in one shift from the shift generator 2 and outputs each tap signal. , the same type as the transmitting side) N code generator 1 that generates an N code
b, a plurality of 11↑ calculators 1C that multiply each tap signal of the shift circuit 1a and one N code of the P N code generator 1b.
, and the output of each multiplier 1G are added to obtain a correlation output signal φ(1
) and a companion circuit 1d that outputs.

In this correlation circuit 1, the correlation between the code string d(1)・p(1) and the PNN code (t) is taken, and the output ψ(1)
corresponds to the sign of the information data, resulting in a signal with a sharp peak in the positive direction or in the negative direction.

This peak point occurs near the boundary f=l of each frame of the PNN code (t).

The ripple signal generating circuit 4 includes a comparator circuit 4a which outputs an output when the correlation horn φ(1) exceeds the positive reference level, and a calculator/lb (-111,). Given the reference level, 11. A comparator circuit 4 that outputs an output when the correlation output φ(1) exceeds the Qt level.
C and both comparison circuits 4. a, 4. It is composed of an OR circuit 4 (1) which outputs either one of the outputs of c, and generates a correlation signal φ(
Lean pulling is performed near the center of the positive peak or near the center of the negative peak in 1), and a sample signal Q3 is output to the flip-flop 5.

The flip-flop 5'c takes in the output of the comparison circuit 3 at the timing of the sample signal S, and stores the information data d.
(t) is output.

(As is known, in this spread spectrum communication system, when the number of bits in one frame of the PN code is M, the power at the correlation peak is M2iB.On the other hand, when the code string d The power of one ringtone included in (t)・p(t) is M
This means that the SN ratio has been improved by M2/M=M times. In other words, with these four types, communication is possible even during M times the ¥I# tone.

However, 1. Since the conventional receiving system is configured to generate a 4-non-pull signal when the correlation output φ(1) exceeds the reference level, the tlI sound is superimposed on the correlation output φ(1). In this case, there is a risk that the sample signal is generated incorrectly, so that the information data d(t) may not be accurately reconstructed.

(Object of the Invention) The object of the invention is to develop a spread spectrum communication system that can reliably generate a regular sample signal and restore information data normally even when noise is superimposed on the correlation output. The object of the present invention is to provide a receiving circuit for J3'p:j.

(Structure and Effect of the Invention) In order to achieve the above objects, the present invention includes a correlation circuit that determines the correlation between the received code string and the pseudo-noise code, and a determination circuit that can determine whether the output value of the correlation circuit is positive or negative. a maximum value detection circuit for detecting the maximum value of the output of the correlation circuit; a ring counter whose period is one frame of the pseudo-noise code; and a ring counter whose period is one frame of the pseudo-noise code;
A window signal generation circuit generates a window 18 with a time length corresponding to the frame length once (), and the output value of the above-mentioned correlation circuit exceeds the output value of the above-mentioned maximum value detection circuit within the generation period of this wind signal. The timing signal generation circuit that generates a timing signal stores the contents of the ring counter in response to this timing signal, and determines whether the contents of the stored ring counter are the contents of the ten ring counter after the wind signal disappears. The present invention is characterized in that it includes a sample signal generating circuit that generates a lean pull signal when there is a match, and a storage circuit that responds to the lean pull signal and takes in the output of the determination circuit described in -(-) and outputs information data.

If this configuration is used, the timing at which the maximum value is obtained during one frame of the P Even in such a case, a regular ripple signal can be generated and the information data can be accurately restored.

(Explanation of Example)? Figure J52 shows the basic configuration of the receiving circuit related to this north gate, and Figure 3 shows its operating time.

In the figure, this receiving circuit includes the correlation circuit 1, the shift clock generator 2. In addition to the comparison circuit 3 and the flip-flop 5, an IJ simple ball circuit (S/l-1) 2 detects the maximum value of the output horn signal φ(1) of the correlation circuit 1.
1, a ring counter 22 which cycles through one frame of the PN code 8, and a window signal Δ having a time length corresponding to the length of one frame of the PN code 8 is generated once by the output value of this ring counter. Wind signal generation circuit 23
If J5 is in the generation period of the wind signal Δ, the output signal φ is
(When the value of () exceeds the output J value of the sample and hold circuit 21, the timing signal generation circuit 2/! which turns the timing signal 13 over 1) responds to this timing signal [3 and outputs the ring counter 22. It basically includes a ripple signal generating circuit 25 which stores the contents and generates a sample signal C when the stored contents of the ring counter 22 match the contents of the ring counter 22 after the disappearance of the window signal.

The code string d([), which is the input signal to the correlation circuit 1,
1) (t) is a code string corresponding to information data (110). In addition, the output J of the correlation circuit 1 (ii ′r'iφ
(1) indicates the maximum value in the positive direction (■) in the first frame and second frame where the information data is '1'',
In the third frame where the information data is #011, the maximum value (c) in the negative direction is shown.The small peak (b) in the first frame is a mixed nose.

The window signal generation circuit 23 includes a ring counter 22
A gate circuit 230 that generates a 1-Riga pulse at the timing when the divisor 1 is K and at the timing when 1<-1.
Flip-flops 231 and 2 are connected to the second stage 81 to which the i~ trigger pulse from this gate circuit 230 is input.
32, the negative output of flip-flop 231 and flip-flop 7
Wind signal Δ under AND condition with negative output of 0 knob 232
It is composed of an AND circuit 233 which generates -4. Flip-flops 231 and 232 are initialized by a relet signal R8-V from outside the figure. flip flop 23
Since the D input of 1 is connected to the power supply of 10 V, the goo 1-
The first gate pulse output from circuit 230 results in a negative output of 1 level. At this time, the ◇ output of the flip 70 knob 232 is 1 level, so the AND circuit 233 generates the wind signal A. Then, when the next 1 trigger pulse is input from the gate circuit 230, the flip-flop 231 maintains the negative output at 1-level, and the ◇ output of the flip-flop 232 becomes L level. In other words, the wind signal is
(The time corresponding to the frame is about to start.

The above timing signal generation circuit includes comparator circuit 2/11 and A
N[) circuit 242. Comparison circuit 2/11 compares and reads the output value of 1 non-pull voltage circuit 2'1 and the output value of correlation circuit 1. In other words, at the timing when the noise (A) is superimposed in the first frame, the lean pull hold circuit 21 detects the peak value and outputs it. 1 level, and when the Rinzl hold circuit 21 outputs an output value corresponding to the peak value of the noise (A) by 1 level, the comparator circuit 2
41 sets the output to L level. Then, at the timing of the maximum value (b), the output 11 of the sample hold circuit 21
Corresponding to 1 degree B31 noise (A)...Since there is a
1. In addition, in the AND circuit 242, AND line 1'1 is established within the period in which the wind antagonism △ occurs, which corresponds to the timing of the noise (A) and the timing of the maximum value (B). Two timing signals B are output.

The ripple signal generating circuit 25 is connected to a latch circuit 251 to which the timing pulse B is applied, and a latch circuit 251 to which the timing pulse B is applied. 82
51 and the content of the ring counter 22, and the output of the -number circuit 252.
Level and Q output of Noritsubu 70 Tube 232 are both 1
It is composed of an AND circuit 253 that applies the sample signal @C of ``to the flip flop [1 block].Latch circuit 25
1 receives the two timing signals B, and the first timing signal B increments the ring counter 22's divisor value (-1), and then the second timing signal B increments the ring counter 22's divisor value (-1). 81 value N and replace it with the previous division value 1<+1. Therefore, - number circuit 252
The divisor value N is calculated.

-C, in the second frame after the wind signal A disappears, the -number circuit 252 uses the ring counter 22.
A match between the output value of the latch circuit 251 and the output value of the latch circuit 251 is detected. At this point, the Q output of flip-flop 232 is 1-Level. Therefore, each time the count value of the ring counter 22 and the content latched in the latch circuit 251 match and change in the minus number circuit 252, the count is counted (at the timing when white is N, the sample signal C is 7 ripples 5).
is output to. As a result, the information data d(t) is accurately restored.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram mainly showing the part targeted by the present invention among conventional receiving circuits in the spectrum 1 to RAM spread communication systems, and Fig. 2 shows an embodiment of the receiving circuit according to the present invention. The basic configuration diagram, FIG. 3, is a timer 1 to 1 showing the operation of the circuit of the embodiment described above. 1... Correlation circuit 2... Shift clock generator 3... Comparison circuit 5... Flip-flop 21... Sample hold circuit 22... Ring counter 23... Wind signal generation circuit 24 ...Timing signal generation circuit 25...(Non-pull signal generation circuit d(t)/p(t)...Receiver code string φ(1)...
Correlation circuit output d(t')...Information data A...Wind signal B...Timing signal C...Ripple signal special 6' Applicant Tateishi Electric Co., Ltd.

Claims (1)

[Claims] (1) a correlation circuit that correlates the received code string with the pseudo-noise code; a determination circuit that determines whether the output value of the correlation circuit is positive or negative; and a maximum value detection circuit that detects the maximum value of the output of the correlation circuit; A ring counter whose period is one frame of the above pseudo-noise code is used, and the output value of this ring counter is used to generate a wind signal with a time length corresponding to one frame length of the above-mentioned pseudo-noise code. a timing signal generating circuit that generates a timing 18 bow when the output value of the correlation circuit 113 exceeds the output value of the maximum value detection circuit within the generation period of this window signal; a 1 non-pull signal generating circuit that stores the contents of the ring counter in response and generates a sample signal when the stored contents of the ring counter match the contents of the ring counter after the wind signal disappears; 454. A spread spectrum communication system characterized by comprising a storage circuit that takes in the output of the determination circuit and outputs information data in response to 454.
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