JPS6043667B2 - semiconductor equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device having an amplification gate structure, and particularly to improvement of its di/dt tolerance.

It is well known that the initial turn-on region of a thyristor begins near the gate, and that the turn-on region expands over time.

Therefore, when the di/dt of the on-current is high, the on-current is concentrated in the emitter region near the gate, and the thyristor is thermally destroyed. FIG. 1 is a plan view showing a conventional thyristor with an amplification gate structure for increasing di/existence capability, and FIG. 2 is a partially enlarged plan view of the thyristor shown in FIG. 1.

In FIG. 2, a portion of the cathode electrode has been removed for ease of explanation. 3 and 4 are partial cross-sectional views of FIG. 2, respectively. In the figure, 1 is a thyristor substrate, 2 is a first layer provided on the surface layer of the thyristor substrate 1 on the anode side.
a conductive type anode emitter layer; 3 is a second conductive type anode base layer forming a PN junction with the anode emitter layer 2; 4;
5 is a cathode base layer of the first conductivity type which forms a PN junction with the anode base layer 3 and serves as the gate region of the thyristor, and 5 is provided on the surface layer of the cathode base layer 4 to improve di/d resistance. An annular auxiliary emitter layer 6 of the second conductivity type is provided on each surface of the auxiliary emitter layer 5 and the surrounding cathode base layer 4, and an annular auxiliary electrode 7 commonly connects these layers. A plurality of cathodes of the second conductivity type are provided around the auxiliary emitter layer 5 so that a plurality of radial base layers 8 of the first conductivity type whose surfaces have a radial shape are formed on the surface layer of the cathode base layer 4. an emitter layer; 9 is a radial electrode provided on the surface of the radial base layer 8 to be connected to the auxiliary electrode 6; 10 is a plurality of first conductive points reaching the cathode base layer 4 from the surface of the cathode emitter layer 7; The cathode layer 11 is a cathode electrode provided on the surface of each of the cathode emitter layer 7 and the dotted layer 10 so as to commonly connect both layers, and this cathode electrode 11 forms a so-called short emitter structure. However, the Dv/Dt tolerance is improved.

12 is a gate electrode formed on the surface of the portion of the cathode base 4 surrounded by the auxiliary emitter layer 5, and 13 is an anode electrode provided on the surface of the anode emitter layer 2.

The dotted layer 1 of the conventional thyristor consisting of the above 1 to 14
The method for forming 0 will be described in detail below. That is, as shown in FIG. 2, the plurality of dotted layers 10 sandwiched between the two radial base layers 8a and 8b are first arranged in a line in the diametrical direction on parallel lines separated by a predetermined distance from one of the radial base layers 8a. The dotted layers are arranged at a pitch of V1, and then the dotted layers are arranged so that the pitch in the circumferential direction of each of the plurality of dotted layers 10 arranged in a row is V1, and the pitch in the diametrical direction is V1. It is formed by arranging 10 in sequence.

A row of dotted layers 1 lined up in a position closest to the other radial base layer 8b of the plurality of dotted layers 10 arranged in this way
0 is the distance L1 from this point to the PN junction surface 14 formed by the other radial base layer 8b and cathode emitter layer 7.
differs depending on the diametrical position of the dotted layer 10. The spread of the on-current of a thyristor differs depending on the arrangement of the dotted layer 10, and therefore, if L varies depending on the position of the dotted layer 10 as described above, the spread of the on-current will not be uniform. . In this way, the conventional thyristor has a P formed by the cathode emitter layer 7 and the radial base layer 8.
Despite increasing the circumferential length of the N junction 14), there was a drawback that the amount of Di/DtIll did not increase because the on-current spread was not uniform. This invention was made to eliminate the above-mentioned drawbacks, and consists of a dotted layer forming a short emitter structure, two adjacent radial base layers, and a third emitter layer sandwiched between these two radial base layers. The present invention provides a semiconductor device in which the Di/Dt resistance can be improved by providing the diode at the intersection of a plurality of lines parallel to both of the two PN junction surfaces formed by the diode.

FIG. 5 is a partially enlarged plan view of a thyristor according to an embodiment of the present invention, and will be described in detail below with reference to this figure. In the figure, the same reference numerals as in FIG. 2 indicate corresponding parts, and the configuration other than FIG. 5 is the same as in FIG. 1, FIG. 3, and FIG. 4, and the explanation thereof will be omitted. Reference numeral 20 denotes a cathode emitter layer 7 sandwiched between one radial base layer 8a and the other radial base layer 8b adjacent thereto at an angle of 60 degrees.
A plurality of dotted layers are provided to reach the cathode base region 4 from the surface of the cathode base region 4.

The dotted layers 20 are provided at a plurality of intersections of a plurality of straight lines parallel to the two PN junction surfaces 14 formed by the two radial base layers 8a, 8b and the cathode emitter layer 7, respectively. In this embodiment, the dotted layer 20 is composed of three dotted layers 2 adjacent to each other.
The lines connecting 0 form an equilateral triangle with one side of w. By arranging the dotted layers 20 in this way, the distances from the two PN junction surfaces 14 of the plurality of dotted layers 20 lined up in a row in the diametrical direction are equal, and therefore the on-current spreads. This makes it possible to improve the Di/d eyebrow amount.

In such an embodiment, a thyristor with a withstand voltage of 2500V is arranged such that the interval between the dotted layers 20 is 0.5? When we prototyped a dotted layer 20 with a diameter of 0.1Tr0n and a radial base layer 8 with the same shape, we found that the conventional thyristor had a Di/Dt withstand capacity of 300 to 400A/μS1 and a transient on-voltage of 8mm. (Pulse width 20 μS 1 Pulse current peak value 1
000A, after 10μs) was Di/Dt
Withstand capacity is 400-500A/μS1 Transient on voltage is 6■ (
The measurement conditions were the same as those for the conventional thyristor described above), and a clear difference was observed.

Note that the present invention is not limited to the above-mentioned embodiment, and the angle formed by the two adjacent front & ann joint surfaces 14 is 6.
The same effect as in the above embodiment can be obtained even with a value other than 0.

Furthermore, by connecting three adjacent dotted layers 20, the same effect as in the above embodiment can be obtained even if the dotted layers 20 are arranged so that a triangle other than an equilateral triangle is formed. . As described above, the present invention provides dotted layers at the intersections of a plurality of straight lines parallel to each of two PN junction surfaces formed by two adjacent radial base layers and a second emitter layer sandwiched between these layers. This has the excellent effect of improving the Di/city resistance of the semiconductor device.

[Brief explanation of the drawing]

Fig. 1 is a plan view showing a conventional thyristor with an amplification gate structure that increases the Di/city resistance, Fig. 2 is a partially enlarged plan view of the thyristor shown in Fig. 1, and Figs. 3 and 4 are the same as those shown in Fig. 2. FIG. 5 is a partially sectional view and an enlarged plan view of a thyristor according to an embodiment of the present invention. 7 is a cathode emitter layer, 8 is a radial base layer, 14 is a PN junction surface, and 20 is a dotted layer.

Claims (1)

[Claims] 1. A first emitter layer of a first conductivity type, a first base layer of a second conductivity type forming a PN junction with the first emitter layer, and a PN junction between the first base layer and the PN junction. A second base layer of the first conductivity type forming a junction, an annular auxiliary emitter layer of the second conductivity type provided on the surface layer of the second base layer, and a second base layer of the auxiliary emitter layer and the surrounding second base layer. a ring-shaped first electrode provided on each surface of the base layer and commonly connecting these layers; and a plurality of first conductivity type electrodes whose surfaces form a radial shape on the surface layer of the second base layer. a plurality of second emitter layers of a second conductivity type provided around the auxiliary emitter layer so as to form a radial base layer; The second
a plurality of dotted layers of the first conductivity type reaching from the surface of the second emitter layer to the second base layer; and a third electrode that commonly connects both layers, wherein the dotted layer includes the two mutually adjacent radial base layers and the second radial base layer sandwiched between the two radial base layers. A semiconductor device characterized in that the semiconductor device is provided at an intersection of a plurality of straight lines parallel to both of two PN junction surfaces formed by an emitter layer. 2. The semiconductor device according to claim 1, wherein the dotted layer is provided so that an equilateral triangle is formed by a straight line connecting three adjacent dotted layers.