JPS6045095A - Method of producing thick film multilayer board - Google Patents

Method of producing thick film multilayer board

Info

Publication number
JPS6045095A
JPS6045095A JP15244283A JP15244283A JPS6045095A JP S6045095 A JPS6045095 A JP S6045095A JP 15244283 A JP15244283 A JP 15244283A JP 15244283 A JP15244283 A JP 15244283A JP S6045095 A JPS6045095 A JP S6045095A
Authority
JP
Japan
Prior art keywords
conductor layer
wiring conductor
thick film
film multilayer
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15244283A
Other languages
Japanese (ja)
Inventor
雅雄 瀬川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP15244283A priority Critical patent/JPS6045095A/en
Publication of JPS6045095A publication Critical patent/JPS6045095A/en
Pending legal-status Critical Current

Links

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Laminated Bodies (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、厚膜多層基板の製造方法に関する。[Detailed description of the invention] [Technical field of invention] The present invention relates to a method for manufacturing a thick film multilayer substrate.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

従来の厚膜多層基板の製造プロセスは例えば第1図(a
)、(b)に示す如くアルミナ等の絶縁基板1に銀バラ
ジュウム系ペースト等で第1配線導体層2を印刷焼成し
た後に、第1図(C)に示す如く導体回路上の1部にガ
ラスペースト等で絶縁層3を印刷焼成する。更に第1図
(d)の如く銀、バラジュウム系ペースト等で第2配線
導体層4を印刷焼成した後に第1図(e)で示す如く前
記第1配線導体層2により形成される電極間に酸化ルテ
ニュクム系ペースト等の抵抗体5を印刷焼成する。
The conventional manufacturing process for thick-film multilayer substrates is shown in Figure 1 (a), for example.
), (b), after printing and baking the first wiring conductor layer 2 with silver-baladium paste etc. on an insulating substrate 1 made of alumina or the like, a part of the conductor circuit is covered with glass as shown in FIG. 1(C). The insulating layer 3 is printed and fired using paste or the like. Furthermore, as shown in FIG. 1(d), after printing and firing a second wiring conductor layer 4 using silver or baradium-based paste, etc., as shown in FIG. 1(e), between the electrodes formed by the first wiring conductor layer 2, A resistor 5 made of ruthenium oxide paste or the like is printed and fired.

しかし、上記従来の製造方法では、第2配線導体層4及
び抵抗体5を形成する際、各々別々の2種類のスクリー
ン及びペースト(銀バラジュウム系ペーストと酸化ルテ
ニエウム系ペースト)を使用せねばならなく、製造プロ
セスが複軸となる問題があつた。
However, in the conventional manufacturing method described above, when forming the second wiring conductor layer 4 and the resistor 5, it is necessary to use two different types of screens and pastes (silver-baladium paste and ruthenium oxide paste). However, there was a problem with the manufacturing process involving multiple axes.

更に、上記銀、パラジュウム系の配線導体層は銀の眉間
マイブレーク1ン、即ち第1又は第2配線導体層2又は
4の銀が数十ミクロンの厚さの絶縁層を介してイオン化
して移行することによる絶縁劣化が生じやすく、信頼性
の点でも問題があった。
Furthermore, the above-mentioned silver and palladium-based wiring conductor layer is formed by silver microbrake 1, that is, the silver of the first or second wiring conductor layer 2 or 4 is ionized through an insulating layer with a thickness of several tens of microns. Insulation deterioration is likely to occur due to migration, and there are also problems in terms of reliability.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記の問題点に鑑み、製造プロセスを
簡略にすると共に層間絶縁に対する信頼性を向上させた
厚膜多層基板の製造方法を提供することにある。
SUMMARY OF THE INVENTION In view of the above-mentioned problems, an object of the present invention is to provide a method for manufacturing a thick film multilayer substrate that simplifies the manufacturing process and improves the reliability of interlayer insulation.

〔発明の概要〕[Summary of the invention]

本発明は、第1配線導体層、絶縁層、第2配線導体層及
び抵抗体を印刷焼成して成る厚膜多層基板の製造方法に
おいて、前記第2配線導体層及び前記抵抗体を形成する
際に、同一のスクリーン及びペーストを用い、前記第2
配線導体層及び前記抵抗体を同時に印刷焼成することに
より、上記目的を達成するものである。
The present invention provides a method for manufacturing a thick film multilayer board by printing and firing a first wiring conductor layer, an insulating layer, a second wiring conductor layer, and a resistor, when forming the second wiring conductor layer and the resistor. Using the same screen and paste,
The above object is achieved by printing and firing the wiring conductor layer and the resistor at the same time.

〔発明の実施例〕 以下本発明の厚膜多層基板の製造方法の一実施って説明
する。第2図は本発明の厚膜多層基板の製造方法の一実
施例を示した図である。先ず、第2図(a)、Φ)に示
す如くセラミック等の基板1上に銀バラジュウム系ペー
スト等で第1配線導体層2を印刷焼成し、その上に第2
図(C)で示す如くガラスペースト等で絶縁層3を印刷
焼成する。然る後に第2図(d)で示す如く第2配線導
体層4と抵抗体5を同一のスクリーン、抵抗体ペースト
(酸化ルテニュウム系ペースト等〕を用いて同時に印刷
焼成して製造を完了する・ 上記実施例では、抵抗体ペーストを第2配線導体層4と
して使用するため、導体抵抗が大きくなる。そこで、例
えば第3図(1)で示される抵抗値Rを第2配線導体層
40部分に持たせたいならば、第4図(2)で示す如く
抵抗値孔と抵抗値ルを有する部分に分割し、R>R++
Bの条件を満たすようにする。そして、第4図に示す如
く抵抗値ルな第2配線導体層4が有するようにして、こ
れに直列に形成された抵抗値R1の部分6をトリミング
で抵抗値補正を行ない、所望の抵抗値Rを得るようにす
ればよい。
[Embodiments of the Invention] Hereinafter, one embodiment of the method for manufacturing a thick film multilayer substrate of the present invention will be described. FIG. 2 is a diagram showing an embodiment of the method for manufacturing a thick film multilayer substrate of the present invention. First, as shown in FIG. 2(a), Φ), a first wiring conductor layer 2 is printed and fired using a silver-baladium paste or the like on a substrate 1 made of ceramic or the like.
As shown in Figure (C), the insulating layer 3 is printed and fired using glass paste or the like. Thereafter, as shown in FIG. 2(d), the second wiring conductor layer 4 and the resistor 5 are simultaneously printed and fired using the same screen and resistor paste (ruthenium oxide paste, etc.) to complete the manufacturing process. In the above embodiment, since the resistor paste is used as the second wiring conductor layer 4, the conductor resistance increases. Therefore, for example, the resistance value R shown in FIG. If you want to have it, divide it into parts with resistance holes and resistance values as shown in Figure 4 (2), and set R>R++.
Make sure that condition B is satisfied. Then, as shown in FIG. 4, the resistance value is corrected by trimming the portion 6 of the resistance value R1 formed in series with the second wiring conductor layer 4 having a resistance value R1, and the desired resistance value is obtained. All you have to do is get R.

本実施例によれば、第2配線導体層4と抵抗体5を同一
スクリーン及び同一抵抗体ペーストを用いて同時に印刷
焼成することにより、従来に比べて工程数を低減させて
製造プロセスを簡略とすることができる。更に、従来の
銀バラジュウム系ペーストで問題とされる銀の層間マイ
ブレーションに関しても、第2配線導体層4に酸化ルテ
ニエウム系等の抵抗ペーストを用いることにより、上記
マイプレーシ冒ンが抑制され層間絶縁に対する信頼性を
向上させることができる。
According to this embodiment, the second wiring conductor layer 4 and the resistor 5 are simultaneously printed and fired using the same screen and the same resistor paste, thereby reducing the number of steps and simplifying the manufacturing process compared to the conventional method. can do. Furthermore, regarding interlayer migration of silver, which is a problem with conventional silver-baladium-based pastes, by using a ruthenium oxide-based resistance paste for the second wiring conductor layer 4, the migration is suppressed and the interlayer insulation is improved. Reliability can be improved.

〔発明の効果〕〔Effect of the invention〕

以上記述した如く本発明の厚膜多層基板の製造方法によ
れば、製造プルセスを簡略にすると共に層間絶縁に対す
る信頼性を向上させる効果がある。
As described above, the method for manufacturing a thick film multilayer substrate of the present invention has the effect of simplifying the manufacturing process and improving the reliability of interlayer insulation.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の厚膜多層基板の製造方法を示す工程図、
第2図は本発明の厚膜多層基板の製造方法の一実施例を
示した工程図、第3図は第2図で示した厚膜多層基板の
部分配線図、第4図は第2図の方法で製造した厚膜多層
基板の部分平面図である。 1・・・絶縁基板、2・・・第1配線導体層、3−絶縁
層、4・・−第2配線導体層、5−・抵抗体 代理人 弁理士 則 近 憲 佑 (ほか1名) 第31゛A 第2図 、。)二二=イ゛ 第4図
Figure 1 is a process diagram showing a conventional method for manufacturing a thick film multilayer board;
FIG. 2 is a process diagram showing an embodiment of the thick film multilayer board manufacturing method of the present invention, FIG. 3 is a partial wiring diagram of the thick film multilayer board shown in FIG. 2, and FIG. FIG. 2 is a partial plan view of a thick film multilayer substrate manufactured by the method of FIG. 1... Insulating substrate, 2... First wiring conductor layer, 3- Insulating layer, 4...- Second wiring conductor layer, 5- Resistor agent Patent attorney Noriyuki Chika (and 1 other person) 31゛A Figure 2. )22 = I Figure 4

Claims (1)

【特許請求の範囲】 (リ 絶縁基板上に第1配線導体層を印刷焼成する工程
と、前記第1配線導体層上に絶縁層を印刷焼成する工程
と、前記絶縁層上に第2配線導体層を印刷焼成する工程
と、前記第1配線導体層により形成される電極間に抵抗
体を印刷焼成する工程とを有する厚膜多層基板の製造方
法において、抵抗体と同組成のペーストを第2配線導体
層として使用し、これら抵抗体と第2配線導体層を同時
に印刷焼成することを*徴とする厚膜多層基板の製造方
法。 (2)前記第2配線導体層と直列に抵抗体を形成し、こ
の抵抗体をトリミングすることによりこの抵抗体と前記
第2配線導体層との合成値を所望の値とすることを特徴
とする特許請求の範囲第1項記載の厚膜多層基板の製造
方法。
[Scope of claims] In a method for manufacturing a thick film multilayer board, which includes a step of printing and baking a layer, and a step of printing and baking a resistor between electrodes formed by the first wiring conductor layer, a paste having the same composition as that of the resistor is added to a second layer. A method for manufacturing a thick film multilayer board, which is used as a wiring conductor layer and is characterized by simultaneously printing and firing these resistors and a second wiring conductor layer. (2) A resistor in series with the second wiring conductor layer. The thick film multilayer substrate according to claim 1, characterized in that by trimming the resistor, a composite value of the resistor and the second wiring conductor layer is set to a desired value. Production method.
JP15244283A 1983-08-23 1983-08-23 Method of producing thick film multilayer board Pending JPS6045095A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15244283A JPS6045095A (en) 1983-08-23 1983-08-23 Method of producing thick film multilayer board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15244283A JPS6045095A (en) 1983-08-23 1983-08-23 Method of producing thick film multilayer board

Publications (1)

Publication Number Publication Date
JPS6045095A true JPS6045095A (en) 1985-03-11

Family

ID=15540613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15244283A Pending JPS6045095A (en) 1983-08-23 1983-08-23 Method of producing thick film multilayer board

Country Status (1)

Country Link
JP (1) JPS6045095A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62198145A (en) * 1986-02-25 1987-09-01 Nec Corp Hybrid integrated circuit
WO2009073448A3 (en) * 2007-12-03 2009-09-11 Publicover Mark W Construction system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62198145A (en) * 1986-02-25 1987-09-01 Nec Corp Hybrid integrated circuit
WO2009073448A3 (en) * 2007-12-03 2009-09-11 Publicover Mark W Construction system

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