JPS604931A - Flash emitting device - Google Patents

Abstract

PURPOSE:To perform assuredly proper exposure photography in program mode by stopping light emission with a light emission stop signal based upon the quantity of reflected light from a subject when the exposure control of a camera is set to the program mode. CONSTITUTION:When the program mode (P mode) is set, a P-mode signal is inputted from an exposure control mode signal output part 7 to a selector 10 to stop a signal from a selector 6, and when the photometry, value of reflected light from a subject attains to a value corresponding to proper exposure, the light emission of a light emission part is stopped with the 1st light emission stop signal from a control circuit 2 for the quantity of light emission. When a mode other than the P mode is set and a flash device EL is set in automatic mode, the selector 6 outputs the 1st light emission stop signal, which stops the light emission of the light emission part 1. When the automatic mode is set, the selector 6 outputs the 2nd light emission stop signal from a light emission stop signal output circuit 4 and the light emission of the light emission part 1 stops when the quantity of light emission attains to a value set by a setting part 3 for the quantity of light emission.

Description

Description: TECHNICAL FIELD The present invention relates to a flashlight emitting device having an automatic mode in which light emission is controlled and a manual mode in which light emission is performed based on a manually set amount of light emission.

Among the exposure control modes of conventional cameras, the program mode allows photography with proper exposure without the photographer performing any setting operations. Therefore, even in flash photography, if the program mode is selected on the camera, it is desirable to be able to perform flash photography with proper exposure without requiring any setting operations by the photographer.

However, with conventional flash devices, if manual mode is selected, in which light is emitted based on the manually set amount of light, even if program mode is selected on the camera, the flash device (hereinafter referred to as a flash device) ) will emit light up to the manually set amount of light, and there is a risk that flat photography with proper exposure will not be possible. still,
In this type of flash photography system, when the program mode is selected on the camera and flash photography is performed, if the manual setting mode is selected on the flash device, there is a strong possibility of incorrect settings. The purpose of this invention is to provide a flash device that can perform flash photography that always provides proper exposure in program mode.

Summary A means for outputting a first light emission stop signal based on the amount of light reflected from a subject due to light emission from a light emitting section reaching a predetermined value, and a first light emission stop signal based on the fact that the light emitting section has emitted light up to the light amount set by manual operation. and means for outputting a second light emission stop signal, and when the exposure control mode of the camera is in a mode other than the program mode, the light emission is emitted based on the first or second light emission stop signal selected by manual operation. If the exposure control mode of the camera is the program mode, the light emission of the light emitting section is stopped based on the first light emission stop signal, regardless of the above selection.

Example An embodiment of the present invention will be described below.

FIG. 1 is a block diagram showing the basic configuration of the present invention. (
1.L) is a flash device, and (OA) is a camera. When the flash device (FL) is attached to the camera (CA), the flash device (FL) terminal (JF+),
(JF2) and (JF3) are connected to terminals (JB+), (JI32), and (JB3) of the camera (OA), respectively.

Reference numeral (1) denotes a light-emitting section, and this light-emitting section (1) includes a xenon tube (not shown) for emitting flash light, a main capacitor (not shown) for accumulating charge during the light emission of the xenon tube, and the like. (2) is a light emission amount control circuit that controls the light emission amount by TTL photometry of the reflected light from the subject in the camera (OA), and this light emission amount control circuit (2) c) stops the first light emission when the photometry value reaches a predetermined value. Output a signal. (3) is the flash output setting section for manually setting the flash output in the flash device (FL), and (4) U is the flash output setting section (3) that allows the flash to emit light up to the flash output set in (3). This is a light emission stop signal output unit that outputs a second light emission stop signal when the light emission stop signal is activated. (5) is a ~M switching signal output section, and this ~M switching signal output section (5) outputs a signal according to the automatic mode or manual mode set by manual operation. (6) is a selector, and in this selector (6), when the automatic mode is set, the signal from the camera (OA) to the terminal (JI33), (
JE3), and if manual mode is set, a second light emission stop signal is output in response to the signal from the km switching signal output section (5). A second light emission stop signal from section (4) is output.

(7) is an exposure control mode signal output section that outputs a signal representing the exposure control mode set in the camera (OA). This exposure control mode is a program mode (hereinafter referred to as P) that automatically controls both the shutter and aperture.
mode), aperture-priority shutter automatic control mode, /
There is a Yatsuta priority aperture automatic control mode and aperture/shutter manual setting mode. (8) C. Camera (OA) exposure control mode signal output rhyme η to terminal (JB2), (JF
z)'! i = Exposure control mode signal reading section that reads the signal sound representing the exposure control mode sent through the exposure control mode. (9)
UP mode hand” printing unit, exposure control mode signal reading m
8) Inputs the signal from the camera (CA), determines whether the exposure control mode set on the camera (CA) is P mode, and outputs a signal depending on whether it is P mode or a mode other than P mode. The selector aO outputs the first light emission stop signal from the light emission amount control circuit (2) when the P mode is set in the camera (CA) according to the signal from the P mode discrimination circuit (9). Selectively output the camera (C
If a mode other than P mode is set in A),
The first or second light emission stop signal from the selector (6) is selectively output. The light emission stop signal output from this selector (0) is input to the light emitting unit (1).01) is used to start the light emission of the flash device (FL) in response to the shutter release of the camera (OA). This is a light emission start signal output section that outputs a light emission start signal.The light emission start signal from this light emission start signal output section
+) and (JF+) to the light emitting unit (1) of the flash device (FL).

-1. When P mode is set as the exposure control mode in the camera (OA), the exposure control mode signal output section (
A signal indicating P mode is input from 7) to the flash unit (FL) via terminals (JB2) and (JF2), and the reading unit (8) reads the signal corresponding to this P mode. A signal representing the P mode is input from the P mode discriminator (9) to the selector αO. At this time, the selector σO outputs the first light emission stop signal from the light emission amount control circuit (2), and the selector ( 6) will be in a state of blocking signals from. When the shutter button (not shown) is pressed on the camera (OA), a light emission start signal is output from the light emission start signal output section ■, and this light emission start signal is sent to the terminal (JB
+), (JF+) f: Input to the light emitting unit (1) through the light emitting unit (1), which starts emitting light.
When the photometry value reaches a value corresponding to proper exposure, the light emission amount control circuit (2) outputs a first light emission stop signal. This "th" emission stop signal is sent to the terminal (JB3),
(JF3) to the flash device (FL), and further passes through the selector (10) to the light emitting section (1), and the light emitting section (1) stops emitting light. That is,
When the P mode is set on the camera (CA), even if the manual mode is set on the flash device (FL), the light will be emitted by the first light emission stop signal from the light emission amount control circuit (2), regardless of whether manual mode is set on the flash device (FL). The light emission of part (1) stops.

When a mode other than P mode is set as the exposure control mode in the camera (OA), a signal corresponding to the set mode other than P mode is output from the exposure control mode signal output section (7), and this signal is sent to the terminal. (JB2), (JF
2) is input to the reading section 8) of the FLATSUNYU device (FL), and a signal indicating that the mode is other than P mode is input from the P mode discriminating section (9) to the selector QO. At this time, selector aO receives the first signal from selector (6).
Alternatively, it becomes possible to output the second light emission stop signal. Further, when the automatic mode is set in the flash device (FL), a signal corresponding to the automatic mode is input from the overpass switching signal output section (5) to the selector (6), and the signal corresponding to the automatic mode is inputted to the selector (6).
) A state is entered in which the first light emission stop signal from the light emission amount control circuit (2) is output and the second light emission stop signal from the light emission stop signal output section (4) is blocked. Here, when the shutter button of the camera (OA) is pressed, a light emission start signal is output from the light emission start signal output section, and this light emission start signal is sent to the terminal (
JBI) and (JF+) to the light emitting unit (1), and the light emitting unit (1) starts emitting light. The light reflected from the subject by the emission of the light emission sound [K1] is TT at the camera (OA).
L photometry is performed, and when this photometry value reaches a value corresponding to proper exposure, a fourth light emission stop signal is output from the light emission amount control circuit (2). This "th" light emission stop signal is the terminal (JB3).

(JF3) f: This fourth light emission stop signal is input to the flash device (FL) through the selector (6) and selector 00, and is input to the light emitting unit (1). In addition, if a mode other than P mode is set as the exposure control mode and manual mode is set in the flash device (FL), the M switching signal output will be output according to the manual mode from 5). The selected signal is input to the selector (6), and the selector (6) outputs the second light emission stop signal from the light emission stop signal output section (4) and outputs the first light emission stop signal from the light emission amount control circuit (2).
The light emission stop signal is blocked. Furthermore, it is in a state where a signal from the selector arm selector (6) is output. Here, when the shutter button of the camera (OA) is pressed, a light emission start signal is output from the light emission start signal output section (11), and the light emission section (1) starts emitting light. When the light emission amount reaches the value set in the light emission amount setting section (3), a second light emission stop signal is output from the light emission stop signal output section (4), and this second light emission stop signal is transmitted to the selector (6). )
and is input to the light emitting unit (1) through the selector (O),
The light emitting section (1) stops emitting light.

FIG. 2 is a block diagram showing the overall configuration of a flash system to which the present invention is applied. The circuit surrounded by the dashed line (II
I) is the circuit on the camera body side (hereinafter referred to as the camera body)
The camera body (Ill) has two connectors for connecting a flash device. One connector (CNI) is provided at the bottom of the camera, and this connector (CNI) can be connected to the flash controller connector (CN2), which is the circuit (I) surrounded by a broken line. The other connector (CN6) of the camera body (III) is provided on the real shoe on the top of the camera, and the circuit (circled by a broken line) which is the flash device (
If).

(IV), (V) * 9 = (CN8), (CN
9) and (CN11), respectively. A power battery (BaO) and a power switch (MSl) are provided inside the camera body (III), and power is supplied to the control circuit (BOC) via the power switch (MSI).

Furthermore, there is a photometry switch (S) inside the camera body (III).
l), a release switch (Sl), a reset switch (S3), and an X contact (S The release switch (Sl) is closed at the second step of pressing the release button. When the photometry switch (Sl) is closed, the control circuit (BOC) repeats data transfer, photometry, calculation, and display operations, and when the release switch (Sl) is closed, the control circuit (BOC) performs exposure control operations. Let them do it.

When the shutter front curtain (not shown) completes running, the X contact (Sx) closes and outputs a light emission start signal.
When the exposure control operation is completed, the reset switch (S4)
is closed and the operation of the control circuit (BOC) is stopped. Specific examples of the control circuit (BOC) will be described in detail in FIGS. 3 to 9.

The circuit (1) surrounded by a dashed line is the flash controller, which is connected to the connector (C) at the bottom of the camera body (Ill).
NI) and the connector (C'N2). Inside the flash controller (1),
Power supply (BAI), power supply control timer circuit (CTC),
NC) is provided in the control circuit for multiple light emission. Then, a power supply connector (CN4) for supplying power to the flash device (mountain), a connector (CN3) connected to the flash device (II), and a flash device (V).
and a connector (CN5) that can be tightened. Timer circuit (CT) in flash controller (1)
C) is shown in Figure 13, and the Huntroll circuit (CNC) is shown in Figure 1.
Specific examples are shown in Figure 4. Further, (CDI) is a booster circuit.

The circuit (II) surrounded by a broken line is the flash device, and the connector (-CN3) of the flash controller (■)
) is connected to the connector (CN8), and the power supply connector (CN4) of the controller (I) is connected to the connector (CN8).
CN7). Also, the circuit surrounded by the broken line (
1v) is a flash device with the same configuration as the flash device ([), and this flash device (IV) is attached to the hot shoe connector (
CN6) and connector (CNII) connect 1! ! ,
and nothing is connected to the power supply connector (CN 10).

777 Shu device (11), (IV)l, : put (
BA3), (BA7) are power batteries, (F S 1), (
F 35) is the main sui nochi, (FLCl),
(FLC3) is a mount control circuit of the flash device. This control circuit (FLCI), (FLC
A specific example of 3) will be explained in detail based on FIGS. 10 to 13. (D D3) and (D D7) are external pressure circuits, (F L
Pl) and (F L P3) are flash light emitting circuits.

The circuit (V) surrounded by a broken line is a flash device, and is connected to the connector (CN5) of the flash controller (I) and the connector (CN9). This flash device (V) is equipped with a power supply battery (BA5), and when the main switch (FS3) is closed, the booster circuit (DD
5), the main capacitor (MC3
) is charged with a high voltage via a diode (D21.). Then, when a light emission start signal is input from the flash controller (I) via the line (L21), the trigger circuit (TR) operates, the kimonon tube (XE) starts emitting light, and the cylisk (SC) becomes conductive. When the amount of light emitted from the xenon tube (XE) reaches a predetermined value, the stop circuit (TC) stops the light emission from the xenon tube (XE).

Next, the operation of this flash system will be explained.

First, the camera body (III) is fitted with 7 lashes (I).
The case where only V) is attached will be explained. In the flash device (IV), when the power switch (FS5) is closed, the terminal (ES
P) becomes “'Higl+” and the transistor (Br3
) becomes conductive, and the boosting circuit (DD7') starts the boosting operation. This transistor (Br3) automatically becomes non-conductive after a certain period of time (for example, 20 minutes) has elapsed if the flash device does not operate. In addition, the power switch (FS5
) is closed for a certain period of time, and when the switch (lAPs5) is closed while the transistor (Br3) is in a non-conductive state, the transistor (Br3) becomes conductive for a certain period of time again. Additionally, if the switch (APS5) is closed or data is exchanged with the camera body while the transistor (Br3) is in a conductive state, the transistor (Br3) will be in a conductive state for a certain period of time from that point on. There is. Note that when the transistor (Br3) becomes conductive, the light emitting diode (LD5) lights up to indicate that it is in an operating state. From the booster circuit (DD7) to the diode (D
The main capacitor (19) is charged with high voltage via
When the charging voltage of MC5) reaches a predetermined value, “I4igb” is output from the terminal (CHC) of the flash light emitting circuit (FLP3).
This terminal (CHC) outputs a signal of "Lou+" when the charging voltage of the main capacitor (MC5) has not reached a predetermined value.

On the camera body (III), press the metering switch (Sl)
When the control circuit (BOC) is closed, the control circuit (BOC) starts the flash device (
IV). First, “H” is applied to the line (L3) for a certain period of time (for example, 50 microseconds).
igl+" pulse (hereinafter referred to as FLCA signal) is output, and then eight clock pulses are output. Then, this signal is sent to the flash device (IV) via the connection terminal (Bl"23) and (FF23). control circuit (FLC)
3), and the control circuit (FLC3) outputs an attachment signal (“High” if attached) indicating that the 7 lash device is attached to the camera in synchronization with the clock pulse from the line (L3). , a charge completion signal indicating that the main capacitor has been fully charged (high 11” when charging is complete), a multi-flash signal indicating that the flash device is using multiple flashes (“Higl+” for non-multi-flash units)
”), an FCC signal indicating that dimming has been performed (“Low” when dimming has been performed) is output from the line (L2).

After reading the data from the line (L2), the control circuit (BOC) calculates an exposure control value for steady use and single flash photography based on the photometric value and set value. Next, a "Higb" pulse (hereinafter referred to as CAFL signal) for a certain period of time (for example, 100 microseconds) is output to line (L3), and then eight clock pulses are output to line (L3). , in synchronization with this pulse, the exposure control mode (hereinafter, aperture priority automatic exposure time control mode is set to A mode, exposure time priority automatic aperture control mode is set to S mode, and aperture and exposure time automatic control mode is set to line (L2)). P mode, aperture and exposure time manual setting mode (shown in Muku mode) and setting film sensitivity data are output,
The control circuit (FLC3) reads data from line (L2) based on the clock pulse from line (L3). Subsequently, the control circuit (BOC) outputs eight clock pulses from the line (L3), and in synchronization with these clock pulses, the aperture value data for flash photography and the following subject during flash photography are output. A signal (hereinafter referred to as Fill In signal "high") indicating whether or not to shoot with proper exposure is output from the line (L2), and the load control circuit (FLC3) responds to the clock pulse from the line (L3). Read this data synchronously.

In the automatic light control mode, the control circuit (FLC3) calculates the interlocking distance range based on the read data and the maximum and minimum light output data, and calculates the interlocking distance range in the manual setting light emission mode (in the following, automatic light control mode is set to auto).・If the mode is set (indicated by manual mode), the interlocking distance is calculated based on the set light emission amount and the read data. Then, read the aperture value, film sensitivity, F
The ill-in mode, the calculated interlocking distance range or interlocking distance, the charging completion state, and the auto or manual mode are displayed.

The control circuit (BOC) again performs data reading, photometry, calculation, and data transfer operations, and switches the photometry switch (S
1) is closed, repeat this operation. At this time, the exposure control mechanism (not shown) is charged and reset.
When the switch (S3) is open, the photometry switch (
Even if the flash unit W (Sl) is opened, the above operation is repeated for a certain period of time (for example, 5 seconds).
Even if no data is entered after 5 seconds, it will continue for a certain period of time (
For example, the display state is maintained for 1 second). Furthermore, the conduction of the transistor (Br3) is maintained for 20 minutes after no data is input.Meanwhile, in the camera body (III), when the operation of the exposure control mechanism is completed, the reset switch is (Si) is closed, the above operation stops immediately when the photometric switch (Sl) is opened, and in the flash device (IV), the photometric switch (Si) is closed.
The display continues for one second from the time the button is released, and then the display turns off.

When the release switch (Sl) is closed while the reset switch (S3) is open, the control circuit (BOC) again reads data from the 7-lash device (IV). Based on the read data, when it is determined that the flash device (IV) is attached and the main capacitor has been charged,
The exposure control value calculated for flash photography is used as exposure control data.

On the other hand, if the flash device is not installed or if the charging completion signal is not input even if it is installed,
The exposure control value calculated for constant light photography is used as exposure control data. Then, a pulse is applied to the flash device (Iv) for a certain period of time (for example, 150 microseconds) on the line (
L3) to start the exposure control operation. When the front shutter curtain of the camera completes travel, the X contact (S
x) is closed, and this closing signal is input to the control circuit (FLC3) through the line (Ll).

The control circuit (FLC3) sets the line (Ll) to “HiHh” except when data is being exchanged.
However, when the closing signal of the X contact (SX) is input from the line (Ll), the line (Ll) is set to "Low". In addition, if the 150 microsecond pulse at the time of release is not input, the contact (S) from the line (Ll)
The closing signal of x) is not accepted.

When the closing signal of the X contact from the line (Ll) is received, a light emission start signal is output from the terminal (STR) based on this signal, and the xenon tube (not shown) in the flash light emission circuit (FLP3) is activated. Light emission starts. In addition, a light emission amount measurement circuit (described later) is provided in the control circuit (BOC) of the camera body (Ill), and this light emission amount measurement circuit performs an integral operation when the line (Ll) becomes Lota''. At the beginning of the photograph, the flash light is reflected by the subject, passes through the controlled photographic aperture, and is reflected on the film surface.Then, when the $A value reaches the appropriate exposure level, the line ( L3) from "Lour" to "'Hi"
gb”.

This signal is sent to the controller (F) of the flash device (IV).
When LC3) is input, a light emission stop signal is output from the terminal (STP) to stop flash light emission.

Then, an FDC signal is prepared, and a "Low" FDC signal is output at the time of the next data transfer. This FCC signal is output for a certain period of time (for example, 2 seconds) from the time when the X contact (SX) is opened (for example, from the time when the trailing curtain of the shutter completes travel). Then, when the aforementioned 150 microsecond "1" pulse (hereinafter referred to as a release signal) is input during these 2 seconds, this FDC signal is reset.
While the DC signal is being applied, a display indicating that the light has been automatically adjusted is displayed on the 7 lash device (inactive).

When the flash device (1v) is in manual mode V, the first command to stop flashing from line (L3) is not received, and the flash device fires up to the manually set flash amount and then stops flashing. do. At this time, FDC
No signal is output, and no display indicating automatic dimming is performed. In addition, if P mode data is input from the camera while the flash device is in manual mode, auto mode will automatically adjust the flash within the range from the manually set flash output to the minimum flash output. automatically switches to auto mode and operates in auto mode.

The camera body side is also provided with a display means to display the status of the flash device (leap), and if the flash device attachment signal is not input, the light goes off at 5, and when the attachment signal is input, a charging completion signal is input. It blinks slowly when not in use, lights up when the attachment signal and charge completion signal are input, and blinks quickly when the attachment signal and FDC signal are input.In addition, when the FDC signal and charge completion signal are input Sometimes, priority is given to the FDC signal.

Here, the calculation contents in each mode for flash photography will be explained. In addition, the photometric value is Bv, and the film sensitivity is S.
v, and the exposure control value is Ev. First, in P mode, the set film sensitivity Sv is ISo 100 (Sv=5
) to calculate how much it deviates from (Sv 5=△S
v). Then, 6+ΔSv is set as the limit aperture value. That is,
The maximum aperture value is F8 for ISO100, FlG for ISO400, and F5.6 for 15O50. next,
The calculation Bv+Sv+1-Tvfl=Avf2 is performed. Here, TJI is the exposure time at the tuning limit when firing a single flash and corresponds to 1/250 seconds. Here, the calculated Avf2 corresponds to an aperture value of 1Ev7 ng for the photometric output. This is done when the F is backlit, etc.
This is because calculations for ill-In7 rush photography are performed. In other words, the light receiving element for photometry uses center-weighted photometry even when performing average photometry, and the photometry output is strongly influenced by the main subject (irradiated with flash light) in the center. Therefore, for a secondary subject where flash light irradiation does not contribute, there is a high probability that if the photometric output is increased by 1 compared to the reference value, it will be about 1 IEv over, and if exposure control is performed based on the exposure value of Ev + 1, the probability of obtaining suitable fill light is high. It will be expensive.

Next, it is determined whether Avf2 is within the range of 3≦Avf2≦6+ΔSv, and if this is the range, TvfI
and Avf2 to control exposure. At this time, the light emission amount control of the flash is such that a light emission stop signal is output when the amount of light emitted by the IEv adder is reached. This is Fill-
This is because during 1n7 lash photography, the main subject is also heavily illuminated by constant light, so if 7 lash light is irradiated to the appropriate exposure level, there is a high probability of overexposure. 3>Av "If it is set to 2, (3 corresponds to F2, 8) the exposure is controlled by setting the exposure time to 1/125 seconds using the F2, 8 pattern. At this time, the flash light is set to the appropriate exposure. Light is emitted until the level is reached.In other words, Evku1
In the range of 0, normal 7-lash photography is performed without considering the exposure of the sub-subject. Note that the reason why the fringe is not set more open than F2.8 is to prevent the depth of focus from becoming shallow. Further, the reason for switching the exposure time from 1/250 seconds to 1/12 seconds is to minimize the amount by which the secondary subject is underexposed.

When Avf2>ΔSv+6, ΔSV+6 and 1
The exposure is controlled at /250 seconds, and the flash light is emitted to a level below the proper exposure (I) and IEv. The reason why the aperture is not made smaller than ΔSv+6 is to prevent insufficient light emission. In this case,
The secondary subject will be overexposed, but if it is a normal subject other than the sky or the sun, the amount of overexposure will be small since Bv=9 in incident light metering, so no overexposure warning will be displayed. On the other hand, when 3>Avf2, the sub-subject will be underexposed, but the underexposure warning will not be given because the normal 7-lash photography is in progress. This over and under warning is used when shooting with constant light.
If overexposure or underexposure is determined, a warning is issued for both. Note that the range of 3≦Avf2 is the area for fill-in flash photography.

Next, the case of S mode will be explained. In this S mode, calculations are performed in the entire area as Fill-1n7 rush photography. First, the set exposure time Tvs is Tvs>T
When it is v41, Tvfl is set to the set value Tvs, and then the calculation of Ev+1-Tvs=i to ν is performed. Then, Av is the maximum aperture value AVL11 and the maximum aperture value Avo
It is determined whether the aperture value and exposure time are within this range, and control is performed using the calculated aperture value and exposure time. On the other hand, when it is outside this range, Ev+1-Avm=Tv
Or Ev+1-Av.

=TV is calculated, and if T vo≦Tv≦Tvr1, exposure control is performed using the exposure timing calculated as Av+n or Avo.If TV>Tvfl, exposure is performed using Avm and Tvfl, and if Tv<Tvo, exposure is performed using Avo and Tvo. control. Note that when Tv>Tvfl, an over warning is given, and when Tv<Tvo, even if the sub-subject performs fill-in flash photography, it will not be correct, so an under warning is given. Further, the flash light is emitted so that the entire area is under IEV.

Next, the case of A mode will be explained. In this case, the normal 7-lash shooting mode is used in all areas regardless of the brightness of the subject, and the controls are the set aperture value Avs and the synchronization limit exposure time Tvf.
Exposure control is performed at l, and the flash device emits light to a proper exposure level. Also, Ev+1 > Avs+Tvf
When it reaches 1, a warning of overexposure is issued. In addition, in this A mode, the under warning is the normal 7
This is not done because it is in rush shooting mode.

In the case of M mode, the entire area becomes the normal flash shooting mode regardless of the brightness of the subject, and the set exposure time Tvs
When Tvs>Tv41, Tvfl is set as the set exposure time. Then, the set aperture value Avs and the set exposure time Tvs
Exposure control is performed at , and the flash device emits light to the appropriate exposure level. Also, in this M mode, Ev+
When 1>Avs+Tvs, an over warning is given and an under warning is not given.

Next, the operation when the 7-lash controller (1) and the 7-lash device (11) are attached to the camera body (III) will be described. Flash controller (I
) and the 7 lash device (II) are connected, the connectors (CN3) and (CN8) are connected, and the connector (C
N4) and connector (CN7) are connected. In this state, press the main switch (FSI) of the flash device (II).
When closed, the line (L5) drops to ground potential.

That is, the line (L5), which was at "I-1-1i", is pulled down to "LOLI+" by the pull-up resistor until the main switch (FS1) is closed. The timer circuit (CTC) starts counting a certain period of time (for example, 25 minutes) with this falling signal to "Low" and turns on the transistors (BTI) and (Br3).

When the transistor (BTI) becomes conductive, the power supply battery (BAI) of the flash controller (I) is connected to the transistor (BTI), line (L7), and connection terminal (CF27).
, (FF17), and supplies power to the control circuit (FLCI) via the diode (D5). Further, power is also supplied from the line (L7) to the control circuit (CNC) via the diode (Dl). Furthermore, when the transistor (BTI) becomes conductive, the light emitting diode (LD)
I) lights up to indicate that the controller (1) is in operation.

When power is supplied from the line (L7), the control circuit (FLCI) receives a “High” signal from the line (L7).
h" signal is input, the transistor (Br3)
It is controlled independently of the timer in the control circuit (FLCI) and remains conductive as long as power is supplied to the line (L7). Also, since the closing signal of the switch (APS3) is invalidated if power is being supplied from the line (L7), the control 1iDif8 (FLCI
) will not be reset. In addition, even if the power battery (BA3) is not installed in the 7 run unit (TI), the control circuit (FLCI) is connected to the line (L7
), it operates because it is supplied with power. In this case,
The external pressure circuit (I) D3) does not operate because power is not supplied from the line (L6), and the light emitting diode (LD3)
disappears.

Due to the conduction of the transistor (Br3), the voltage circuit (DD
I) is activated and the line (L8) and connection terminal (CF28)
, (F F18), a high voltage is charged to the main capacitor (MCI) via the diode (D9). In this case, the power iW battery (B
l~1) are power batteries (BA3) for the flash device (11).
), so the main capacitor (MCI
) is charged to a predetermined value, and is suitable for high-speed continuous flash photography.
), (IV) switch (APS3), (APS5), and has the same function as the transistor (BTI) switch.
), (Br3) are closed in a conductive state, the transistor (
When transistors (BTl) and (Br3) remain conductive and transistors (BT1) and (BT2) are closed in a non-conductive state, transistors (BTl) and (BR3) become conductive for 25 minutes. This conductive state continues. Note that when the main switch (FSl) of the flash device (II) is open, the timer circuit (CT C) will not operate even if this switch (APSI) is closed, and the transistor (B
Tl) and (Br3) are not conductive. Also, from the camera body (I) to the line (C3) from the hunt roll circuit (CNC)
While data is being transferred from II) to the flash device, a "High" signal is output. This signal also operates in the same way as the switch (APSI) closing signal, and when the main switch (FSI) of the flash device (11) is closed, the timer circuit (CTC) is activated or the time (2
5 minutes). Also, after 25 minutes had passed, the transistors (BTI) and (Br3) had become non-conductive and the flash was installed! (+1) switch (APS3) is closed I&
) 7: "Only the star (Br3) is conductive. However, when the photometry switch (Sl) of the camera body (Ill) is closed and data is exchanged, the control circuit (CNC) 11) Power supply battery (
It is operable because it is supplied with power from BA3) through the connection terminals (FF16) and (CF26) and diode F (D3). Therefore, when the photometry switch (Sl) of the camera body (Ill) is closed and data is exchanged, a "High" signal is output to the line (C3) and the timer circuit (CTC) is activated. Transistor (B T
l) and (B T2) become conductive. This is the same even when the transistors (BTI), (Br3), and (BT3) are all non-conductive. In addition, the main switch (
FSl) is closed r#, otherwise the line (C3)
Even if a “High” signal is output to the timer circuit (CT
C) is not activated and transistors (B Tl), (B
T2) and (B T3) remain non-conductive.

Power battery (BAt) for flash controller (I)
When not installed, the control circuit (CNC)
Since power is supplied from the power supply battery (BA3) of the flash device (11), only the control function to be described later is utilized, and the function of shortening the charging time (power-up) of the flash device is eliminated.

The above is the flash controller (I) and the 7lash λ
This is an explanation of the power supply of the device (+1). Next, data transfer and light emission control will be explained. In this case, the camera body (
When sending data from the 7 lash device W (II) to the camera body (Ill), the 7 rash device (11)
When sending data to the camera body (I), the control circuit (CNC) only passes the data as is;
Necessary data is exchanged as is between the line (L2) and the 7-latch device (II) via the lines (L2) and (L12). In addition, the signal on the line (L3) is directly exchanged between the camera body (111) and the 7 lash device (IF).Furthermore, the closing signal of the X contact (Sx) on the line (Ll) is (Lll) to 7 lash device (11
), and the light is transmitted to the 7 Lassie device (river light emission).Then, with the start of light emission, the line (L12),
(L2) is lowered to Lo♂, and now the camera body (Ill
) operates, and when the proper exposure is reached, the line (L 3 ) rises to ``High'', and at this rise, the light emission of the 7 lash device (II) stops. If the controller (I) and the 7-lash device (11) are attached to the camera body (III), the flash device (1v) is attached to the camera body <III).
The main capacitor (λ4C) of the flash device (It) is operated by the power battery (BAI) of the flash controller (I).
I) The charging time is shortened (power up).

Next, the operation when all the devices shown in FIG. 2 are installed will be explained. Flash (The controller (I) has a switch for switching between simultaneous multiple flash emission mode and sequential multiple flash emission mode C and subsequent modes shown as simultaneous mode and sequential mode). First, the case where the sequential mode is selected will be explained.

Flash mounting m (II), (IV) color power / 5 main body (
When sending data to the flash controller (III), the attachment signal "High" is output from the flash device (II), (m) in synchronization with the first clock (bo bit).At this time, the flash controller (1) , 7 lash device (II
) and outputs this signal to the camera body (III). At the next clock (bl bit), the flash device (II), <IV) outputs an attachment signal. At this time, the flash controller (1) does not output a signal to the line (Ll), but latches the attachment signal from the flash device (m).

Therefore, it is determined whether there are multiple lights at the (bl) bit. Next, in the (b2) bit, the flash devices (II) and (Iv) simultaneously output the charging completion signal "High".
The flash controller (I) outputs the line (
It is determined whether charge completion signals are input from both Ll) and (L12). With the above, the controller (I)
This means that it is determined whether multiple flashes are being emitted or not, and whether both seven lash devices are fully charged, that is, whether both are fully charged. If both are in the full state, a light emission start signal can be transmitted to the flash devices (II) and (m).

In the (b3) bit, the controller (1) is connected to the line (Ll
) outputs the multi-flash signal “High” to the flash device (
m reads this signal and switches to a state where it starts emitting light at the rising edge of the stop signal from line (L3) and stops emitting light at the falling edge of the stop signal, instead of the light emitting start signal from line (Ll). . And from then on, (
For bits b4), (b5), and (bl), line (L
1), no signal is output. At bit ()14), the controller (I) outputs a both fullness signal "Higb°" to the line (Ll) indicating that both are full, and the flash device 1 (IV) becomes ready to emit light. In addition, if both are not in the full state, this '1811''
Since the signal is not output, the flash device (IV) does not emit light. (b5) bit, controller (L)
When the camera determines that there are multiple lights, the line (Ll) output is set to Low'', and the camera body (Ill) outputs the line (Ll).
If it is 'Low', it is determined that there are multiple lights.If it is not multiple lights, the flash device (IV) is set to '1-1-1i'.
” signal and determines that the camera does not have multiple flashes. (b6) bit indicates that the controller (I) does not output a signal when multiple flashes are used, and the flash device (IV)
If there is a C signal, the line (Ll) is set to "Low", and if there is no FDC signal, it is set to ')ligb'. Therefore, the camera (
III) determines whether the flash device (m) has dimmed in sequential mode. (bl) bit:
The controller (1) outputs a "High" signal when both 7-lash devices are fully charged, and a "L'ow" signal otherwise, and the camera determines whether or not to perform exposure control in flash photography mode. Do this.

When in the above mode of sending data from the flash to the camera, there is no need for the camera body (III).
In (bl) to (b4), the flash controller (
Data is exchanged between the flash controller (1) and the flash device (m), and the flash controller (1) also determines whether or not flash is possible and switches the flash mode, regardless of whether multiple flashes are used. The flash device (IV) switches the light emission mode and determines whether or not it is possible to emit light. During this time, no data is sent from the controller (I) to the 7 flash device (II) through the line (L12). Therefore, the flash device (II) is in the same state as in the case of independent flashing.Also, the camera body (II)
In I), when it is determined that the mode is multi-flash mode, the exposure time at the tuning limit is made longer by a certain value than in the case of single light emission. (For example, 1/250 seconds for single light emission is 1/125 seconds for multiple lights). This is to lengthen the time the shutter is fully open.

When the camera body (III) determines that it is in sequential mode, when the amount of light emitted by the flash device (0) reaches 7/10 of the appropriate exposure level, the light emission stop signal from line (L3) is sent. Stand up “Highly”. As a result, the flash device (11) stops emitting light, and after a certain period of time has elapsed since the flash device (II) started emitting light, the flash device (IV) starts emitting light. When the light emission amount of the flash device (IV) reaches 3/10 of the appropriate exposure level, the light emission stop signal from the line (L3) rises to 'Higl+' again, and the flash device (
1v) stops emitting light.

Therefore, the ratio of the amount of light emitted by the flash devices (11) and (IV) is controlled to 7:3, and the ratio of the amount of light emitted by the flash devices (II) and (m
The sum of the amounts of light emitted will give the appropriate exposure. Note that even if the flash device (11) emits all the light, it may not reach a level of 7/10 of the proper exposure. At this time, the time required for the flash device (1v) to receive a light emission stop signal from the line (Ll) and the 7 flash device (II) to fully emit light is counted, and when this time has elapsed, 7 The lash device (IV) starts emitting light. In this case, flash outfit! f(II).

(Although the ratio of the amount of light emitted by m is not 7:3, the total exposure can be set as appropriate. The reason for this ratio of light amount is that the light is irradiated from different directions to the subject, and the amount of light emitted is If the amount ratio is set to 7:3, the subject will be illuminated with a light amount ratio of 7:10:3, including the area illuminated by both flash devices, which will help create a three-dimensional effect when photographing people. The integral control signal from the line (Ll) sent from the flash to the camera is to output "Higb" for a certain period of time to perform the first integration, and to cause the dog to output a "Low" signal for a certain period of time. is output to reset the first integral, and a "High" signal is output again to perform the second integral.Then, the camera outputs the line (L).
Based on the signal from l), the first integration period is 7/10
In the second integration period, the reference signal of 3/10 and the integrated output are compared to output a light emission stop signal.

In the controller (1), a light emission start signal is manually input from the line (Ll) to two 7 lash devices (11).

(IV) is counting the time sufficient for each to fully emit light. Then, after this time has elapsed, the 7 lash device (V) is made to emit light. If this flash device (V) is of a type that automatically adjusts light and is placed so that only the background is illuminated, the background can be properly exposed.

Next, a case will be described in which the controller (I>) is in the simultaneous mode. In this case, even if the controller (I) determines that there are multiple lights, it does not output a multiple lights signal with the (b3) bit. Therefore, if the controller (1) receives a charging completion signal from either the flash device (11) or (IV), ,?in(
A light emission start signal from Ll) is output to the 7 lash device (II). Further, since a "High" signal is outputted from the 7 lash device (1v) at bit (b5), the camera body (III) performs the calculation of the independent light emission mode. Therefore, in this case, only multiple flashes are emitted.

Next, attach the controller (1) to the camera, and the flash device (
When the flash device (V) is installed, when the 7 lash device (II) or (IV) is fully charged, the light emission start signal is sent to the 7 lash device (II) or (m). I) became transmitted from
The flash device (II) or (IV) emits light. At this time, the flash device (V) does not emit light. In this case, the camera body (Ill) is in the single light emission mode, and this operation is performed regardless of whether the controller (I) is in the simultaneous mode or sequential mode.

Next, when the controller (1) and the 7 lash device <V) are attached, the controller (1) does not output a light emission start signal whether in the simultaneous mode or the sequential mode. Further, the camera body (III) remains in the constant light photography mode.

Table 1 summarizes the operations in each state described above.

In the following, specific examples of the camera body (III), flash ams (II) and (IV), and 7-lash controller (I) shown in FIG. 2 will be explained.

FIG. 3 shows a specific example of the camera body (III). (MC
O13) is a microcomputer (hereinafter referred to as μmcom) that controls camera operations and performs exposure calculations. This μmco+n (MCOB) is the main switch (M
Power is supplied directly from the power supply battery (BA9) via the SI). All circuits other than those described above are supplied with power from the power supply line (\'B) via the transistor (BTII). (PORI) is a power-on reset circuit in which the transistor (BTII) conducts and the power supply line (
When power supply starts from VB), the initial reset signal (
POB> is output. (IOC) is a connector (CN
1) A circuit that sends and receives data to and from the flash device and flash fan roller via (CN6), and controls data reading from the lens side circuit (LEC) via connector (CN20). A specific example of this input/output control circuit (1'OC) is shown in FIG. μ
The terminal (SCKB) of mcom (MCOB) is a terminal that outputs a clock pulse for synchronization when inputting and outputting serial data.
SOtlTB) is a terminal that outputs serial data, (SIN
B) is a terminal for inputting serial data. A circuit example of this serial data input/output section is shown in FIG.

Input/output control circuit (IOC) lines (LL), (L2)
, (L3) are connected to a data output circuit (LEC) on the lens side via connectors (CN20) and (CN21). The line (Ll) sends a synchronizing clock pulse to the data output circuit (LEC), and the line (L2) sends a "Higl+" signal from the camera body to the data ρ output circuit (LEC) while reading data. Also, line (L3)
is a terminal through which data is sent in series from the data output circuit (LEC) to the camera body. Data output circuit (LEC)
A specific example is shown in FIG.

(STPC) is a light emission control circuit including a photometry circuit for controlling light emission of a flash device. This light emission control circuit (
A light receiving element inside the STPC) is provided at a position to receive the subject light that passes through the controlled aperture 1) and is reflected from the film surface. The light emission control circuit (STPC) is connected to the line (
When the light emission start signal "LoI11" is input from ISTR), integration of the output current of the light receiving element is started, and when the integrated value reaches a predetermined value, the line (FSTP) is set to "Higb". A specific example of this light emission control circuit (STPC) is shown in FIG.

(LMC) is a photometric circuit for steady use, and the output of the photometric circuit (LMC) when the lens aperture is open is the photometric output no.
used as. This photometric output is μmcom (MCO
B) is input to the analog input terminal (ANI), and the output of the reference voltage source in the photometric circuit (LMC) is input to the μmco
It is input to the reference voltage input Jj terminal (VRI) of m (MCOB). And μmcom (MCOB) is the terminal (
The analog input terminal (AN
I) A-to-D conversion is performed on the photometric output input to I). Also, μm
The analog output terminal (AN○) of com (MCOB) also serves as the D-A converter used in the A-D converter in lcom (MCOB), and converts digital data corresponding to the film sensitivity into analog. It is converted into a signal and output to the light emission control circuit (STPC). Since the specific example of the photometric circuit (LMC) is well known, a description thereof will be omitted. Note that the light-receiving element of the photometric circuit (LMC) and the light-receiving element of the light emission control circuit (STPC) may be the same, and the respective circuits may also be used.

(ALDB) is over the state of the flash photography device.

This is a display section for under warning. This display section (ALD
B) will be explained based on FIG. First, I will explain about the 7 lashes. The output terminals (08) and (010) of μmcow (MCOB) output the signals shown in Table 2 according to the status of the flash device, and the light emitting diode (FLD)
) will display the corresponding display.

That is, if the flash device is not installed, or even if it is installed but the power switch of the flash device is not closed, the outputs of the AND circuits (ANl) to (AN6) all become "'Loa+". , light emitting diode (F
LD) is lit. When the flash device is attached and the power switch is closed, the charging completion signal is also F.
When no DC signal is input, the AND circuit (AN
The output of I) becomes “Higl+” and the AND circuit (AN
4) Counter (Cot) via OR circuit (OR5)
A clock pulse of 2112 is output from the terminal (E3), and the light emitting diode 1' (FLD) blinks at 2H2. Next, when the charge completion signal is input and the FDC signal is not input, the outputs of the AND circuits (A N2), (A N4), and the OR circuit (OR5) become "High" and the light emitting diode (FLD) Light. When the FDC signal is input, the output of the AND circuit (AN3) is High.
I+”, AND circuit (AN6), OR circuit (OR5)
) is the 8H from the terminal (El) of the counter (Cot).
The clock pulse of z is output, and the light emitting diode (FL
D) blinks at 8Hz.

Next, the over and under warnings will be explained.

First, in the ambient light shooting mode, if the exposure time and aperture value for control result in overexposure due to ambient light, the terminal (012) becomes "Higb" and the AND circuit (AN
7) from the counter (COI) terminal (E2)
A clock pulse of Hz is output, and the light emitting light 1'
(OLD) blinks at 4Hz.

On the other hand, when the control exposure time and aperture value result in underexposure due to constant light, the terminal (014) is
As a result, the AND circuit (AN8) outputs a 4Hz clock pulse from the terminal (E2) of the counter (coi), causing the light emitting diode (OLD) to blink at 4Hz. When the exposure is appropriate, terminals (012) and (014) are “Low”.
It is a light emitting diode (OLD).

(ULD) remains off. On the other hand, in flash photography mode, when the exposure due to ambient light becomes overexposure, the light emitting diode (OLD) blinks at 4Hz to give an over-exposure warning, but when the exposure due to ambient light becomes underexposed, the light will be set properly by 7 lashes ahead. Since there is a high probability of exposure, use a light emitting diode (OLD) as in the case of proper exposure.

(OLD) remains off, and no under warning is given. Note that when the exposure control operation starts and the yp.70 tube (RF3) (Fig. 3) is reset, the outputs of the AND circuits (ANA) to (AN8) become Low.
'', light emitting diode (FLD), (OLD), (
tJLD) goes out.

The switch (LLS) is a switch that is closed when the interchangeable lens is attached and locked, and is opened when the interchangeable lens is not attached and locked. When the open signal "Higb" of this switch (LLS) is input to the terminal (I4), μmcon (MCOB) outputs the data output circuit (LEC) of the lens.
) and perform open photometry calculations based on the read data.

On the other hand, the closing signal of this switch (LLS) is transmitted to the terminal (14
), data from the lens will not be read and actual aperture photometry will be calculated based only on the photometry output. Also, when the open signal of the switch (LLS) is input to the input terminal (I4), μmcom (MC
OB) causes the automatic focus adjustment control circuit (FCO) to perform automatic focus adjustment operation, but the switch (LLS)
As long as the FCO is open and the closing signal is not input to the input terminal (I4), the automatic focus adjustment control circuit (FCO) does not perform the automatic focus adjustment operation.

The decoder (DE'CI) receives data from the output port (OP) of μmcom (MCOB) at the terminal (
Set the - terminal of aO) to (al) to "'Higb"
Make it.

Then, an external data bus (ODB
) Data is exchanged through the network. Decoder (DE
Table 3 shows the relationship between the input and output blocks of CI) and the contents of the data bus (ODB>).

(MOS) is a block that outputs data for the set exposure control mode, (APS) is a block that outputs data for the set aperture value, (ETS) is a block that outputs data for the set exposure time, (FSS) is a block that outputs data of the set film sensitivity.

The automatic focus adjustment control circuit (FCO) is μmcom (M
While the output terminal (020) of µmcom (MCOB) is 'High', automatic focus adjustment operation is performed, and when the automatic focus adjustment operation is completed, the input terminal (I6) of μmcom (MCOB) is
Outputs a “High” signal to. The automatic focus adjustment control circuit (FCO) converts the subject light that has passed through the photographic lens into a light receiving element (MLM) having multiple light receiving sections (for example, a CCD
The defocus direction and defocus amount of the subject image are calculated based on the output received by the camera. Then, μmco is output from the lens data output circuit (LEC).
m (!VICOB) reads and connects the data bus (ODB
) through the latch circuit (LACl) to the value (
When the photographing lens moves due to the rotation of the motor (L, DM), and the subject image moves due to the movement of this lens, the coefficient of the amount of defocus relative to the amount of rotation of the motor (L, DM,) and the amount of defocus described above. The amount of rotation of the motor (LDM) to the in-focus position is calculated based on . Then, the motor (LD
M) is rotated, and the output pulses from the 7-auto coupler (PHC2) that detects the rotation of the motor (LDM) are counted. When the count value matches the calculated rotation amount value, the motor (LDM) is rotated. Stop rotation. This automatic focusing operation is not directly related to this invention.
Furthermore, the applicant of the present application filed Japanese Patent Application No. 1586 (1986), which is described in detail in the specification of No. 1, so the description thereof will be omitted.

(DPB) is a display circuit with 7 lips and 70 tubes (
While RF3) is in the set state, the terminal (a5) is “Hi”.
gl+" via the data bus (ODB) /' -
The exposure control mode and exposure control value are displayed based on the display data sent from com (MCOB). Then, the exposure control operation starts and the flip 70 knob (RF3
) enters the reset state, the display will turn off. Note that when using a display means that is not a light-emitting type and consumes less current, such as a liquid crystal display, there is no need to turn off the display even when the exposure control operation starts.

(APCC) is a print control circuit. The aperture control circuit (APCC) controls the aperture aperture based on data of the number of aperture stages ΔAva for steady light exposure or the number of aperture stages ΔAv[ for flash light exposure, which is sent from the data bus (ODB). When a pulse of "l-1-1i+" is output from the output terminal (018) of μmcom (MCOB), the release circuit (RELC) operates and the aperture operation starts.
I) outputs a pulse associated with the movement of the aperture member (not shown), and the aperture control circuit (APCC) counts this pulse, and the count value corresponds to the aperture stage number data △
If it matches Ava or Avr, the magnet circuit (MG
DI) to stop the narrowing down operation. In the manner described above, the aperture is controlled to the planned aperture aperture Ava or Av''.

(ETCC) is an exposure time control circuit. This exposure time control circuit (ETCC) controls the opening time of the shutter based on the data of the ambient light exposure time Tva or the flash photography exposure time Tvf sent from the data bus (ODB). μmcom (MCOB) output terminal (
When a "High" pulse is output from 018), 7 lip-flops (RFI) are set and the magnet circuit (MGD2) operates to lock the movement of the shutter trailing curtain. Reflection mirror (not shown) When the rise of Tva or Tvf is completed and the shutter front curtain starts running, the switch (S3) is closed, and the exposure time control circuit (ETCC) counts the time based on the sent data Tva or Tvf. A “High” pulse is output from the terminal (TIE).This pulse resets the 7 rip-flop (RFI) via the OR circuit (ORI), and the magnet circuit (MGD2) becomes inactive and the shutter is closed. The trailing curtain starts running. Also, 7 rip, 70 rip (RFI
) is input to the delay circuit (DLI), and the output of this delay circuit (DLI) is input to the light emission control circuit (STPC).
) is entered. The delay time of the delay circuit (DLI) corresponds to the time from when the shutter trailing curtain starts running until it starts covering the film surface, and this time allows photometric integration for controlling the amount of light emission.

Next, specific circuits of each part in FIG. 3 will be explained.

Figure 5 shows the serial data input/output section of μmcoin (MCOB), and shows the μmcoin (MCOB) serial data input/output section in the 7-laser social device described later.
It has the same configuration as the serial data input/output section of Com (M co F ). 7 lip flop (DLI7
) ~ (DFIOL (DF27) ~ (DF20) constitute a shift register, and flip 70 tubes (DF
27) to (DF20) take in and output data from the upper bits at the rising edge of the clock, and output 7 rip/70
The knobs (DLI7) to (DFIO) are configured to take in data from the -L bit at the falling edge of the clock and output it. Also, 7rimp 70rump (DL
I7) to (DFIO) are internal data buses (II)
Terminals (b07) to (boo), (b17) from B)
) to ([110), the output data is set and the terminals (b27) to
The read data is output to the internal data bus (IDB) via (+120).

lNCl0UTC is a state signal for selecting whether to use an internal clock or an external clock as a synchronization clock for input/output. If this signal lNCl0UTC is °llligl, I+, the internal clock INCL
K is used as a synchronization clock, and this clock is outputted to a terminal (SCK) via an AND circuit (AN13) to provide it to an external circuit as a synchronization clock as well. On the other hand, if the signal I N Cl0UTC is "Lou+", it is input from the terminal (SCK) and data is input/output using U-/R as a synchronization signal.

When there is a serial input/output instruction 5l110, the 7 lip/70 knob (BF5) is set and the 721 circuit (ANIO)
, (ANII) becomes active, and the synchronization clock is connected to the counter (CO3) and flip-flop (BF17).
~(DFIO), (BF27) ~(BF20) are given. And every time the clock rises, 7 rip
The data set to the terminal (SOUT) from the 70-bit DF20) is sequentially output from the lower pit, and each time the clock falls, the data input to the terminal (SIN) is changed to 7-bit/70-bit (BF17). The data is taken into the 7th lip and 70th lip of the lower bits in sequence. When the 8th clock pulse is input to the counter (CO3), the carry-1 terminal (CY) becomes ``Higb'', and when this 8th clock falls and becomes ``Lou+'', the AND circuit ()\N12) The output of “for! Stand up to gl+“.This causes 7 lips and 70 teeth (RF!
5) The counter (CO3) is reset and the data input/output operation is completed, and the "I-1i gb" pulse from the AND circuit (AN12) indicates that the data serial input/output operation is completed. The signal l10END is output.When this signal l10END is output, data can be read through the terminals (l)27 to (b20).Also, if new data is to be output, the terminal (b07 ) to (boO) and (b17) to (blo) to set or reset the flip-70 tubes (BF17) to (DFIO). Figure 6 shows the data input/output circuit (IOC) and light emission control. A specific example of the circuit (STPC) is shown, and the light emission control circuit (STPC) is surrounded by a broken line.When the terminal (02) is "I-l-1i+" and the terminal (04) is °Lo, +1 is in the state of reading data from the data output circuit (LE(,,) of the lens. That is, at this time, the AND circuits (AN15) and (AN17) are in the operable state, and the terminal (SC
The clock pulse from KB) is connected to the AND circuit (AN15)
from the data output circuit (LEC) via the terminal (BF2)
The data from the data output circuit (EC) input from the terminal (BF4) is sent to the AND circuit (AN17),
p-corn (MCOB
) terminal (SINB)-1 is input. In addition, the terminal (02
) The lens selection signal (C3LE) from the terminal (BF3
) is sent to the data output circuit (LEC) to enable the data output circuit (LEC).

Next, data exchange with the flash device will be explained. In this case, the terminal (o4) becomes "High", the flash selection signal (C3FL) is output, and the AND circuit (AN19), NAND circuits (NA1), and (NA3) are enabled to operate. First, from terminal (06) to FL
CA signal (50 mic a second Hals), CAFL signal (1
When the release signal (150 microsecond pulse) and release signal (150 microsecond pulse) are applied, these signals are applied to the Nan l' circuit (NAI) via the OR circuit (OR5), and the transistor (BT15) becomes conductive. and terminal (B F1
3), (B F23) outputs a "Highly" pulse. In addition, the clock pulse from the terminal (SCKB) is also output from the OR circuit (OR5) and the NAND circuit (NAI-
), terminal (BF13) via transistor (BT15)
), (BF23).

Data from the flash device is sent to the terminal (BF12), (BF
22), when the data is “Higb”, the transistor (13TI9) becomes conductive and the data becomes “°1”.
In the evening, the transistor (BT19) becomes non-conductive.The signals of "High+" and "Low" due to the conduction/non-conduction of this transistor (BT19) are output from the AND circuit (AN
19) and is inverted via the OR circuit (OR7) to the terminal (
SINB). At this time, if the transistor (BT17) is not turned off, the transistor (BT19) will remain conductive, so before reading data from the flash device, read the 7-rip switch shown in Figure 5.・Reset all the 70 tubes (BF17) to Flo), the output from the terminal (SOUTB) is always set to "Loa+", the output of the NAND circuit (NA3) is set to "High", and the transistor (BTI7) is always set to "Loa+". It is made to be non-conductive. On the other hand, when sending data from the camera body to a flash device, use the data output terminal (
When a signal of Hi) (h) is output from SOUTB), the output of the NAND circuit (NA3) becomes "Low", the transistor (BT17) becomes conductive, and the signal of "I-l-1i+" is output from the terminal (B F12) and (B F22), and when the “Lou+” signal is output from the terminal (SOUTB), the output of the NAND circuit (NA3)
"L", the transistor (B
F22). The input/output section for exchanging data between the flash device, controller, and camera body is composed of a PNP transistor on the data output side of the flash device, controller, and camera body, and an NNP transistor on the data input side.
PN) Consists of Rannostar. Next, the light emission control operation by the light emission control circuit (STPC) will be explained. (
PDI) is a light-receiving element that receives reflected light from the film, and this light-receiving element (PDI) is connected to the second
Opamp 7' (OA2
) A logarithmic compression diode (D30) is connected between the output terminal and the inverting input terminal. Operational amplifier (OA2)
An analog signal corresponding to the apex value of the film sensitivity is input from an analog output terminal (ANO) to the non-inverting input terminal of the camera via a buffer formed by an operational amplifier (OAI). Therefore, from the operational amplifier (OA2), there is no response.

The transistor (BT
23) is a logarithmic expansion of this potential into a current, so that the collector current of the transistor (BT23) corresponds to the value obtained by multiplying the object light intensity by the film sensitivity. Furthermore, at this time, since the aperture is controlled to a predetermined aperture aperture, aperture information is also included in the subject light. Therefore, when the value obtained by integrating the collector current of this transistor (+3T23) reaches a predetermined value, it means that the flash device has emitted light by an amount that provides proper exposure.

As mentioned above, the 7th lip and 70th lip (
RFI) is the μmcom (MCOB) terminal (018
) is set when the release pulse is output from
It is reset when the exposure time count is complete.

Therefore, the output of the delay circuit (DLI) remains "High" from a certain period of time after the release pulse is output until a certain period of time after the shutter trailing curtain starts running.

Therefore, during this period, the AND circuit (AN21) is in an operable state. In addition, the release pulse from the terminal (018) causes 7 rip and 70 lub (DF70) l ('I').
Fl) is reset. When the shutter front curtain completes its travel, the X contact (S
u+", the transistor (BT19) becomes non-conductive, and the output of the AND circuit (AN21) becomes "I-1igl".
+” becomes.

At this time, 7 lips, 70 tubes (TFI), (DF70
) are both in the reset state, the output of the AND circuit (AN182) becomes "High", the output of the inverter (IN82) becomes "OWI+", the transistor (BT62) becomes conductive, and the resistor (R62) becomes "High". ) flows from the constant current source (C11,0).As a result,
It is dangerous to apply a voltage equivalent to 70.7% of the proper exposure to the inverting input terminal of the funparator (AC20). AND circuit (
The “Higb” signal from AN21) is sent to the OR circuit (
OR92), AND circuit (AN188), OR circuit (O
R94) is immediately outputted to the transistor (BT
66), the transistor (BT66) becomes non-conductive, and integration of the collector current of the transistor (BT23) corresponding to the intensity of light received by the capacitor (C10) starts.

The signal power shown in Table 4 is output from the analog output terminal (ANO). Therefore, with a single light emission, Fill-In 7Ratsushi x Mot'tenake jtl! '2Sv-"' /25v
Since there is a relationship of =0.707, the capacitor (CIO)
When the integrated voltage of matches the output voltage of resistor (R62),
The flash device emits light until the proper exposure is achieved, and the output of the comparator (AC20) is l l-o,1
1, and the F transistor (BT13) becomes conductive, so that the terminals (B F13), (B F23), and the line (L
3) rises to °'l11g11'' and light emission stops.

- In the Fill-1n7 rush mode with single light emission, the Fill
Since a value larger by lh than when not in the -In flash mode is output, the light emission stops when the amount of light emission becomes half of the proper exposure.

Next, the case of sequential light emission mode instead of Fill In flash mode will be explained. In this case, since the Sv signal is output from the analog output terminal (ANO), when the first light emission reaches 70.7%1 of the appropriate value, the output of the comparator (AC20) is inverted to "Low". Stops emitting light. Then, after a sufficient time has elapsed for the time required for full light emission, the line (L3) is inverted to "LoII+++", and the output of the AND circuit (AN21) falls to "Low", resulting in 7 lips and 70 tubes (TFl). The output of the comparator (AC20) is inverted.Furthermore, the output of the comparator (AC20) is “Lo
III”, the output of the inverter (IN80) is “High
”, so when the output of the AND circuit (AN21) falls to “Low”, 7 rip and 70 rip (DF
70) becomes “High”. As a result, the output of the AND circuit (AN180) becomes “Higl+”,
The output of the inverter (IN81) becomes “Lou+”, the transistor (BT64) becomes conductive, and the resistor (R64) becomes “Lou+”.
) and the constant current i ((CI 10)) is applied to the inverting input terminal of the comparator (AC20).The resistance value of this voltage is selected so that it becomes 29.3% of the proper exposure.

Also, the AND circuit (AN21)
When the clock pulse (CPB) reaches 1, the Q output of the frinzo flop (DF74) goes to Lo after two clock pulses (CPB).
IIl'' and the output of the OR circuit (OR92) becomes Lo.
It becomes III゛1. This creates an AND circuit (AN1
86), (AN188), and the outputs of the OR circuit (OR90) all become "Lo♂1", and the output of the OR circuit (OR94) also becomes "ILowI+". Therefore, the transistor (B
T66) conducts and discharges the integrated charge of the capacitor (CIO).

When the second 7-lash device starts emitting light, the line (L2) becomes “HiH1+” again, and the AND circuit <AN2
1), OR circuit (OR92), AND circuit (A N 1
86), the output of the OR circuit (OR94) immediately goes “High”.
h", and the transistor (BT66) becomes non-conductive. As a result, the capacitor (CIO) starts integrating the current corresponding to the intensity of light received by the second 7 lash device, and the integrated voltage is applied to the resistor (R64). When the output voltage of The ratio of the amount of light emitted by the device is approximately 7=3, and the sum of the amounts of light emitted provides appropriate exposure.

When the first light is emitted, the line (L2) becomes “Low”.
1, even if the flash light emitting device emits all the light, it may not reach 70.7% of the proper exposure. In this case, the output of the inverter (INTO) is “L”
ou+”, so 7 rimp, 70, p(T
Even if the output of Fl, ) is reversed, it will still be 7 lip/70 tub (D
F70)'s ◇output remains at "Higb".

Therefore, when line (L2) falls to Loiu'',
The output of the AND circuit (AN184) is “°to1right”
and the output of the inverter (IN83) becomes 'Loul'.
The transistor (BT60) becomes conductive. As a result, a current from the constant current source (CI10) flows through the resistor (R60), and a voltage determined by the resistor (R60) and the constant current source (CIIO) is applied to the inverting input terminal of the comparator (AC20). The resistance value of the resistor (R60) is selected so that this voltage corresponds to proper exposure.

When the output of the AND circuit (AN21) falls to “LoIII”, 7 rip/70 lub (D F72), (D
After being delayed by F74), the output of the OR circuit (OR92) falls to the II Lo field 11. Therefore, when the output of the OR circuit (OR92) becomes 'Loud', in this case, the output of the AND circuit (AN184) will definitely be 'Loud'.
It is set to “Higl+”.

Furthermore, the output of the AND circuit (AN182) is “LoII
I” becomes 1.The output of the AND circuit (AN184) or Il
l, (igl, II, ゛ has 17 circuits (O
The output of R92) still remains at "HigI+", and the output of the OR circuit (OR90) remains at "ll1g1+". Therefore, the transistor (13T66) remains non-conductive, and the integrated charge of the capacitor (CIO) remains undischarged. Then, when the second flash device starts emitting light, the capacitor (
When the total amount of light emitted by the two 7-lash devices reaches a value corresponding to proper exposure, the output of the funparator (AC20) is reversed and the light emission from the second 7-lash device is inverted. Stop. Therefore, in this case, although the ratio of the amount of light emitted light is not 7:3, only proper exposure based on the total amount of light emitted light is compensated.

When in sequential mode and Fill-In7 rush mode, more IEv is output from the analog output terminal (ANO) than when in sequential mode and not in Fill-In7 rush mode.
Since a smaller value is output by that amount, the amount of light emitted is 35.35% and 14.65% of the proper exposure, and the ratio is 7:3 and the total is half of the proper exposure. Also, if the first 7 lash devices do not fully emit light and reach 35.35%, the ratio will be 7.
:Although the exposure is not 3, the total exposure is half of the proper exposure.

FIG. 7 shows a specific example of a data output circuit (LEC) for an interchangeable lens, and this example shows the case of a zoom lens.

The part (COD) surrounded by a broken line is a hood plate that outputs data corresponding to the set focal length. (FPO)～(F
P4) is an electrode pattern provided on the code board,
These patterns (FPQ) to (FP4) are connected to the power supply terminal (LLl, ) via a pull-up resistor.

Further, (COP) is a common electrode pattern connected to ground. The sliding member (VT) has an electrode pattern (FPO) to (FP) according to the setting position of the focal length ring (not shown).
4) It is located at 1 and outputs the data corresponding to that position via inverters (INIO) to (INI4).

When the output terminal (02) of 77-coll (+'14COB) in FIG.
The reset state of O7) is released and it becomes possible to count black and yellow from the terminal (LL2). And the terminal (LL
When a clock pulse is input from 2), as shown in Table 5, the counter (CO5) changes the outputs (C2) to (CO) in synchronization with the rising edge of the clock pulse, and the decoder (DE5) The outputs (dO) to (d7) become "I-l-1i+" one by one. As a result, the output terminals (clo') to ((
AND circuits (AN30) to (A
N37) become operational one by one. The output data (rO) - (r7) of the ROM (RO) connected to the other input terminals of the AND circuits (AN30) to (AN37) are sent bit by bit sequentially from the lower bit to the OR circuit (OR9). Output and terminal (LL4)
, (BL4) (Figure 3), the serial data input terminal (MCOB) of II-com (MCOB) via the input/output circuit (IOC).
SINB) and are sequentially read at the rising edge of the tarock pulse, which is the same as the clock pulse output from the terminal (SCKB).

When the 8th clock pulse rises, the carry-1 terminal of the counter (CO5) changes its output to Hi8b, and the next 1
When the second Tarokku pulse rises, “LOIllI
Fall to +. The counter (CO7) outputs (
C3) to (C6), the decoder (DE
7) changes the outputs (d8) to (d12) according to the output of this counter (CO7) as shown in Table 6. The data selector (DSI) is the decoder (DE7)
During ILLoIllII, the output terminal (cll2) of the input unit (RO) outputs the data from the input section (RO) as the 7 address data of the ROM (RO), and the output terminal (cll, 2) of the detector (D E7) outputs "'" When it becomes "Hight+", the data from the input section (β1) is output as address data of the ROM (RO). Therefore, ROM (RO) is
(SO) to (S) according to the count of the counter (C07)
In step B), addresses in which fixed data is stored are sequentially specified, and in steps (SB) to (SB), addresses in which data that changes depending on the focal length setting are sequentially specified with the zoom lens. It is specified.

In the (SO) step, address "0011" is designated jx, and check data is output from the ROM (RO). If the camera accessory is equipped with a data output circuit (1, EC), this data will be stored at this address °'
00+1” all have the same data written @.(
In step SL), the address "'01+1" is specified, and the data of the open aperture value AvO of the lens is output from the ROM (RO).

In the case of a zoom lens whose aperture value changes depending on the focal length, the data of the open aperture value (smallest value) at the shortest focal length is stored at this address "OIH". (S2) In step, address “02H”
is specified, and the maximum aperture value Avm (aperture value at the minimum aperture)
data is output. In this case as well, in the case of a lens whose aperture value changes depending on the focal length, the maximum aperture value at the shortest focal length is stored. In step (S3),
Address “0311” is specified and focal length data is output.

In this case, if it is a zoom lens, the data of the longest focal length is stored at this address "03H".

In steps (S4), (S5), and (S6), data on open photometry errors are input. Since the aperture photometry error is caused by the difference in the exit pupil position of the interchangeable lens and the position of the light receiving element of the camera body relative to the film surface, this value will differ for different types of camera bodies even with the same interchangeable lens. Therefore, the interchangeable lens has three types of data for the camera body at ROM (RO) addresses "04H" and "O5H".
, "06++", and the camera body adopts data suitable for the camera body from among the read data. In step (S7), address "0711" is designated and data indicating whether automatic focus adjustment is possible is output. Next, in step (S8), the address "0811" is designated, and a value is output, which is a conversion coefficient between the rotational speed of the motor and the amount of movement of the lens used during automatic focus adjustment. Note that in the case of a zoom lens in which the K value changes, the value at the longest focal length is output, for example.

This is fixed data sent from the lens.

When the output of the counter (CO7) becomes “1001”,
The terminal (β12) of the decoder (D E7) is “Highly
” and the data selector (DSL) is the input part (β1)
It will now output data from. The -L-order 3 bits of the input section (β1) are input with the output from the decoder (D E7), and the lower 5 bits are input with data from the code board (COD) that outputs data corresponding to the set focal length. . Therefore, in step (S9), "(Hlloooo
One of the addresses from “oo” to “001 11111”
is specified, and data indicating the set focal pressure #11 is output. Next, in the (SIO) step, oio
One of the addresses ``oooooo''-'01011111'' is designated, and the amount of change ΔAvz from the aperture value at the shortest focal length at the set focal length is calculated.

Then, in step (S11.), “Qlloooo
One address from the addresses o'' to '011 1:1111'' is specified, and the value at the set focal length is output.

Next, μmco in Figures 8-1, 8-2, and 8-3
The operation of the camera body (1) in Fig. 3 will be explained based on chart 70 showing the operation of m (MCOB). Figure 8-2 shows the photometry switch.

It shows the operation for 5 seconds after the switch (Sl) is released, and the eighth
Figure-3 shows the operation when the release switch (S2) is closed I&.

When the photometry switch (Sl) is closed I&, II-co
An interrupt signal is input to the interrupt terminal (mountain) of in (MC0B), and μmcorn (MCOB) starts operating from a specific address. First, set the flag MSF to “1”,
By setting the terminal (OO) to Hi8h”, the inverter (I
The transistor (BTII) is made conductive via the transistor (NS), and power supply to circuits other than μmcom (MCOB) by the power supply line (VB) is started. In addition, the power-on reset circuit (PORI) is activated by this start of power supply, and a reset signal (POB) is outputted.

Various circuits connected to +o (MCOB) are set to their initial states. Then, in step #3, the switch (LLS) is closed and the terminal (i4) is connected to “Higl”.
Check whether the signal II is being input. By distinguishing between ll and ll, it is determined whether a lens is attached or not. If the terminal (i4) is "Higb", the lens is attached, so the operation moves to reading data from the balance lens in #4 to #11, and if the terminal (i4) is "Low", the lens is attached. Since the lens is not attached, #1
Register D for specifying input data in step 2
The contents of NR are changed to ``''(IcII'') and the process moves to step #15.

Here, Table 7 shows the relationship between the contents of the register DNH, the data taken in corresponding to the contents, and the memory register M (DNR) to which the taken data is set.

In step #4, the terminal (02) is set to "HigI+" and the lens selection signal (C3LE) is output, and the register D
The contents of NH are set to 0011 and serial data input/output operation is performed in step #6. When the input/output operation is completed, the captured data is transferred to memory register M (
DNR). Then, it is determined whether the contents of the register DNR have become "OCH", and if it is not "OCH", the process returns to step #6 and reads data from the next lens.This operation is repeated. ,
In step #10, the contents of register DNH become “OCI+”.
”, all the data from the lens shown in Table 7 has been set in the memory register Moo-MoB. Then, in step #10, the contents of the register DNR are changed to “ 0C11'', the terminal (02) is set to ``LoIII'' in step #11, the lens selection signal (C3LE) is removed, and the process proceeds to step #15.

In step #15, set the terminal (04) to “HigI+”
to output the flash selection signal (C3FL), and then set the terminal ``06'' to ``High'' for 50 microseconds to send the F L CA signal to the 7 lash device, and
“'00” on the shift transistor for series input/output (Figure 5)
11" to perform serial input/output operation. Then, when the input/output operation is completed, the data indicating the status from the input flash device (installation signal, charging signal, FDC signal, multi-flash signal) is stored in the memory. Set it in the register Moc,
1 is added to the contents of the register to make it 0D11'', and the process moves to steps #25 to #3() to fetch the data set on the camera side.

In step #25, the contents of register ABR are set to “°00”.
"H" and outputs the contents of register ABH in step #26.Then, as shown in Table 3, the output cap
Setting data selected in response to the output of (OP) is output to the external data bus (ODB), and this data is taken into the memory register M (DIR). And register D
Add 1 to NR and the contents of register ABR, and register A
Determine whether the content of PR is 4, and if it is not 4, #
Return to step 26 and import the next setting data. #
When it is determined in step #30 that the content of the register ABR is 4, an A-D conversion operation is performed in step #31, and the output of the photometry circuit (LMC) is converted to A-D. do. Then, in step #32, the flag MS
Determine whether F is "1". This frame 43F is "1" when the photometry switch (Sl) is closed and this step #32 is reached, and when the timer interrupt (5 seconds after the photometry switch (Sl) is opened) comes to this step #32. 32, it is 0". Then, since automatic focus adjustment is not performed when operating by timer interrupt, 1 is set in register ABR in step #41.
After adding , the content becomes 5, and then moves to step #38.

On the other hand, if it is determined in step #32 that the flag MSF is "Pa1", data indicating that the lens is attached and automatic focus adjustment is possible from the lens is input in step #33. If data indicating that automatic focus adjustment is possible is not input, the process moves to step #38 via step #41.On the other hand, if data indicating automatic focus adjustment is possible is input. If so, in step #34, the data for automatic focus adjustment (K value, maximum aperture value, etc.) is output to the input/output port (10P), and the contents 4 of register ABR are output to the input/output port (OP).
)i out. Then, as shown in Table 31, the terminal (a4) of the decoder (DECl) in Figure 3 becomes "+1igI+".
", and at this rising edge 1), the automatic focus adjustment data is latched into the latch circuit (LACI). Then, after adding 1 to the contents of the register ABR to make it 5, the terminal (020) is set to "Highb ” and the automatic focus adjustment circuit (
FCO) and move on to step #38.

Step #38 is an exposure calculation step and is always 7
Calculations are performed for Ranciu photography and constant light photography.

This specific example is shown in Figures 9-1 and 9-2. When the exposure calculation is completed, in step #39, terminal 2) becomes “°■ old gi+” and the reset switch (S4
) is closed. Then, it is confirmed that the reset switch (S4) is closed.
If it is separated, the exposure control mechanism is not in a state where exposure control is possible, so the process directly proceeds to step #45. On the other hand, if it is determined that the reset switch (S4) is open, the exposure control mechanism is in a state where exposure control is possible, and furthermore (the third exposure control data has been calculated, so #40 Press the release switch (
S2) is opened to enable an interrupt to the terminal (itb>), and the process moves to step 45.

In step #45, it is determined whether a charge completion signal is input from the flash device based on the data from the flash device stored in the memory register Moc. Then, as soon as the charging completion signal is input, the contents of register ALR1 are sent to the terminal (012), (
014) to output over/under warning signals for 7-lash photography, and display data for flash photography (exposure control value, mode, Filln, etc.) from the input/output port (IOP) to the external data bus. (ODB)
Output to.

On the other hand, if it is determined in step #45 that the charge completion signal has not been input, the contents of the register A L R2 are output to the terminals (o12) and (0↑4), thereby providing an overload signal for ambient light photography. '・In addition to outputting the under warning signal, the display data for constant light photography is sent to the external data bus (O
[) Output to B). Transfer display data to external data bus (O
DB), then the contents of register ABR
Output to output (OP).

Then, as shown in Table 3, the display data is displayed on the display section (D
PB). Then, in step #50, a "Higb" pulse is output to the terminal (016), the 7 lip-flop (RF3) is set, and the terminal (ALD) is set.
Set to “Higb” and display section (ALD>, (DPB)
is displayed.

In step #51, it is determined whether the lens is attached and check data has been input, and if the check data has been input, the process moves to step #52. #
In step #52, the calculated aperture value Avf for flash photography is set to bits b6 to bo of the input/output shift register, and then in step #53, Fill I is set.
Determine whether n7 rush mode is selected and fill-1
For u7 rush mode, set the b7 bit to 1", and
If it is not ill-In7 rush mode, set “0” to b7
Set to bit. On the other hand, if the check data is not input in step #51, the aperture value has not been calculated, and in step #56, set 7811" to bits b7 to bO of the input/output shift register, and then proceed to step #57. Then, in steps #S7, #S8, and #59, terminal (06) is connected to "l-1-1i" for 100 microseconds.
Send the CAFL signal as “+” to the 7 lash device and #6
A serial data input/output operation is performed at step 0, and this data is sent to the 7 laser unit. When the data input/output operation is completed, the exposure control mode data is transferred to b7 of the input/output shift register in step #62.
l) Set bit 6, then film sensitivity data S
Set v to bits i]5 to bO to perform serial data input/output operations, and send this data to the 7-lash device.

When the sending of this data is completed, the terminal (04) is set to LoII+" in step #66, the flash selection signal (C3FL) is removed, and the process moves to step #7o. Here, the data sent to the flash device is Table 8
These are shown in Table 14.

In step #70, it is determined whether the terminal (io) is "HigI+", that is, whether the photometric switch (sl) is closed, and it is determined that the photometric switch (sl) is closed. Then, #3 step.

The program then returns to the program and performs data reading and arithmetic operations again.

On the other hand, if the photometry switch (sl) is not closed I&,
Step #7b7) Set the terminal (020) to “LoIll”
As such, the automatic focus adjustment operation is not performed, and it is determined whether the flag MSF is "1". If the flag MSF is "1", this means that the photometry switch (sl) has been released. In this case, the 7 lug l111S'F should be closed to "0" and the terminal should be set to 2), but "Higl+" should be
That is, it is determined whether the reset switch (s4) is mI&. And reset switch (S4)
is closed and the exposure control mechanism is not in a state where exposure control is possible, it is possible to accept an interrupt signal to the terminal (iLa), and the terminal (00) is set as "LoIIIll" and power is supplied from the line (VB). is stopped and enters the CEND state.

In this case, the way to get out of the CEND state is at the terminal (
it only provides an interrupt signal to the photometric switch (Sl) by closing the photometric switch (Sl).

In this CEND state, Jbcom (MCOB) is in a low power consumption state and only the internal counter is in an operating state.

When it is determined in step #74 that the reset switch (S4) is open, data acquisition and calculation/display operations are repeated for 5 seconds from this point. Therefore, in step #75, terminals (iLa), (itb)+
Set the state in which it is possible to accept the interrupt signal to the µmcom (MCOB) and the timer interrupt signal generated by the count up of the counter in μmcom (MCOB), set the data 5SI for counting 5 seconds in the register TIRO, and CEND.
becomes the state of Also, in step #72, 7 lag MSF
If it is determined that 5f is "0", in this case, this step has been reached by the timer interrupt, and #
In step 79, terminals (ita), (iLb) and the timer are activated. FIG. 8-2 is a flowchart showing the operation by timer interrupt. For example, this timer interrupt is 25
An interrupt signal is generated every 0 milliseconds, and μmcom (MCOB
) is in the timer interrupt enabled state, the operation from step #85 is performed every 250 milliseconds. In step #85, interrupt signals from the terminals (+ta) and (itb) can be accepted, and in step #86, a constant value α0 is subtracted from the contents of the register T I RO. Then, it is determined whether the contents of the register TIRO is (), and if it is not 0, the timer interrupt is enabled and the process returns to step #3 in Figure 8-1, where the data acquisition, exposure calculation, and
Perform display operation. On the other hand, if it is determined in step #87 that the contents of the register (rI RO) are 0, it means that 5 seconds have passed and the terminal (00) is
The power supply from the power supply line (VB) is stopped by setting Lo to 11, and the state becomes CEND. In this case, unless the photometry switch (Sl) is closed again and an interrupt signal is input to the interrupt terminal (ita), μmcow (MCOB) will remain at C.
It remains in the END state.

FIG. 8-3 is a 70 chart showing the operation of μmcorn (MCOB) when the release switch (Sl) is closed. When the release switch (Sl) is closed and it is ready to accept an interrupt signal from the interrupt terminal (itb), the operation starts from step #95. In step #95, the terminal (020) is set to “Lo”.
ur” to stop the automatic focus adjustment operation. Then,
When an interrupt signal is input to the terminal (itb), μmcoI
Since Il (MCOB) may be performing serial data input/output operation, it is necessary to determine whether data input/output operation is being performed and, if input/output operation is being performed, this operation is completed. have. Then, immediately if no input/output operation is being performed, or once this operation is completed if an input/output operation is being performed, the process moves to step #97, step 2, and the terminal (02) becomes "Lour". (in case you are reading data from the lens), terminal (04)
is set to “HigI+” and the flash selection signal (C3FL
) and #99. #100. In step #101, the terminal (06) is set to "Higb" for 50 microseconds and the FLCA signal is sent to the flash device. Then, set "001(" to the input/output shift register, perform serial data input/output operation, and wait for this operation to be completed. Then, when this operation is completed, the shift register has no exposed data. This means that data indicating the state of the 7 lash device immediately before the start of the control operation has been read.

In the step #105, the contents of the register ABR are set to 6, and in the step #106, it is determined whether the charge completion signal is input based on the data from the 7 runciever device read during the steps #103 and #104. If the charging completion signal is input manually, the data △Avr for the number of aperture steps for flash photography is input, and if the charge completion signal is not input, the data △Avr for the number of aperture steps for ambient light photography are input. Output from the input/output capo (IOP) to the external data bus (ODB). Then, by outputting the contents 6 of the register ABR to the output port (○P), as shown in Table 3, the data of the number of narrowing stages of the external data bus (ODB) is sent to the fringe control circuit (APCC) as shown in Table 3.
Ava or ΔAvf is taken in.

In step #110, it is determined whether the automatic focus adjustment operation has completely stopped and the terminal (io) is "Lou+", and if the automatic focus adjustment operation has not stopped, the terminal (i
Wait until o) becomes "Lou+". The terminal (io) is
When it becomes “Low”, the terminal (06) is opened for 150 microseconds in steps #111, #112, and #113.
+”, send the release χ signal to the flash device, and #
In step 114, the terminal (04) is set to "Loll" and the flash selection signal (C3FL) is removed.

In step #115, a "High" pulse is output to the terminal (018) to operate the release circuit (RELC) to start the aperture operation and also to
Reset the knob (RF3) and turn off the display. Then, after adding 1 to the contents of register ABR to make it 7, #
In step 117, it is determined whether a charge completion signal has been input. When the charging completion signal is input, data Tvf of exposure time for flash photography is output from the input/output capo (IOP) to the external data bus (ODB). Input/output exposure time data Tva for 4i Akira) (I O1
) ) to the external data bus (ODB) and #1
In step 20, register AB is placed in output capo (OP).
Outputs the content 7 of R. As a result, the exposure time data Tvr or Tva is taken into the exposure time control circuit (ETCC) as shown in Table 3.

The subsequent exposure control operation is performed as described above.
(MCOB) and μ-coco (M
C0B) waits for the exposure control operation to be completed, the reset switch (S4) is closed, and the terminal 2) to become High". Then, when the terminal (12) becomes High",
In step #122, it is determined whether the photometric switch (Sl) is closed and the terminal (io) is "High", and if the terminal (i,) is "High", the flag MSF is set to " 1 and returns to step #3 in Figure 8-1 to open data reading, exposure calculation, and display operations.Meanwhile, in step #122, the photometry switch (Sl) is opened and the terminal ( i,) is °“LOLI+”
If it is determined that
0", and the terminal (OO) is set to "Low" and the power line (
After stopping the power supply by VB), it enters the CEND state.

9-1 and 9-2 are specific examples of the exposure calculation operation in step #38 of FIG. 8-1. Below is this 9-1
The exposure calculation operation will be explained based on the chart 70 in FIG. 9-2. In step #130, it is determined whether the terminal (14) is “High” and the terminal (i4) is “High”.
If it is not “HI+”, the lens is not attached, so #1
Move to step 35. Terminal (i4) is 'High
If y'゜, memory register M is stored in step #131.
It is determined whether specific data, ie, check data, is captured in OO.

If the check data is not manually input, exposure control by open metering is impossible, and the process goes to step #135. On the other hand, if it is determined in step #131 that the check data has been taken in, exposure control by open metering is possible, so the process moves to step #132, where the balance is set again.

In step #132, memory registers M01 and M
Avo+Avz=Avoz is calculated based on the OA data, and the open aperture value Avoz at the set focal length is calculated. Note that if the lens has a fixed focal length, ΔAvz=O, so Avo=Av02. Similarly, in step #132, Avtn+△
A vz ”: Calculate A vmz to calculate the maximum aperture value AVIIIZ at the set focal length. In this case as well, if the lens has a fixed focal length, AVIll=
It has become Avmz. Next, in step #134, the open aperture value Av is determined from the photometric value Bv-Avoz Bvc.

#13 to remove 2 and 7 actors of open photometry error.
Avoz calculated in step 2 and open photometry error data Bvcl, Bvc2 . loaded into memory registers MO4, MO5, MO6. Among Bvc3, add the data Bvc of the aperture metering error that is suitable for this camera body to calculate Bv (data of subject brightness only), #135
Move to the next step.

Steps #135 to #144 are display and preparatory operations based on data indicating the state of the flash device stored in the memory register Moc. First, #13
In step 5, it is determined whether the mounting signal is input or not, and if the mounting signal is not input, the terminal (08),
(010) is set to “Loa+”, as shown in Table 2,
The light emitting diode (1"LD) in Fig. 4 is turned off. When the mounting signal is input, the FDC signal is input next. If t = discrimination L, if there is an FDC signal, the terminal (08
), (010) are set to "Higb" and the light emitting diode (FLD) is blinked at 8 Hz as shown in Table 2. If it is determined in step #137 that there is no FDC signal, then it is determined in step #139 whether or not there is a charge completion signal. Then, if there is a charging completion signal, set the terminal (o8) to "Low" and set the terminal (010) to "
Set it to "High" and light the light emitting diode (FLD) as shown in Table 2. If there is no charge completion signal, set the terminal (08) to "I-1i gl+" and connect the terminal (01,0).
to “Lou+” and set the light emitting diode (FLD) to 2H.
Press z to make it blink. When the output of the flash display signal is completed as described above, it is next determined whether a multiple flash signal is being input, and if a multiple flash signal is being input, all three flash devices will fire in sequence. The shortest exposure time with the shutter fully open is 1/125 seconds (Tv
=7) as the tuning limit exposure time Tvfl. On the other hand, if the multi-flash signal is not input, the time required for one 7-lash device to emit all light is the shortest exposure time of 1/250 seconds (Tv = 8) when the shutter is fully open, which is the tuning limit. Let the exposure time be Tvf1. And I145. In step 146, it is determined whether exposure control using aperture metering is possible, and if exposure control using aperture metering is possible (aperture control is possible), the process moves to the calculation flow starting from step #171. If exposure control by photometry is not possible and only exposure control by actual aperture photometry is possible (aperture control is not possible), the process moves to step 70- of the calculation starting from step / of #15().

Steps #150 to #166 are operations in exposure control mode using actual aperture photometry. In step #150, the exposure time Tvt is calculated by adding the film sensitivity data Sv to the photometric value Bvt. This is because the photometric value also includes the element of the photographic aperture, so adding the film sensitivity to the photometric value will calculate an appropriate exposure time. Next, it is determined whether the M mode is selected, and if it is the M mode, it is determined whether the set exposure time 1゛VS is shorter than the exposure time of the tuning limit, and if Tvs>Tvfl, Tv
Let fl be the exposure time for 7-lash photography Tvf, and Tvs≦
If Tvfl, set Tvs to Tvf and move to step #156. On the other hand, if it is determined in step #151 that the mode is not M mode, the synchronization limit exposure time Tvfl is set as the exposure time Tvf for flash photography in step #155, and the process moves to step #156.

In step #156, the exposure time T with a high probability that the secondary subject will be properly exposed during Fill-In7 rush shooting is determined.
Compare vL+1 and Tvf and find that TvL+1 > Tv
If f, there is a high probability that the subject will be overexposed during Fill-In flash photography, so register ALR
I is set to "10" so that an over warning is issued. On the other hand, if TvL+1≦TνF, 'rvt+
If 1=T■, there is a high probability that the secondary subject will be correct, and if Tvt+1<Tvf, there is a high probability that the secondary subject will be underexposed, but in this case, the normal 7. Since this corresponds to the case of rush photography, there is no need to issue an exposure warning in either case, and "00" is set in registers AI-1 and ?1.

In the case of exposure control mode using actual aperture metering, the normal 7-lash shooting mode (hereinafter referred to as 7-lash shooting mode) uses 7-lash light to properly illuminate the main subject in all areas regardless of the brightness of the subject, without considering the exposure of the sub-subject. (shown as normal flash), the flash device emits light to a level for proper exposure. Therefore, in step #159, the flag PIF is set to "0". This flag PIF has the content O11 and then sends an analog signal to the analog output terminal (ANO) to make the flash emit light to the proper exposure.
When the flag PIF is "1", an analog signal is output from the analog output terminal (ANO) to cause the flash to emit light by IEv more than the proper exposure (half the light emission amount for the proper exposure). and,#
In step 160, the number of narrowing stages ΔAvf is set to O, and the process moves to step #161.

In step #161, an exposure control value for constant light photography using actual aperture metering is calculated. In this calculation, if the M mode is used, the set exposure time TνS is set as the constant light exposure time Tva,
If you are not in M mode, do the calculation in step #150.TV
L is the maximum exposure time Tvo! Let T++nn be the short limit exposure time, and if TvO≦Tvt≦Tvm, take TvL by Tva, and Tvt<Tv.

If so, T vo k T va, and if Tvt>Tv+a, Tvm is Tva. The number of aperture stages ΔAva for steady light photography is set to O in all cases. next,#
In step 162, it is determined whether Tvt>Tva, and if TvL>Tva, overexposure will occur, so 3"10" is set in the warning register ALR2 during ambient light photography.

On the other hand, if Tvt≦Tva, then it is determined whether Tvt<Tva, and if Tvt<Tva, the exposure will be unglued, so set the register AlH3 to “01” and set TvL<Tva.
Otherwise, Tvt = Tva, which will result in proper exposure, so set register ALR2 to "00", and press I268 in Figure 9-2.
Move to the next step.

Next, the exposure calculation in the open metering mode' from step 171 will be explained. In step #171, Bv+5v
=Ev to calculate the exposure value Ev, #172
In step , it is determined whether the mode is P mode or not. In P mode, the open aperture value A voz is Av=3 (F2.8
) Determine whether the aperture value is larger than Avoz≧3.
In this case, Avoz is the maximum aperture value on the open side during flash photography, and when Avoz is 3, 3 is the maximum aperture value Avof. In step #176, the difference between the set film sensitivity and Sν=5 (ISO100) is 5v-5.
= △Sv is calculated, and in step 177 Av=6 (
F8) Add Iko△Sv, and use this value 6+△Sv as Avfl
shall be. Then, it is determined whether this aperture value Avfl is larger than the maximum aperture value Avmz of the lens, and Av+n
If z<Avfl, let Avmz be the limit aperture value Av+or on the small aperture side during flash photography, and A vmz≧A v
If fl, Avfl is set to Av+nf. In step 181, it is determined whether Avmf < Avof. This occurs in the case of special lenses (for example, mirror lenses), and when Avmf<Avof, Avmf
Let of be AvJ.

In step #183, Ev+1-Tvfl=Avf2
By performing the calculation, an aperture value Avf2 at which the sub-subject is appropriate at the exposure time of the tuning limit is calculated. And #184
In the step, it is determined whether Avf2>Avmf,
If Avf2>Avmf, control Avmf aperture value Avr
Then, Avf-AVOZ-ΔAvf is calculated to calculate the number of stops ΔAvf, and Tvfl is set as IJITvf during control exposure, and the process moves to step #196. #
If it is determined in step #184 that Avf2≦Av+, it is determined in step #188 whether AV(2<Avof).If it is determined that Avf2≧Avor, Avf2 is used for control. Set the aperture value to Avf, calculate Avf-Avoz=ΔAvf, set Tvfl as ri!lTv[ at the time of control exposure, and proceed to step #196.In step #196, in this case, Fill
- Since it is in 1n7 rush mode, flag FI
Set Fi “°1°”. At step #188, set A
When it is determined that vf2<Avof, the control aperture value Avf is set to Avfo, and the number of embossed stages △Avf=Avf
-Avoz is calculated, and the exposure time Tvf is 7 (1/12
5 seconds) Set the binding flag PIF to “0”.

As mentioned above, in the case of P mode, Ev+1−Tvfl=
Avf2 calculated by Avf2 is Av+J≧Avf2≧
If it is Avof, it is a fill-in flash mode that controls exposure with Tvfl and Avf2, A vf2 >
When A vmf, Tvfl, Avmf''C Fill-1u7 lash mode that performs exposure control, A vf2
When < A vof, the mode becomes a Normal 17 lash mode in which exposure is controlled by A vof and Tv-7. Therefore, in the range of Ev≧10, Fill-In, Ev<1
When it is 0, it becomes the normal 7 rush mode. In step 197, the warning register A L Rl is set to 00'' so that no warning is issued in any case, but this is because if Ev < 10, the Nora+al flash mode is activated, so it is a low brightness warning. It is not necessary to perform Tvt1 and A vmf Tnn sub-control, Tvfl=8, Av+nf=6 (Sv=5),
? (Sv=6)---1, so the sub-subject will be overexposed if Bv>9. However, when measuring a normal subject using the incident light method, Bv>9
There is no subject that would cause this, and even if it were actually overexposed, it would still be within the latitude of the film, so no overexposure warning would be given. In addition, in P mode, the photographer can shoot with the flash without thinking too much and it will either fill in or normal depending on the exposure value.
Since this is a mode that allows you to take 7-shot shots with a natural exposure, no warning is given so as not to make the photographer think unnecessarily.

Further, the reason why the exposure time Tv is set to 7 when the Nor+l1a17 rush mode is entered is to reduce the amount by which the sub-subject is underexposed as much as possible.

The reason for setting the limit aperture value Avof on the wide open side is to prevent the aperture from opening too far to the wide open side, resulting in shallow depth of focus and out-of-focus photos. The reason for providing the value Av+J is to prevent the aperture from becoming too small and the amount of light emitted by the flash device becoming insufficient.

μmcorn (MCOB) is set to "00" in the register A L R in step #197, and program calculation for constant light photography is performed in step 198, and the opening Tva and aperture value at the time of exposure for constant light photography are set. Ava and the number of narrowing stages ΔAva are calculated and the process moves to step 262. Note that since the program calculation is well known, the explanation will be omitted.

In addition, I212. which is the steady filling operation of the following A + S + M mode. Specific examples of steps #22':) and #2G1 are also well known, so their explanation will be omitted.

If it is determined in step #172 whether the mode is not P mode, it is determined whether the mode is A mode or not in step #200. Then, if it is A mode, in step #201, Av
Determine whether oz > Avs, and select Avoz
>If Avs, change A voz to Avf. On the other hand, Avo
If z≦Avs, then in step #203 AvInz
<Avs is determined. and,
If A v+nz < A vs, set AvInz to Avf, and if A vmz < A vs, set Avs to Av.
Calculate Avf-Avoz=△Avf as f and #2
Proceed to step 06. In step #206, the exposure time Tvfl at the tuning limit is set as the control exposure time Tvf.

In step #207, Avf+Tvr=Evf is calculated, and in step #208, it is determined whether Evr<Ev+1. Then, if Evf<Ev+1, there is a high probability that the sub-subject will be over-exposed, so set the register ALRI to "10", and if Evf≧Ev+1, the sub-subject may be appropriate or under-exposed, so set Norma17.
There is no need for an under warning in Latency, so register A
Set “00” to LRI and set flag PIF to “0”
After performing the steady charge calculation in the A mode in step #212, the process moves to step #262.

In the case of the A mode, the aperture is controlled to the set value Avs and the exposure time is controlled to the tuning limit Tvf1 regardless of the subject brightness. Therefore, this mode is always in the Normal flash mode, and does not take into account the exposure of the sub-subject; it is only a mode in which the main subject is properly illuminated by the flash of the 7-lash device, and only for the over warning. A warning will be given if the secondary subject becomes too large.

If it is determined in step #200 that the mode is not A mode, it is determined in step #215 whether or not the mode is M mode. Then, in the M mode, in step #216, it is determined whether the set exposure time Tvs is shorter than the synchronization limit exposure time Tvfl, and Tvs>Tvfl.
If Tvfl, Tvs≦Tv “1 then Tvslt-T
Let it be vf. Next, the set aperture value Avs is Avnz≦Av
If s≦Av+nz, Avs, A vs < A VO
If 7°, then A voz, and if A v+oz < A vs, then AvInz is set to 1Xvr, and then Avf-Avo
z=ΔAvf is calculated and the process moves to step #224. In step #224, set the aperture value A for flash photography.
From vr and exposure time 'FV[, calculate Avf+Tvf=Evf, and as in the case of A mode, Ev+1 > Ev
When f is reached, register A is used to issue an over warning.
L
Set ゛. Then, in step #228, the flash is emitted until the proper exposure is reached, so the flag PIF is set to "O11", and in step #229, M mode constant light calculation is performed, and the process moves to step #262.

In the case of the M mode, basically both the aperture and the exposure time are controlled by manually set values, and the flash is emitted until the appropriate exposure level is reached.

If it is determined in step #215 that the mode is not M mode, the process moves to step #235 in FIG. 9-2 to perform exposure calculation for S mode. In step #235, Tvs
If Tvfl>Iv41, Tvfl is set as Tvfl and the process moves to step #237. In step #237, Ev+1-Tvs=Avf3
The aperture value Avf3 at which the sub-subject becomes appropriate in the Fill-In flash mode is calculated by performing the calculation. Then, in step 238, it is determined whether Avoz>Avf3, and if Avoz>Avf3, #2
Moving to step 39, Ev+1-Avoz=Tvf
2 is performed to recalculate the exposure time Tvf2 at which the sub-subject is properly exposed when the aperture value is Avoz.

Then, it is determined whether 'l''Vf'2<T vO, and when Tvf2<TvO, TvO is changed to Tvf, Tv
When f2≧TvO, set Tvf2 to Iv4 #24
Move on to step 3. Then, in step #243, A voz is set to Avf, and next step ΔAvf is set to O, and the process moves to step #254.

On the other hand, in step #238, Avoz≦Aν[3, and in step #245, Avf3>Avmz
Determine whether h□. Then, if Avf3>Avmz, move to step #246 and calculate Ev+1-Av+nz
= i'ν "3 is calculated to calculate the exposure time Tvf3 at which the sub-subject is properly exposed when the aperture value is Avmz, and in step 7 of I247, it is determined whether Tvf3>TvfI, If Tvf3> Tvfl, set Tvfl to 1
゛ν [If Tvf3≦Tvfl, then gov43 is Iv
4, Avmz is set to l\vf, and in step #253, Avr-Avoz is set to ΔAvr, and the process moves to step #254. On the other hand, in step #245, AvD≦A
vmz, change Tvs to Tvf in step #251
, AvD is set to Avr, and Av is set at step #253.
Set f-Avoz to ΔAvf and proceed to step #254.

In step #254, Tvf+Avf=Evf is calculated, and if Ev+1 > Evf, registers AI and R1 are set to issue a warning that the sub-subject is over.
If Ev+1<Evf, set the register ALRI to 1lo1n to issue a warning that the sub-subject will be under-shot.If Ev+1=Ev4, set the register ALRI to "00" because no warning will be issued. The 7-lag FIF is set to "1" and the process moves to step #261. Then, in step #261, a steady light calculation in the S mode is performed.

In step #262, Eva is calculated from the constant light Ava and Tva calculated in each mode, and if Ev>Eva, register ALR2 is set to "10" for an over warning, and if Ev<Eva, an under warning is set. Therefore, register ALR2 is set to "01". Since there is no need for a warning if Ev=Eva, register ALR2 is set to "00".

In S mode, the filter is set regardless of the brightness of the subject.
It becomes l-In7 rush mode. Therefore, in this case, over and under warnings are given.

In steps #268 to #274, depending on the contents of the 7-lag FI F and whether a multi-flash signal is input,
Output the analog signal corresponding to the film sensitivity in Table 4 from the analog output terminal (ANO) and
Go back to step.

FIG. 10 is a circuit showing a specific example of the 7-lash control circuit (FLCI) of the flash device (11), and the control circuit (FLC3) of the flash device (Iv).
has a similar circuit. Data sent from the flash to the camera or controller is output to the terminal (FF12) via the transistor (BT2+). Further, data sent from the camera or controller to the 7-rush is inputted from the terminal (FF2) via the transistor (BT22) and the inverter (rN16). In addition, the transistor (BT2) where data is not being exchanged is
1) is conductive and the terminal (FF12) is 'HiFiI'.
+” signal is output, and when the flash starts emitting light, the transistor (BTZl) becomes non-conductive. As mentioned above, this signal is used as an integration start signal for controlling the amount of light emission on the camera side. ) is a terminal that receives the synchronization clock pulse for transmitting and receiving data from the camera, the signal FLCAICAFL indicating the camera status, the release signal, the light emission stop signal for controlling light emission 1, and the light emission start signal in sequential mode.・These signals are input to the signal line via the transistor (BT23) and the input terminal (IN1, 7).The terminal (FFil) is the terminal that receives the 11-component signal of the X contact (SX) from the camera. When the closing signal of the X contact (SX) is input to this terminal (FF11), the transistor (BT24) becomes conductive.The transistor (BT25) is conductive for a certain period of time after the conduction of the transistor (BT24). , an X contact (SX) is provided to maintain conduction of the transistor (BT24) even if chattering occurs.

(POR3) is a power-on reset circuit that outputs a reset signal to the terminal (POF) when power supply to the power supply line (VF) is started by the line (F6) or input (F7). (FTC) is a timing signal output circuit that outputs a timing signal at the end of data exchange and a signal for switching the operating state of the flash according to the camera state based on the signal from the signal line (F3). A specific example of this circuit is shown in FIG. (M
CF> reads data from the camera, calculates and displays display data based on the data from the camera, and
The μmcon controls the display time of the display section and the operating time of the booster circuit (DD3). (FDP) is the interlocking range or interlocking distance of the flash device calculated in total com (MCF), the fringe value from the camera and the film sensitivity, and the common terminal (coM) of μmcore (MCF).
and a display unit that performs display based on signals from the segment H'J child (SEG).

Next, based on FIG. 11, the timing signal output circuit (F
A specific example of TC) will be explained. The AND circuit (AN67) is in a state to output a signal from the signal line (F3) if the 7-rip/70-rip (RF6) (Fig. ml 0) is in a reset state. Flip 70 tube (RF6)
As will be explained later, is a certain period of time (
The AND circuit (ANC57)
From then on, the signal from the signal line (F3) is output except when the flash performs a light emission operation.

The counter (CO15) is released from the reset state while the output of the AND circuit (ANG7) is “High, TI” and the clock output terminal (C
PF). The decoder (DEl5) sequentially outputs "High" pulses to the terminals (go) to (g3) based on the output of the counter (CO15). When 45 microseconds have elapsed since the start, the terminal (80) outputs a mutter pulse, and the following 9
A pulse is output from the terminal (gl) after 5 microseconds, a pulse from the terminal (gl) after 145 microseconds, and a pulse from the terminal (g3) after 155 microseconds. Therefore, when the FLCA signal (50 microseconds "HiFil+") is input manually from the camera to the flash, the terminal (gO)
Only from the pulp, 7 lips and 70 tubes (1'
<Fl, 1) is set. And the signal line (F
3) When a "High" pulse is output from the one-shot circuit (O8IO) at the falling edge of
27) is responsible for 7 Lip Floralf RFII), (RF12
), (RF13), so the output (FC"i') of 7-lip/70-tub (+') F25) is "
becomes “High”.

When the CAFL signal (100 microseconds "IiBb") is input manually, a pulse is output from the terminal (go), and then a pulse is output from the terminal (gl). With this, 7
The lip 70 tube (RFII) is set by a pulse from the terminal (80), and then reset by the pulse from the terminal (gl) via the OR circuit (OR23). ) is set. Therefore, when the signal line (F3) falls to "Low", 7 lip/70 knob (RF12) is set, so flip/70 knob (DF26) is set.
The output (CFT) becomes ``I(i81+''). Also,
When the release signal (150 microseconds "High") is input, pulses are applied sequentially from the terminals (gO), (gl), and 2), and the 7-rip, 70-rub (RFll),
(RF12) is reset after being set, and the flip 70 tube (RF13) is set at the time when the signal line (F3) falls. Therefore, flip 70
The output (RLT) of the knob (DF27) becomes ") (igb").Also, when a signal that becomes "HigI+" for a period longer than 155 microseconds is accidentally input from the signal line (F3), the terminal (gO) , (gl), (g2), and sh3) are sequentially output, and the signal line (F3)
At the point when falls, flip 70 tube (RFll)
~ (RF13) are all in the reset state, so the terminals (FCT), (CFT), and (RLT) are “Hi8”.
In addition, even if a synchronization clock pulse is output to the signal line (F3) for transmitting and receiving data from the camera, the duration of this pulse is as short as 45 microseconds, so Decoder (DE15) terminal (go
) to (g3) do not output pulses, and 7 lip/70 tube (D F25), (D F26), (D
There is no change in the output of F27).

Table 15 shows the tally count and count value input to the counter (CO15) and the ``High level'' of the decoder (DE) and 7).
This shows the relationship between the terminals that becomes “+”.

Output terminal (CT) of flip-flop (DF25)
) becomes "Hi) (h", the counter (CO17) is released from the reset state via the OR circuit (OR26), and the AND circuits (AN70) to (AN77) output the output (fo) of the decoder (DE17). ')−([7' )
becomes ready to be output to terminals ([0) to (17). The counter (CO17) counts the synchronizing clock pulses for data exchange sent from the camera, and sequentially connects one terminal ([0) to (F7)] from the rising edge of each clock pulse to the rising edge. Zutsu “l-1iBh”
I'm going to do it. At this time, the terminal (CFT) is Lo
ud", the AND circuit (AN65) is in the active state, and when the terminal (b3) becomes "ll1Bh", the outputs of the AND circuit (AN65) and the OR circuit (OR27) become "'l
(igl+), and the output of the NAND circuit (NA5) becomes "Lou+". Then, when the 8th clock pulse falls to "Lou+", the output of the NAND circuit (NA5) becomes "'Highly'". At this rising edge, a pulse for a certain period of time is output from the one-shot circuit (O813).
313), the one-shot circuit (O3
12) outputs a “High” pulse, which is sent to the 7 lip-flop (RFII) via the OR circuit (OR23).
), (DF25) are reset and the terminal (F CT )
75f"l, oll"1. :SuQ, counter (co1
7) is also in the reset state.

On the other hand, FT on the output of flip 70 tube (DF2G)
"High" means AND circuit (AN66) power.

It is now possible to output a signal from the terminal (h4). Then, the terminal of the force 1 terminal (CO17) (
1+4) is an AND circuit (AN6
7) When the 16th clock pulse is input, 4Hi
Therefore, after a certain period of time determined by the output of the one-shot circuit (O313) after the fall of the 16th clock pulse, 7 rip/70 lub < DF26) is reset and the counter (CO17) is in the reset state. Therefore, the terminal (CFT) becomes Lol#''. That is, while the aforementioned 2-byte data is being sent from the camera to the 7-lash device, the terminal (CFT) remains at 'I (igl+)'.

Release signal from the camera (150 microseconds "' H
i8h") Power input sult, terminal (RLT) #"'High
l+”ninal.

When the flash device starts emitting light, the terminal (X
A high pulse is input from the one-shot circuit (O811) at the falling edge of this pulse.
A pulse of ``high'' is output, and the pulse of
F13) = (D F27) is reset and the terminal (RL
T) becomes “LoIll”. In addition, the OR circuit (OR2
2) is the power-on reset circuit (ROR3), (f
fi10) output (POF) and u-co which will be described later.
The output of the one-shot circuit (O37), which is triggered by the falling edge of the signal at the output terminal (034) of M (MCF), is manually input, and the reset circuit F is connected to the terminal (FR) to reset the entire 7-lash device. Output a signal.

The flash device will be explained based on FIG. 10 again. When the FLCA signal is input to the signal line (F3), the timing signal output circuit (FTC) (7) terminal (f
O) - (F7) Two signal lines (F3) "High" signals are sequentially outputted in synchronization with eight clock pulses, and the terminal (FCT) becomes "HigI+". When the terminal (FCT) becomes “HighI+”, the output of the NOR circuit (NO2) and the AND circuit (AN44) becomes “Lou”.
On the other hand, since the signals at terminals (fo) and (fl) are output as they are from the OR circuit (ORII), the signals between pins (bO) and (bl) are passed through the NOR circuit (NOI). The transistor (BT21) becomes conductive, and a "High" signal is output from the terminal (FF12).

The terminal (FCT) is 7 rip, 7t, 7 responsibility DF23).

CI) F24) is connected to the clock input terminal,
At the rising edge of this terminal (FCT) signal, 7 rip
Latch the D inputs of 70 7 D F23) and (D F24). If the charge completion signal (CHC) from the light emitting part is input to the zero power of the flip 70 tube (DF24), the 7 trip 70 tube's (DF24) will start from the moment the terminal (FCT) rises to "High". Q output is “Hi”
At this time, the output terminal (034) of μmcom (MCF) is “High”, so the AND circuit (A
The output of N56) becomes "High", and the light emitting diode (CIIL) displays the completion of charging. In addition, as described later, the FDC signal is input to the D input of the flip 70 tube (DF23) from the AND circuit (AN58), and when the signal at the terminal (FCT) rises, this FDC signal is -Latched to 70 knob (DF23). In bit (b2), the terminal (“2) is “H”
The charge completion signal from the D7 lip/70 tube (DF24') is output from the AND circuit (AN40), and if the charge is completed, the transistor (BT2
1> is conductive and from the terminal (FF12) “igl+”
) n is output. At the focus points of (b3) and (b4), the transistor (BT21) is non-conductive,
The transistor (BT22) becomes conductive or non-conductive depending on the signal inputted to the terminal (FF12), and the inverter (INlG) outputs a signal according to the input signal. When the clock pulse from the signal line (F3) falls at bit (b3), 7 rips and 70 tweets (DF21
) latches the signal from the inverter (INl6).

At this point, if it is in multi-flash sequential mode, a "High" signal is input from the controller (I), so if it is in sequential mode, 7 rip/70 x 7 responsibility DF21)
The Q output of becomes "High".

(1) For 4) bits, when the clock pulse from the signal line (F3) falls, 7 rips and 70 tweets (DF
22) latches the signal from the inverter (INl, 6). At this point, when the charge completion signal is output from the two 7 lash devices, the controller (I) outputs “Hi”.
gb" signal is input. Therefore, if both 7-lush devices are in the charging completion state at this timing, the Q output of the flip 70 tube (DF22) becomes "High".

At bit (b5), the page output power of the flip-flop (DF21) is input from the AND circuit (AN41).

Therefore, if it is in the multi-light sequential mode, a "Loud" signal is output, and if it is not in the sequential mode, a "Higb" signal is output. At bit (b6), the Q output of the flip-flop (DF23) is output from the AND circuit (AN42). Therefore, even if dimming is performed, a "Low" signal is output, and if dimming is not performed, a "High" signal is output.

For (bl) bits, if not in sequential mode, flip
70 tube (+) F24) Q output or 'AND circuit (AN
43). Therefore, the "high" signal for charging is completed, not the sequential mode, is sent to the terminal (FI").
12) When in sequential mode or when charging is not completed, the “LoIIl” signal is output from the terminal (FF12).
is output from. Table 16 summarizes the above operations.

When the CA I” L signal is input, the terminal (CFT)
becomes "High", and the AND circuit (AN55) becomes active. In addition, the input terminal of μmcom (MCF) (
120) becomes “l-Tigl+”, μmco
m (M CF 'I is an inverter (INlG) in synchronization with the clock pulse input from the signal line (F3)
The input data is sequentially read through the AND circuit (AN55). Also, during this period, the NOR circuit (NO
2), the output of the AND circuit (AN44) is “'Lou+”
Therefore, the output of the NOR circuit (Not) is “Hi”.
H1+'' and the transistor (BT21) remains non-conductive.

When the release signal is input, the terminal (RLT) goes high.
h”, the reset state of the counter (CO9) is released, and the AND circuits (A N46) and (A N4
7) becomes active. Furthermore, OR circuit (OR16)
If the 7-lip/70-tub (RF9) is reset via , and the FDC display continues, this display will be stopped. This is a measure to be taken when flash photography is performed continuously at high speed.

When the terminal (RLT) becomes "' I (i gl+") and then the X contact (SX) on the camera side closes, a pulse of "Higl+" is output from the one-shot circuit (034), and then the charging starts. Completed with 7 rip and 70 rip (DF
If the Q output of 24) is “High”, the AND circuit (
AN47) From this pulse force, flip 70
The knob (RF6) is set. At this time, if it is not the sequential mode, the output of the AND circuit (AN148) is “Lo
u+'', the pulse from the one-shot circuit (C64) is output from the AND circuit (AN52), this pulse is output to the terminal (STR) via the OR circuit (OR15), and light emission starts. OR circuit (OR15)
The light emission start signal from the is also input to the terminal (XON) of the timing signal output circuit (FTC) via the OR circuit (OR12), and as mentioned above, the terminal (RLT)
It becomes III+. Furthermore, the light emission start signal from the OR circuit (OR15) is also given to the set terminal of the 7-lip, 70-tub (RF8), and the Q of the 7-lip, 70-tub (RF8>).
The output becomes “IILoII+” and the transistor (BT2
8) becomes conductive. As this transistor (BT28) becomes conductive, the operation of the light emission amount limiting circuit starts.

The light emission amount limiting circuit will be explained. Block (1-1L
A) is a circuit that outputs a signal for light emission mode V, and outputs the signals shown in Table 17 according to each light emission mode.

Here, IvF is light emission amount data when full light is emitted, and has a relationship of IvF>IVH>ll7L (7). The phototransistor (PT) directly detects the amount of light emitted, and if the output of the terminals (H) and (L) is "11", the output of the AND circuit (AN54) is )-1igl+, and the transistor (BT27) becomes conductive, causing the capacitor (C
7) is integrated. On the other hand, if the outputs of terminals (1-1) and (L) are "10", the output of the AND circuit (AN53) is "H".
lgb” and the transistor (BT26) becomes conductive,
The output current of the phototransistor (PT) is
5). The capacitance of the capacitor (C7) is larger than that of the capacitor (C5). Then, when the integral value of the capacitor (C5) or (C7) reaches the value 1, which is the sum of the constant current source (Ct) and the resistor (R5),
The output of the frequency converter (Ac1) is inverted to "Higl+", and a "Higb" pulse is output from the one-shot circuit (085), which is then sent to the terminal (
A light emission stop signal is output to STP). At this time, if a light emission stop signal has not been manually inputted from the camera side in the automatic light control mode, the flash emission is stopped by the output of the one-shot circuit (OS5). In addition, terminal (H),
If (L) is "00", the output power of the AND circuit (AN6G) becomes 5 "High" and the transistor (BT29
) is the output of the continuity comparator (Ac1) is Lo111
''. Therefore, if a light emission stop signal is not input from the camera while the flash is fully emitting light in automatic light control mode, the flash will continue to emit full light and stop emitting light.

When the terminal CAM) is “0”, μmcoUQ(MCF
) is “0” when the terminal (032) is “0” means an OR circuit (OR
18) becomes "LoIu".As will be described later, if the terminal (034) of μmcom (MCF) is "High" in the display 11 function state, the output of the AND circuit (AN63) becomes "LoIu". ”)-I igl+” lThen, the light emitting guide for manual flash display (F
ML) lights up. Furthermore, an AND circuit (AN61
) becomes disabled, and the light emission stop signal from the camera side is no longer output from the AND circuit ()\N61). When data indicating that the camera is in ■] mode is input, the μme0111 (MCF> terminal (032
) become "High", "S". Therefore, even if the manual mode is selected on the flash side and the terminal (AM) is "L", the output of the OR circuit (OR14) becomes "High".
h” and the output of the AND circuit (AN62) becomes “I(i
gl+", the light emitting diode" (1:AL) lights up to indicate the automatic light control mode, and the AND circuit (AN61) can output a light emission stop signal from the camera side. Note that when automatic dimming mode is selected, the terminal (
AM) is “Higb”, then 1l-co+6(MCF
) The operation is the same as when the output terminal (032) of the output terminal (032) is "High".

The "High" pulse from the AND circuit (AN47) is also sent to the set terminal of the 7-lip flop (FF7), and the 7-lip/70-tub (FF7) is set. As a result, the output of the AND circuit (AN150) becomes “High”.
h”, the output of the AND circuit (AN44) becomes “Low” and the output of the NOR circuit (NOI) becomes “High”,
The transistor (BT21) becomes non-conductive and the terminal (FF
12) outputs a "Lou+" signal. This signal becomes the integral operation start signal for controlling the amount of light emitted on the camera side.

Furthermore, I-Iigh” from the AND circuit (AN47)
The 7-rip/70-rip (FF6) is set by the pulse, and the reset state of the counter (COl, 1) is released. The output of this counter (Coil) is sent to the decoder (DE2).
0), and the output terminal of the decoder (DE20) outputs a pulse of "1 (i8h)" when the sufficient time 11) 1 required for the two 7 lashes to fully emit light has elapsed. This pulse resets the 7-lip flop (FF6) via the OR circuit (Of≧13), and the counter (Coil) is also reset. Therefore, the Q output of the 7-lip/70-tub (FF6) is the X contact. is closed,
A certain period of time (the time required for two 7 lash devices to emit all light) is "Highly".

In addition, the output terminal (Pl) of the decoder (DE20) becomes ``high'' after the time required for one 7 lashes to fully emit light when the X contact (SX) is closed, and becomes ``LolI+'' again after a certain period of time. Become.

When the camera determines that the amount of light emitted has reached a predetermined value, the signal line (R3) rises to "High" 1), 7
The 'HiR1' pulse is output from the 29971 circuit (031). At this time, if the flash is emitting light and the Q output of the 7-rip prop (FF8) is "HiHb", the pulse from this one-shot circuit (OSt) is output from the AND circuit (AN152), and automatic light control is performed. In mode, this pulse is output from the AND circuit (AN61), and further from the OR circuit (OR19) to the terminal (ST
P).

This stops the flash from emitting light.

Furthermore, 7 rip/70 rip (FF9) is set by a pulse from the AND circuit (AN61). When the X contact is opened, the 7-rip/70-tube (FF7) is reset via the OR circuit (OR14) by the pulse output from the one-shot circuit (083), so automatic dimming is performed. And when the X contact is opened, the output of the AND circuit (AN58) becomes Higl+”1,
The reset state of the counter (CO13) is released. Then, the counter (COL) is output from the AND circuit (AN59).
3) Frequency divided output from terminal ([10) (e.g. 8Hz)
is output, the light emitting diode (FDL) blinks, and a display indicating that dimming has been performed is performed. This display is performed at about 3gee, for example, and after 3 seconds, the 7 lip/70 knob (RI79) is displayed as an AND circuit (AN57),
It is reset via the OR circuit (OR16) and the display stops. Note that when a release signal is input during this display, the 7-rip, 70-rip (FF9)
is reset via the OR circuit (OR16) and the display stops. Also, the output of the AND circuit (lNN58) is
As mentioned above, the signal is latched by the 7-lip/70-tub (DF23) and transmitted to the camera side as an FCC signal.

When the release signal is input from the camera and the terminals (RI, T) become "] (high"), the counter (Co9) starts applying one force and waits for a certain period of time (exposure control operation starts and the X contact closes). After the sufficient time required for the two 7 lashes to fully emit light, carry one terminal.

Higb'', and from the AND circuit (AN45),
.

The pulse is output to the terminal (XON) via the OR circuit (OR12), and the terminal (LT) is LOv1"
become. Therefore, light emission will not start unless the closing signal of the X contact is manually applied within a certain period of time after the release signal is input. Therefore, unlike the camera body shown in Figure 3, if it is attached to a camera that does not output a release signal, it will not start emitting light, and when the film is attached, it will automatically take an aerial shot and take three frames. Even if the release signal is not output and only the X contact is closed when the film is pre-winded for about a minute, the flash device will not emit light inadvertently.

Next, the sequential emission mode flip-flop ((I)F2
1) The Q output is “High”), and both 7 runshi devices are in a fully charged state (7 rip, 70 tub (DF)).
22 Q output “I-I igh”), then (
Therefore, the output of the AND circuit (ANl, 48) is “Hi81
+") When the previously emitted flash fires for 7/10 of the proper exposure and the signal line (F3) rises to "Hi gl+", the one-shot circuit (OSt) outputs "Hi gl+".
A pulse of ``Bb'' is output, but 7 rip-flops
Since (RF8) is in a reset state, this pulse is not output from the AND circuit (AN152). Then, when the terminal (Pl) of the decoder (DE20) becomes "High", the output of the AND circuit (AN149) becomes 6"LoIII
'', the output of the AND circuit (AN150) becomes High, and the transistor (BT21) becomes non-conductive. This resets the integration on the camera side, as described above.

When the terminal (Pl) of the decoder (DE20) falls to II L, a "High" pulse is output from the one-shot circuit (O870), and at this time, the output of the AND circuit (AN14S) becomes "I-L". -1i'', the pulse from the one-shot circuit (0370) is output from the AND circuit (AN151), and this signal is output to the terminal (STR) as a light emission start signal.
70 knobs (RF8) are set. Thereafter, as described above, light emission is stopped by the pulse group from the one-shot circuit (OSt).

(BOD) becomes “l-1iBb” when it is in a bounce state.
Outputs the signal. (Mll)P) displays the light emission mode later when the flip-flop (DF22) sequentially reads the light emission mode signal, and issues a warning if the bounce state occurs in this state.

This is because control is performed so that the 7-shot device that emits light later in sequential flash photography is used as a frontal light source during bounce photography, and even if the amount of light emitted by the 7-shot device that emits earlier is insufficient, The flash device that emits light later compensates for proper exposure.

However, if the flash device that emits light later becomes in a bounce state, there is a high probability that the amount of light emitted will be insufficient, so a warning is given.

When the sequential mode is read in the 7-lip/70-tub (DF22), μmCOIfl (
If the output terminal (034) of MCF) is "High", the output of the AND circuit (AC3) becomes "High", and if it is not in the bounce state at this time, the output of the block (BDO) is 11.o, ++, so it is a NAND circuit. The output of (NA50) becomes “High I+”, and the output of the AND circuit (AGI) becomes “High”, and the light emitting diode (MDL)
The light will be emitted later in sequential mode depending on which time the light is lit. That is, for bounce photography, it is displayed that it should be used as a front light source.

On the other hand, when the light is emitted later in the sequential mode, if it is in the pounce state, the NAND circuit (NA50) outputs a pulse with the opposite phase of the pulse from the frequency divider (DVIO), and this is output by the AND circuit. (AGI) and the light emitting diode (MDL) blinks to issue a warning. Also, if the sequential mode signal is not read, the output of the AND circuit (AC3) is “LO, II” and the light emitting diode (M
DL) is off.

FIG. 12 is a flowchart showing the operation of u-com (MCF) in FIG. 10. The operation of μmcom (M CF ) will be explained below based on the flowchart of FIG. 12. When the power switch (FSl) is closed, power supply to tt-com (MCF) starts, and I
I-COm (MCF) enables interrupts to the terminals (itA) + (itB) and interrupts by the counter, and sets data 20MD for 20 minutes of original storage in the timer register ゛IRI. The state will be CEND. At this time, in the fjSl 0 diagram, the power-on reset circuit (1) OR3) operates once when the power is turned on, and the terminal (1)
The OR circuit (
The 7 lip-flop (RFlo) is sent through the OR circuit (OR20), and the terminal (ES
The output of P) becomes "HiBb" 1, and the booster circuit (DD3) starts operating as described above. Also, the line (F
7) when power is not being supplied from the switch (Ar
'S3) is closed, the pulse from the one-shot circuit (OS8) is output from the AND circuit (AN64),
If the 7 rip flop (RFIO) is in the reset state, set 7 rip/70 flop (RFIO), and
If the RIP 70 tube (RFIO) is in the set state, this set state is maintained. Also, an AND circuit (AN64
) is input to the interrupt terminal (itB) and μmc
om (MCF) performs the same operation as when the power is turned on.

Therefore, the electric source switch (FSI) is closed and the switch (AP
S3) is closed, the terminal (E
SP) continues to be in the "High" state. On the other hand, if the terminal (ESP) is “Low”, the switch (APS3
) is closed, the terminal (ESP) is closed for 20 minutes from that point on.
is “HigI+”.

When power is being supplied from the line (R7), the output terminal (ESP) of the OR circuit (OR21) is 'High', and while power is being supplied from the line (R7), this terminal (ESP) is It is set to “High”.

Further, at this time, since the AND circuit (AN64) is in a disabled state, no interruption is made to the terminal (itB), and the closing operation of the switch (APS3) is disabled.

If there is a counter interrupt, in step S5 the terminal (itA
), (itB) and counter interrupts are enabled, and a constant value α1 is subtracted from the contents of register TIRI and set in register TlR1. Then, it is determined whether the contents of register TIRI is II O11 or not, and if it is not '()', the state goes to CEND.On the other hand, in step S7, it is determined that the contents of register T I R1 are '()'. If this happens, it means that 20 minutes have passed since the power was turned on or the switch (APS) was closed, and the terminal (030) shows “
Output a “High” pulse and flip/70 knobs (
RFIO) and reset the terminal (ESP) to “Lou+”.
”, and the counter interrupt is disabled and the state is set to CEND.

When the FLCA signal is input from the camera, the terminal (FCT)
becomes High, and the interrupt pin (IA) becomes “High”.
" signal is input and the operation starts from step S15. In step S15, the terminal (034) is set to "Hi".
gh” to display the charging status and light emission control mode, and then transmit data from blocks (AC3) and (HLA) to terminals (ilo), (i12), (i14), and (i
16), (i18). Block (HLA)
outputs the data shown in Table 17 as described above. On the other hand, the block (AC8) outputs data corresponding to the attached accessory, and has the relationship shown in Table 18.

In step S17, the amount of light emitted is set to a low level.
”, and if it is limited to “LoI11”, IvL is the maximum light emission amount, Ivmax.If the light emission amount is not limited to ILOII, II, the next highest level is “ It is determined whether or not the limit is set to 'Hi8b'. If the limit is set to "High", IvH is set to ■ν1IlaX, and if the limit is not set to "High", the total light emission amount ■νF is set to Ivmax. Here, ■vF > IvH > Ivl-.Next, in step S22, it is determined whether a telepanel is attached, and if a telepanel is attached, the effective light emission amount will be doubled. Therefore, I v +@ax+ 1
Let vrnax and Ivmin+1 be Iviin.

Here, Ivminl corresponds to the minimum amount of light emission. 82
If it is determined in step 2 that a telepanel is not attached, then it is determined whether a wide panel is attached. If a wide panel is installed, the effective light emission amount will be 17'2, and Ivmax-1
Let I v max and Ivmiu-1 be IvIIIi
.

shall be. -If power and wide panels are not installed, the effective light emission amount remains the same, so Ivmax, Ivmin
The process moves to step 828 while leaving the .

In step 82B, the data ISD to maintain the display for 1 second is set in the timer register TlR2, the terminal (CFT) becomes "Hi8b" and the terminal (i20) becomes "
14igh”.Then, the terminal (i2
0) is not “Highly”, then in step S30 light emission starts and 7 lip/70 tube (RF7)
is set, and the terminal (i22) determines whether it is "1-1-1i" or not. And the terminal (i22) is l-1
iBb", wait for the terminal (i22) to become "'Lou+" in step S33, and set the terminal (i22) to "Lou+".
On the other hand, if the terminal (122) is "Low" in the step S30, a constant value α2 is subtracted from the register TlR2, and it is determined whether the contents of the register TlR2 are "0" or not. If it is not "0", the process returns to step S29 and '0' is determined.
If so, the process moves to step S63 and the display is turned off.

If the terminal (i20) becomes ")limb" in step S29, the CAFL signal is input from the camera, and data is sent from the camera to the 7 rash. Therefore, in step S35, a serial input command is executed, and the terminal (SINF) is input based on the clock pulse input to the terminal (SCKF).
).

When the data input is completed, the read data is set in a specific register, and then the next data is read and this data is set in the specific register.

This 2-byte data is the data shown in Tables 8 to 14.

In step S41, it is determined whether the exposure control mode is P mode based on the read data. and,
In P mode, the terminal (032) must be connected so that the light emission amount is controlled by the light emission amount control circuit on the camera side.
If the mode is not P mode, the terminal (032) is set to "LoIll".

In step S44, the read film sensitivity data Sv is set in the display register FSDR, and then the film sensitivity data Sv is set in the display register FSDR.
Determine whether the l-In flash mode signal is being captured. When it is determined that the Fitl-In flash mode is selected, the terminal (036) is set to H.
"high" to light up the light emitting diode (FIL),
Displays that it is Fill In7 rush mode,
Add 1 to the captured film sensitivity data Sv to obtain S
v+1 is set as film sensitivity data Sv and the process moves to step S49.

On the other hand, if it is not Fill-In7 rush mode, 51
In step 18, the terminal (036) is set to "Lou+" and the process moves to step S.19.

In step S49, the first byte of Tepa Kazuya is “78
11", and if it is "7811", aperture control is impossible as described above, so register A PDR for aperture display and register EI)D for interlocking range display.
"0011" is set in R and the process moves to step S58. On the other hand, if the first byte data is not "7811", in steps S50 and S51, the film sensitivity data 5v (Sv+1 in Fill-In7 rush mode), aperture value Avf, and maximum light emission amount 1vIQa from the camera are processed.
xsIv ma based on the minimum light emission amount I v +nin
x + Sv - Avf = Dv maxIv mi
Calculate n 10Sv Avf = Dv 1fiin, and find the maximum shooting distance Dvm at which flash emission is appropriate.
Ax and minimum shooting distance I! iIDvmin is calculated. Then, the aperture value data Avf is displayed in the register A P D
It is set to R and the process moves to step S54. In step 354, it is determined whether the mode is automatic light control mode, and if it is automatic light control mode, the process moves to step 856. on the other hand,
If it is not the automatic light control mode, then it is determined whether the mode is P mode or not, and if it is the P mode, the process also moves to step 356. On the other hand, if it is not the automatic light control mode and is not the P mode, the process moves to step S57. In step 356, data for displaying the interlocking range Dv max-1)v mu+ that provides appropriate exposure is set in the display register E DDR for the mode in which automatic light adjustment is performed. On the other hand, in step S57, since the mode is manually set to emit light, the shooting distance DV for proper exposure is
The data to display +oax is the register EDI)H
is set to

In step S70, it is determined whether or not the bounce state is present. If it is determined that the terminal (i24) is "High" and the bounce state is present, the contents of the interlocking range display register EDDR are set to "OO11" and the process proceeds to step S58. Step. Therefore, the interlocking range is no longer displayed during bounce shooting.

At step 858, the film sensitivity, aperture value, and interlocking range (i shadow distance) are displayed on the display section (FDP) based on the data from the display register, and the process moves to step S59. In the step S59, an interrupt to the terminal (itA) is enabled, data l5l) is set in the register 'rIR2, and then a constant value α3 is subtracted from the contents of this register T I R2, so that the contents of the register T I R2 are “0”
Repeat the process of separating the results for 1Q. and,
While performing this operation, the F L CA
When a signal is input, operations from step 815 are performed. On the other hand, if no interrupt signal is input to the terminal (itA) after 1 second, the process moves to step 863 and the terminal (03
2) Set "Lovr" to "Lovr", (034), and (036), set "001(" to registers FSDR, APDR, and EDDR, and turn off the display section by displaying data. Then, the terminal (itA) , (itB) and the counter, and set 20 minutes of count data 20MD in register T I R1.
It becomes END state. Therefore, even when data is exchanged or a flash is emitted, the terminal (ESP) becomes “Hi”.
gh'' time is extended by 20 minutes from that point on.

Figure 13 shows the timer circuit (CT) in the controller (T).
This is a specific example of C). (POR5) is a power supply battery (BAl
, ) is installed, it outputs a reset signal and the OR circuit (
The 7-rip/70-rip RF20) and counter (CO20) are reset via OR31) and (OR32). When the power switch (FSI) of the flash device is opened, the line (L5) becomes "Lou+", the output of the inverter (IN25) becomes "Higb", and the one-shot circuit (O820) outputs "I-1igl+". A pulse is output.This pulse goes through the OR circuit (OR30) to set 7 lips and 70 times (RF20), and also goes through the OR circuit (OR32) to the counter (C02).
0) is reset. 7 rip/70 rip is < de 20)
When is set, the clock pulse from the pulse generator (PGO) is output from the AND circuit (AN73), and the counter (CO20) starts counting until 25.
After a minute has elapsed, the output of the carry-1 terminal becomes "Higb". Then, a clock pulse is applied from the AND circuit (AN74), and the OR circuit (OR31), (OR
32), the 7-lip/70-tub (RF20) and counter (CO20) are reset.

While the 7-rip-flop (RF20) is in the reset state, the terminal (C4) is “Lovr” and the terminal (C5) is “High.”
b”, transistors (BTl), (BT2
).

When the power switch (FSI) of the flash device is opened and the switch (APSl, ) is closed, the output of the AND circuit (AN70) becomes "High" and one shot) ” pulse is output. This pulse is also an OR circuit (OR30)
Set the flip 70 knob (RF20) through the OR circuit (OR32) and set the counter (C
020). Therefore, if the 7-lip/70-tub (RF20) is set, the transistor (B
The conduction state of Tl) and (B T2) is the switch (APS).
It will be extended for 25 minutes from the time when the transistor (B T1.) and (B T2) close the switch (APSI). At this point, it becomes conductive and 25
Continue this conduction state for several minutes. Further, from line (C3), a clock pulse from line (L3), a FLCA signal, a CAFL signal, a release signal, and a light emission amount control signal are input. Since this signal is also sent to the OR circuits (OR30) and (OR32) via the AND circuit (AN72), the same operation as when the switch (APSI) is closed is performed.

FIG. 14 is a specific example of the control circuit (CNC) in the flash controller (■). Power line (VC
), the power-on reset circuit (POR4) outputs a set signal to the terminal (POC) to reset the timing signal output circuit (FTC), and the OR circuits (OR36) and (OR37) )
A signal for resetting the 7-rip and 70-rip is output from. Note that the timing signal output circuit (FTC) is the 11th
The figure shows a specific example of the circuit. The FLCA signal is connected to the terminal (
When input from CF13), the terminal (FCT) becomes “Hi8
h”, and the output of the AND circuit (AN82) becomes “Lo”.
w”, and all inputs of the NOR circuit (NOIO) are “L”.
The output data 11 becomes a state in which data can be output in each bit.

In the (bO) bit, the mounting signal from the 7 lash device (II) from the terminal (CF22) is transferred to the transistor (Bi'
3(i).

It is output via an inverter (IN33), an AND circuit (AN75), a NOR circuit (NOIO), and a transistor (BT30). Further, at the falling edge of the clock pulse output from the AND circuit (AN90), the mounting signal from the 7 lash device (II) is latched into the 7 lip flop (DF31). For the (bl) bit, the AND circuit (
At the falling edge of the clock pulse output from AN88), the terminal (CF12), ) transistor (BT31),
The mounting signal of the flash device (IV) output via the inverter (IN30) is 7 lip/70 tube (DI').
30) to latch. Therefore, AND circuit (AN89)
When the output of “Higb” becomes “Higb”, two 7 lash devices (
II).

(IV) is attached.

In the (b2) bit, at the falling edge of the clock pulse from the AND circuit (AN93), a signal from the OR circuit (OR38) indicating that one of the 7 rush devices is in the charging completed state is sent to the 7 rip/70 lub (CF23). ), and furthermore, a signal from the AND circuit (AN92) indicating that both 7-lush devices are in the charging completion state is latched into the 7-rip/70-rub (CF32).

(BD) is a bounce discrimination circuit that outputs a "Loul" signal when the 7 lash attachment part of the controller (I) is in a bounce state, and outputs a "Highll" signal when it is not in a bounce state. Therefore, even if the simultaneous light emission mode is selected by the switch (MC8), the AND circuit (AG31) outputs a "Low" signal in the bounce state. Further, the output of the AND circuit (AG30) becomes "T-1ight" when both flash devices are in the sequential mode with power being supplied, and becomes "Lou+" otherwise.

In addition, the output of the OR circuit (OGIO) is both in the full state (
Q output of flip 70 tube (CF32) is “1-1-”
1i+”) or when both are in simultaneous mode with power supplied, otherwise it is “LoIl”.
l”.

In bit (b3), a multi-flash signal indicating that both 7 lash devices are installed in the sequential mode of the AND circuit (AG30) is sent from the AND circuit (AN7(i) to the terminal (CF12).
) is output to. This signal is read by the flash device (IV), and as mentioned above, the mode in which the light is emitted at the rising edge of the signal on the line (L3) (the mode in which the light is emitted later)
At bit (b4), a signal from the OR circuit (OGIO) indicating both charging or simultaneous mode when both are attached is output from the AND circuit (AN77). This signal is read by the flash device (iv) and the flash device (iv) makes it possible to emit light in the sequential light emitting mode or to emit light in the simultaneous mode. Furthermore, this signal is an AND circuit (AG34) and a NOR circuit (NO51).

Flash device (I) via transistor (BT35)
It is also sent to I). For bit (b5), if both are installed and in sequential mode, the output of the AND circuit (AN78) is “Lou+”, otherwise the flash device (
The signal of “)IiHh” of 11 stations is connected to an AND circuit (AN
78). This signal is read by the camera body and switches between the flash calculation for multi-flash mode and the 7-lash calculation for simultaneous light emission.

(b6) bit is in sequential mode with an AND circuit (AN8
If the output of 9) is “High”, the AND circuit (AN79)
The output of NO becomes “Low”, while the AND circuit (AN8
If the output of 9) is "Lou+", flash device (II)
The signal is outputted via an AND circuit (AN79). Therefore, in the sequential mode, the camera body determines the FDC signal according to the signal from the 7 lash device (IV). On the other hand, when the mode is not sequential, the FDC signal from the flash device (II) is sent. At this point, even if a flash device (IV) is attached, if it is in simultaneous flash mode, different signals (“High” and “Low”) will not be output as FI)C signals, so this is not a problem for the camera body. no problem.

For (bl) bits, 7 rips and 7 rips and 7 out of sequential mode.
Both fullness signals from the 0 tube (CF32) are connected to the AND circuit (
AN80). On the other hand, when the blade is not in the sequential mode, the completion signal from the 7-latch cap device (II) is outputted via the AND circuit (AN81).

Table 19 summarizes the above operations.

Next, when the CAFL signal is input, the terminal (CFT)
The data from the camera body is output from the NAND circuit (NAIO) via the inverter (IN30), and the data is output from the terminal (C) via the transistor (BT35).
This data is output from F22). Also, i child (C
The clock pulse from the transistor (BT3)
2), Inverter (IN31), Inverter (IN32)
), ) via the transistor (BT37) to the terminal (CF23
) is output via. Therefore, data from the camera body is directly sent to the flash device (+1) via the controller (I). Also, at this time, the terminal (CFT
) becomes “High”, the AND circuit (AN82)
The output becomes “Lou+” and the transistor (BT30
) is non-conducting.

Next, the operation of light emission control will be explained. When the release signal is input, the terminal (RLT) becomes 'gh' and the reset state of the counter (CO22) is released.

Similarly to the counter (CO9) of the flash device, if the closing signal of the , this clock pulse is sent to the timing signal output circuit (FTC) via the OR circuit (OR35).
), and the terminal (RLT) of the timing signal output circuit (FTC) becomes "LOLI+". Therefore, from now on, even if the terminal (CFII) falls to "Low", the light emission start signal 1 will not be output. Terminal (RLT) is “High”
The transistor (BT33) is closed by closing the X contact (SX) during
) becomes conductive, “H” is output from the one-shot circuit (O323).
igh” pulse is output and the AND circuit (AN84)
This pulse is output from This pulse is an OR circuit (
Timing signal output circuit (FTC) via OR35)
When I is sent, the terminal (RLT) roars "Lou+". In addition, the pulse from the AND circuit (AN84) is 7 rip.
It is also sent to the 70 tube (RF22), the flip 70 tube (RF22) is set, and the Y transistor (BT34) is set.
) becomes conductive, and the AND circuit (AN67) in the timing signal output circuit (FTC) shown in FIG.
FTC). Furthermore, flip 70
When the knob (RF22) is set, the counter (CO2
4) is reset or released, counter C in Figure 10
Similar to o11), a flashing operation is started for a certain period of time, which is longer than the time required for the two 7-lash devices to sequentially fully emit light.

When a “High” pulse is output from the AND circuit (AN84), at least one of the 7 lash devices is fully charged and the Q output of the 7 lip/70 tube (CF33) is “
If the simultaneous light emission mode is set to “High”, the AND circuit (AN8
The pulse from the one-shot circuit (0823) is output from 6), and the 7-rip pulse is output via the OR circuit (OR39).
70 tube (RF23) is set, transistor (B
T38) becomes conductive, and a light emission start signal is sent to the 7/7 device (11). Also, both fullness signals are output and the Q output of the flip 70 tube (CF32) becomes “High.”
”, a “High” pulse is output from the AND circuit (AN95), 7 lip/70 tube (RF23) is set via the OR circuit (OR39), and the transistor (BT38) becomes conductive, which again generates the light emission start signal. Then, the light emission stop signal from the terminal (CFi3) is sent from the terminal (CF23) to the 7 lash device (I(),
Light emission stops at the rise of this signal.

When the carry terminal of the counter (CO24) becomes "Higb", a clock pulse is output from the AND circuit (AN85), and the 7 lip/70 tube (RF22) is reset via the OR circuit (OR36), and the counter (CO24) is reset. Furthermore, the clock pulses from the AND circuit (AN85) are both in the full state (the Q output of the 7 lip-flop (CF32) is "High"), and the mote (inverter (IN34) output is +1 L oIII).
I+), it is output from the AND circuit <AN91), 7 lip/70 tube (RF24) is set, the transistor (BT39) becomes conductive, and the flash device (V)
A light emission start signal is sent to

When XJ & point (SX) is opened, one-shot circuit (O
324) outputs a high pulse and passes through the OR circuit (OR37) to the flip-flop (RF23).
, (RF24> is reset, the light emission signal is no longer sent, and 7 lip/70 tube (1) F30) ~ (1-)
l"33) is also reset. In addition, the terminal (FCT),
When (CFT) are both 11 Lo and II, the signal from the terminal (CF22) from the flash device (II) is output to the terminal (CF12) via the AND circuit (AN82), so the camera body The integral motion (Y) for controlling the amount of light emission is controlled in the same way as in the case without the controller (1).

FIG. 15 shows a modification of the camera and the human output section of the 7-rush unit. The camera body and the 7lash device are sometimes used by connecting them with a cable, but in this case, the cable has a capacitive component (C70). Therefore, when sending a signal that changes from "High" to "ILo, II" through this cable, for example, even if the transistor (BT80) becomes non-conductive, the capacitive component (C70) causes the transistor (BT9t) to become conductive. There is a risk that the state may be maintained and a false signal may be sent.

Therefore, when the terminal (OB) rises to 'Higb', the transistor (BT82) momentarily conducts in the differential circuit composed of the capacitor (C60) and the resistor (R60), and the cable capacitance component (C70) discharge the charging charge.

As a result, the transistor (BT91) immediately becomes non-conductive, eliminating the possibility that the response will be delayed and an erroneous signal will be transmitted.

Figure 16 shows the circuit configuration of a two-lamp type flash device. In this case, the irradiation direction of the main flash light emitting part is variable, and flash photography can be performed with one side as bounce light and the other side as front light. It looks like this. In FIG. 16, only the parts different from FIG. 10 are shown.

First, Table 20 shows the operating modes of this flash device.

(CF) and (CR) are main capacitors that store charges for light emission, respectively, and (FLF) and (FLR) are light emitting parts. The light emitting part (FLF) is a light emitting part that can be switched to bounce and front light, and when it is in the bounce state,
A “High” signal is output from the block (BDO). The terminals (CHCI) and (CHC2) become “H” when the main capacitors (CF) and (CR) are fully charged.
igli” signal is output. Then, an AND circuit (A
G13) outputs a "High" signal when both the main capacitors (CF) and (CR) reach a charging completion state, and this signal is latched by the flip 70 tube < DF24) and output as a full charge signal.

7 lip-flops (DF21) and (DF22) latch the signal sent from the controller (1) when the terminals (f3) and ([4) (Fig. 10) are "High", and this latched Signals and Blocks (BDO)
The operation mode shown in Table 20 is determined according to the signal from. First, in the case of (2L (6), controller (1)
is the sequential mode, and it is determined that at least one of the 7 lash devices is not in the full state. In this case, the output of the AND circuit (A, G14) becomes "HiHb", and the AND circuit (AG15) No pulse is output from the one-shot circuit (O84), and no light is emitted. Also, at this time, the AND circuit (AG 11),
The output of (A G 12) is "LO false", and a signal force indicating the sequential mode is applied.

In case (1), only one flash device emits light, and the light emitting unit (FLF) emits front light. In this case, since the AND circuits (AG20) and (AG22) are active, the pulse from the one-shot circuit (O34) passes through the AND circuits (AG20) and (AG22), respectively, to the OR circuits (OG3) and ( OG4), and the light emitting units (FLF) and (FLR) start emitting light at the same time. In addition, Flip 70 Tsubu (RF”50),
(RF51) is set and the one-shot circuit (O
The pulse for stopping light emission from the AND circuit (AG25
) and (AG26) become ready for output, respectively.
The pulse for stopping light emission in auto mode is the light emitting part (FLF)
, (FLR) at the same time, and the light emission stops. Also, 7 rip, 70 tsubu (RF50) < 7) Q output cover! Y
SI 0 figure (') ) 7') 7.9 (BT28)
The light emitting amount limiting circuit operates, and a light emitting stop signal is sent to the light emitting unit (1”LF) via the OR circuit (OG5).
) will be sent to. Therefore, the light emission amount is limited to the light emitting part (1” LP
) is executed only for This is the light emitting part (FLF)
This is because the amount of light emitted from the light emitting unit (FLR) is very large compared to the amount of light emitted from the light emitting portion (FLR). Further, a light emission stop signal from the AND circuit (AG28) to the light emitting unit (FLR) is given to the dimming display unit and the dimming completion signal output unit. This is because, when sequentially emitting light, proper exposure is finally achieved by the light emitted from the light emitting section (FLR). In this case, the AND circuit (AGll)
The output becomes "Hi81+" and a signal indicating simultaneous mode is sent to the camera.

In case (5), only one flash device emits light;
The light emitting section (FLF) is in a bounce state. In this case, the AND circuit (AG20) becomes active, and the outputs of the AND circuit (AGi7) and the OR circuit ((B;2) become "I-l-1i", and the AND circuit (AG21)
is in active state. Furthermore, inverter (■N7
0) becomes “Low”, the AND circuit (A
The outputs of N53) and (AN54) become "Lou+", and the output of the OR circuit (OG6) becomes "l(igb").

Therefore, the light emission amount limitation of the light emitting section (FLF) becomes invalid.

That is, if the light is emitted in a bounced state, there is a strong possibility that the amount of light will be insufficient, so the restriction is removed. Then, the light emitting part (FL
F) emits light with a pulse based on the closing of the X contact from the one-shot circuit (O84), and the light emitting part (FLR) emits light from the one-shot circuit (O
570) starts emitting light. Each light emitting section stops emitting light in response to a pulse from the one-shot circuit (O8I) that is input while the light emitting section is emitting light. At this point, the outputs of the AND circuits (AGll) and (AG12) are both 1m"toII+11, and a signal indicating the sequential mode is sent to the camera.

In the case of (3), it is a sequential mode, and in this case, an AND circuit (A G 1G), (A G 18), an OR circuit (O
The output of G2) becomes "Higl+". Therefore, the one-shot circuit (O870) is activated after a certain period of time from the closing of the X contact.
The light emitting part (FLF), (FLR)
start emitting light at the same time, and stop emitting light at the same time with a pulse from the one-shot circuit (O3I). In this case, the outputs of the AND circuits (AGll) and (AG12) are both “Lo
At t11'', a signal indicating the sequential mode is sent to the camera.

(7) is also a sequential mode, but the light emitting part (FLF)
is in a bounce state. In this case, the AND circuit (
AG16) and OR circuit (OG2) output is “11high”
”, and the AND circuits (AG20) and (AG2]) are in the active state. Therefore, as in the case of (5),
The light emitting part (FLF) starts emitting light when the X contact is opened, and the light emitting part (FLR) starts emitting light a certain period of time after the X contact is opened. In this case as well, the AND circuit (AGll), (AG1
The output of 2) is "Lou+" and a signal indicating the mode is sequentially sent to the camera.

In cases (4) and (8), the controller (T) is in the simultaneous mode. Besides this, since the AND circuits (AG20) and (AG22) are in the active state, even if the light emitting part (FLF) is in the bounce state,
As soon as the X contact is closed, the light emitting part (FLF).

(FLR) starts emitting light.

Figure 17 shows the μmco for a two-lamp type 7 lash device.
This is a flowchart showing the operation of in(MCF), and the parts different from FIG. 12 are shown. In step S17, when there is a Low limit, 1vL is set to I vmax l, and when there is a HiBh limit, Ivll is set to I v+aax
1, and when the full light is emitted, the full light z1vp is I vmax 1
shall be. This I vmax 1 is the maximum amount of light emitted by the light emitting section (FLF).

Next, determine whether a telepanel or wide panel is installed, and if so, IVIllaX
and I v+ain 1 are changed by IEv, respectively. Here, I v+ain 1 is the minimum amount of light emitted by the light emitting section (FLF).

Next, in step 385, it is determined whether the light emitting unit (FLF) is in a bounce state, and if it is in a bounce state,
The maximum and minimum light emission amounts of the light emitting part (FLR) are respectively I Vnl.
As aL+I v+ain, the process moves to step S28, after which the above-described calculation for the interlocking area is performed and the calculation result is displayed. On the other hand, when the light emitting part (FLF) is not in the bounce state, l vmax 1 and IVIllaX
Let the total luminescence amount by Iv+nax, I vmin 1
The total amount of light emitted by v+n1n2 is Ivmin,
The process moves to step S28, and thereafter the interlocking area is calculated and displayed. Here, the calculation to calculate the total amount of light emission is 2 + 2
``2=21V-1--(i) We need to find Iv, and for this, Ivl -Iv2 = W ---
−(2), then equation (1) is Iv = Iv2 + log2(1+W) −−−−
(3), so if W is used and ROM is used, log2(1
+W) and perform the calculation of (3), Iv is rounded. Details of this calculation are described in Japanese Patent Application Laid-Open No. 1062132/1983.

The embodiments described above can be modified as follows.

First, when a mounting signal is manually input from the flash device, the camera performs photography based on exposure control data for flash photography even if a fullness signal is not input.

In BO, the flash controller is attached to the controller and outputs the attachment signal from the small flash to the camera and reads this signal. Lll reads the attachment signal from the flash attached to the camera. 112
Now read the charging completion signals from the two 7-rush devices.

According to the above reading results, if both are installed and in simultaneous light emission mode, b3. Sends a signal of "11" with the b4 bit. 10" to the flash attached to the controller that is in sequential firing mode when both are attached, and "01" to the flash attached to the camera.
” signal. Also, at least one of the 7 lashes sends a “00” signal if the mounting signal is not input manually.

Next, with the b5 bit, if both are installed and the sequential mode, a signal of "Lotu" is output to the camera, otherwise a signal of "High" is output to the camera, and the camera uses this signal to distinguish between simultaneous and sequential mode.For the b6 bit, both If it is attached and is in sequential mode, it outputs the LoII+'' signal, and in other modes, it outputs the signal from the flash connected to the controller to the camera, and the camera indicates that the flash has been adjusted as described above. Discern. For bit b7, both 7
If a flash is attached and fullness signals are input from both, it will output a "High" fullness signal, and if both are not attached, a signal from the flash that is attached to the controller will be output. .

In addition, in the case of this modification, even if the fullness signal is not input from both, the flash (
A light emission start signal from the camera is transmitted to the first flash (first flash), and in the sequential mode, a light emission start signal is also sent to the third flash.

For flash, bo, bt is the attachment signal, b
In step 2, a fullness completion signal is output. Next b3. At b4, the signal from the controller is read. l]5 in b3. b
At least one of the signals read in step 4 is 1g for
11” outputs a “Low” signal, and both “'L”
otu” is “'HiBk” (for two strobes, “HiBk” is
gh” or “LoIII” is output. The b6 bit outputs an FCC signal.

In b7, b3. Few of the signals read by b4 (
If one of them is "High", a signal of "LOIIl" is output, and if both are "Low", a full signal is output.Then, as soon as b3 and b4 input a light emission start signal of "10" and "pa11", If it is '°01', a light emission start signal is input and the light emission starts after a certain period of time.Also, in the case of a two-lamp type 7 lash, if the upper 7 lash is in a bounce state, , the upper flash fires first, then the lower flash (front-loading flash) fires.Also, if it is not in the bounce state, only the upper flash fires.Furthermore, when it enters the bounce state, If either of b3.l]4 is set to High, only the upper 7 rays will emit light.

Furthermore, the interlocking range display for the two flashes is b3°)]
If the read signals at step 4 are both "Low", the interlocking range of the lower flash will be displayed if it is in the bounce state, and the interlocking range of the second part 7 flash will be displayed if it is not in the bounce state.

Also, b3. If the read signal at b4 is 4 "11", it is the simultaneous light emission mode, and the display will turn off if the upper part is in a bounced state, and the interlocking range of the upper part will be displayed if it is in a non-bounced state. If it is "10", it is the first light of sequential light emission and the display is turned off. If +1O111, the light is emitted sequentially and then emitted, and in the bounce state, the display is turned off, and in the non-bounce state, the upper flash [depending on the interlocking range] is displayed.

Furthermore, in the above embodiment, data is exchanged between the flash and the 7-lash controller, between the flash and the camera, and between the controller and the camera in one byte.
Even if the byte is used only to exchange data between the flash and the 7-flash controller, another byte is prepared, and data is exchanged between the flash and the camera, and between the flash controller and the camera. good.

Table 8 Table 9 Table 10 (Several copies of A4) Table 1.1 (Several copies of 84) Table 12 (A
v decimal part) Table 13 (Sv decimal part) Table 14 (Exposure control mode) 0-m-"Lou+", 1--"High" 20 Effects As explained above, in the present invention, the A means for outputting a first light emission stop signal based on the amount of light reflected from the subject due to light emission reaching a predetermined value, and a second light emission stop signal based on the light emitting unit emitting light up to the light amount set by manual operation. means for outputting a signal, and when the exposure control mode of the camera is in a mode other than the program mode, the light emitting part stops emitting light based on the first or second light emitting stop signal selected by manual operation, When the exposure control mode of the camera is set to program mode, the light emitting section stops emitting light based on the first light emitting stop signal regardless of the above selection, so when performing flash photography in program mode, errors may occur. Even if you set the light emission amount, this setting is ignored and you can take pictures with proper exposure. Furthermore, in flash photography in the program mode, photography with appropriate exposure can be performed without requiring any setting operations.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the basic configuration of the present invention, FIG. 2 is a block diagram showing the overall configuration of a flash system to which this invention is applied, FIG. 3 is a block diagram showing a specific example of the camera body, and FIG. 4 5 is a circuit diagram of the display section, FIG. 5 is a circuit diagram of the serial data input/output section, FIG. 6 is a circuit diagram of the data input/output circuit and light emission control circuit, FIG. 7 is a circuit diagram of the data output circuit, and FIG. 8 is a circuit diagram of the data output circuit. Figures -1 to 8-3 are microcomputer (
Flowchart 1 showing the operation of step #38 in FIG. is a circuit diagram of the timing signal output circuit, Fig. 12 is a flowchart showing the operation of the microcomputer (MCF), Fig. 13 is a circuit diagram of the timer circuit, Fig. 14 is a circuit diagram of the control circuit, and Fig. 15 is a circuit diagram of the camera and A circuit diagram showing a modified example of the input/output section of the flash. Fig. 16 is a circuit diagram showing the circuit configuration of a two-lamp type flash device. Fig. 17 is a circuit diagram showing the circuit configuration of a two-lamp type flash device.
3 is a flowchart showing an operation part of mcom (MOF). (1) Light emitting section, (2) Light emitting amount control circuit, (3) Light emitting amount setting section, (4) Light emitting stop signal output section, (5) A/M
switching signal output section, (6), σO selector, (7) exposure control mode signal output section, (8) exposure control mode signal reading section, (9) P mode discrimination section, (l]) light emission start signal output section, (OA) Camera, (FL) Flash device. 1 patent attorney: Minolta Camera Co., Ltd. Haiku patent attorney: 2 Gyoda Hogai Figure 1

Claims (1)

[Claims] (1) A light emitting unit that emits a flash, a means for outputting a first light emission stop signal based on the amount of light reflected from the subject due to the light emitted by the light emitting unit reaching a predetermined value, and a light emission unit that is manually set. The second is based on the fact that the light emitting part emitted light up to the amount
means for outputting a light emission stop signal, and selection means for selecting based on which light emission stop signal of the first and second light emission stop signals the light emission of the light emitting unit is to be stopped according to a manual operation. , a determining means for determining whether the exposure control mode of the camera is the program mode; and when it is determined that the exposure control mode of the camera is the program mode;
A flashlight emitting device characterized by comprising means for stopping light emission of the light emitting section based on the first light emission stop signal regardless of the selection means.