JPS604997A - Time base converter for acoustic signal - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

Detailed Description of the Invention The present invention performs processing such as DPCM (differential pulse coding degree 1) encoding on an acoustic signal such as a musical tone signal, compresses or expands the time axis of the signal, and outputs the acoustic signal. The present invention relates to a time axis conversion device using coded acoustic signal processing that changes the pitch of a musical tone or voice by changing the pitch of a musical tone or voice.

'As an audio device that processes musical tones and audio signals, the input audio signal (original sound) is converted into a digital signal by DPCM encoding, etc., and this digital audio signal is cut into blocks and stored in -H memory. Then, when reading these signals, the time axis of each block is compressed or expanded, and the blocks are repeatedly read or interlaced to read out the blocks, so that the length of the sound can be calculated almost in real time from the input acoustic signal. Development of an audio signal time axis conversion device using coded audio signal processing that changes the pitch without changing the pitch is progressing.

However, with this type of time axis conversion device, the block length of the audio signal is written into memory as a constant, and the block is compressed and expanded when read out, so for example, the length of the input sound remains unchanged. When performing processing to raise the pitch, the time of each block is compressed and the acoustic signal is read out, and one block with a strong correlation is repeatedly read out to fill in the gaps between the signals. Therefore, in order to raise the pitch without changing the length of the acoustic signal, the output (
As the number of blocks in the g signal increases, the cutting point increases, and the noise generated at the cutting point becomes noticeable when decoding the output (signal 0). The sound quality may deteriorate.

On the other hand, when processing to lower the pitch without changing the length of the input sound, the time of each block is expanded and the acoustic signal is read out from memory, and in order to compensate for the lack of time, it is necessary to Blocks are skipped, but if the length of the readout JG sound signal is considerably redundant compared to the signal block before being written to memory, that is, the input @ sound signal, the input sound On the other hand, a problem arises in that the reproduced sound that is output is delayed and reproduced.

The present invention focuses on the above point, and when performing time axis conversion of an acoustic signal that changes the pitch without changing the length of the sound, the cutting point of the read block is set as much as possible when reading encoded information from the memory. By keeping the time constant, the auditory sensation remains constant both when the time axis is shortened and expanded, and when the time axis is shortened, the generation of noise at the block separation point is suppressed to prevent deterioration of the reproduced sound. It is an object of the present invention to provide a time axis converting device for an acoustic signal that can solve the problem that reproduction blocks become redundant and reproduced sound is exposed when axis expansion is performed.

To achieve this object, the present invention inputs an analog audio signal, encodes the analog audio signal into a digital signal, and uses the encoded signal as encoded information to mark a block as a cutting point. At the same time, the encoded information in the memory is sequentially read out and decoded into an analog audio signal, and further, by changing the encoding cycle and decoding cycle, the audio signal is In an audio signal time axis conversion device that performs time axis conversion, a pitch setting means sets a pitch ratio between the analog audio signal before encoding and the analog audio signal after decoding; The gist is that block length control means is provided for changing the length of the block based on the pitch ratio.

Embodiments of the present invention will be described below based on the drawings.

Figure 1 shows analog audio such as musical tones and voices (Ei code) input, DPCM encoding processing, and time axis conversion that involves compression and expansion of the encoded signal without changing the length of the sound, that is, the playback speed. 2 is a block diagram of an audio signal axis conversion device that reproduces the decoded audio signal and subtly changes the pitch of the sound. This is an input filter that inputs and filters analog 1! signals such as audio signals.It removes unnecessary frequency components and noise for acoustic signal processing and sets the band.3 is the input filter sent from input filter 2. The compressor compresses the amplitude of the signal for noise reduction operation, and the expander of the decoding circuit, which will be described later, amplifies the signal.4.
is a sample/hold circuit that samples the analog audio signal sent from the compressor 3, and the PIAl! of the continuous audio signal waveform is determined by the time interval of the sampling pulse sent from the write/read controller 8. l,rR
The amplitude value between the two is extracted as the Zambiel value. 5 is an A/D converter that quantizes the signal sampled by the sample-and-hold circuit 4 and converts it into a binary code. This is a differential encoding type A/D converter that takes the difference from the decoded value (α times the decoded value) and quantizes and converts it. 6 is A
In order to sequentially store the coded information (data) sent from the /D converter 5 in a register provided in the read/write memory (RAM) 7 and having a storage capacity for several blocks of acoustic signals. , which is a write latch that latches data, temporarily stores data by a latch signal supplied from the write/read controller 8, and when a read permission signal is sent to the RAM 7 from a multiplexer (described later), encoded data is stored in the RAM 7 through the data bus. The encoded data are sequentially written into the designated addresses of the RAM 7.

9 specifies the cutting point of the block read from RAM 7 when performing time axis conversion by compression/expansion of the signal, for example, in the least significant bit (LSB) when writing encoded data to RAM 7. This is a marking circuit that attaches a mark (for example, a code of logic "1"). This marking circuit 9 includes a peak detection section that inputs the analog audio signal from the compressor 3, detects its peak, and outputs a peak detection signal, and a peak detection section that outputs a peak detection signal from the A/D converter 5 to the write latch 6. The most significant bit 1- (M
SB) information, that is, the positive/negative sign of the encoded data, and input a peak detection signal, and at the same time, for example, when a zero crossing point when the encoded data transitions from negative to positive is detected, a pulse-shaped marking command signal is sent. In response to the marking command signal, the zero-cross detection unit outputs the output signal, and a mark (
For example, a marking section that gives a code of logic "1") is provided.

10 is a timer circuit that masks the peak detection signal output from the peak detection section of the marking circuit 9 for a preset time and stops outputting the signal; A high-level masking signal is output to the peak detection section for a predetermined masking time from the rising edge of the command signal. Note that the timer circuit 10 is equipped with a second timer section that operates when a silent input signal is input, so that when the silent input signal continues, the marking of the cutting point specifying the block goes through the memory for a long time. In order to avoid cases in which marking is not performed for a long period of time, if the marking command signal is not output from the zero-cross detection section of the marking circuit 9 even after the time set in the second timer section has elapsed, the marking section is forcibly sent to the marking section of the arcing circuit 9. It is configured to output a marking command signal.

In this way, the length of the block read from the RAM 7 when performing time axis conversion is determined by the time interval of the markers indicating the cut points, that is, the set time of the timer circuit 10, and the set time of this timer circuit is Control is performed by the operation of the control circuit 11, which is block length control means, depending on the degree of compression or expansion of the signal by time axis conversion. That is,
This control circuit 11 is configured such that if the length of the block at the time of input is constant, when time axis conversion is performed with the length of the reproduced sound constant, the signal is read out depending on the degree of compression or expansion of the signal. Although the number of cutting points for each block of the signal changes greatly, the length of the block at the time of writing is controlled so as to reduce the change in the number of cutting points. Therefore, the control circuit 11
detects the ratio of the period of the read clock signal 1 outputted from the variable clock signal generator 13 and the period of the write clock signal, and detects the ratio of the periods of the write and read, that is, the pitch setting device which is the pitch setting means. When the pitch ratio between the original sound and the reproduced sound set by 12 is large, the timer circuit 10 is used to compress the time axis depending on the degree of the time axis.
If the set pitch ratio is small, shorten the timer setting time accordingly.J
: Sea urchin works.

This control circuit 11 can be configured by a microprocessor. The pitch setting device 12 sets the pitch ratio between the original sound and the reproduced sound in order to change the pitch of the reproduced sound higher or lower with respect to the input sound, and by its operation, the reading speed of the encoded data from the RAM 7 can be adjusted. By adjusting the pitch, you can change the pitch without changing the length of the original sound. This pitch setter 12 is configured as a variable resistor installed in the variable clock signal generator 13 so as to change the cycle of the read clock signal i applied to the read counters 14a and 14b.

15 is a write/read controller 8 and a write counter 1
The clock signal generator 6 outputs a clock signal to the write counter 16, and a write clock signal 11 whose frequency is divided for addressing the RAM 7 is sent to the write counter 16. On the other hand, the write/read controller 8 generates a sample pulse 4r5 from the clock signal sent from the clock signal generator 15, an A/D conversion reference lock signal 1) for the A/D converter 5, and a write latch. signal C,
Memory write enable signal d1 applied to RAM7 Memory read enable signal e1 Successive latch signals f1, f2, and R
A selection pulse signal @g is generated to be sent to the multiplexer 17 for switching between write and read operations of AM7. The timing of writing and reading encoded data into and from the RAM 7 is controlled so as to be performed continuously, for example, during one period of the write clock signal. The write counter 16 is a ring counter that indicates a value corresponding to the address of the encoded data area in the RAM 7, receives the clock signal 8h, counts, and sends the write address to the RAM 7 via the multiplexer 17. Therefore, when writing encoded data to the RAM 7, the encoded data is first temporarily stored in the write latch 6 by the write latch signal C sent from the self-write read controller 8 to the write latch 6, and then set on the data bus. ,
While the write enable signal d to the RAM 7 is activated and the multiplexer 17 is switched to the write side, encoded data is sequentially written to the addresses specified by the write counter 16.

Reference numeral 18 denotes a continuous controller for controlling the latch C19 and the latch 020, which is of the type 7 shown in FIG.
Consisting of a circuit equipped with a lip-flop and a gate, the marking signal Ma is input from the marking circuit 9, and the latchable signals 0, q and strobe signals r, p synchronized with the marking signal @Ma are sent to the latch C19 and the latch D2.
0, and the latch C19 and the latch D20 alternately temporarily store the address information sent from the write counter 16 at the timing of the block division point indicated by the marking signal 1yla.

Reference numeral 21 denotes a mark detection circuit, which detects the mark signal l at the block cutting point attached to the encoded data sequentially written into the RAM 7, and also detects the mark signal l at the block cutting point, as shown in the timing chart shown in Fig. 6. When the encoded data is read, a mark in the encoded data is detected according to the read speed and a mark detection signal De is output, and two mark detection signals De are generated between two mark signals m. A load signal n is generated in synchronization with the second mark detection deviation De.

And this load signal n is every other load signal @j1
and a load signal j2, respectively, to two read counters A14a via an OR gate.

The read lJ counter B is sent to the latch C 1411, and the read counters A and B are sent to the latch C by this load signal j1 and j2.
19 or latch D20 to preset the address data that will be the start of reading. The reason why such two readout counters A1B are used and the encoded data is read out in two systems is to skip the encoded data at the block division point of the signal or to perform anti-4I readout. This is to eliminate noise caused by waveform shifts due to differences in signal pitch and amplitude, and the mutually inverted envelope signals EnA and EnB output from the envelope circuits 22a and 22b are read out from the readout latch A23a.
, the encoded data from the readout latch B23b is applied to the reference inputs of the two D/A converters 24a and 24b, respectively, and each block is not connected immediately, but the previous data block is the cutting point. After passing through, the output is gradually reduced, and the output of the new data block is gradually increased from the cutoff point, and the signals are connected at the block cutoff point.

The above-mentioned 23a and 23b are read latches of two systems, respectively, and the read latch signal f1 or f2 from the write/read controller 8 is sequentially input to the multiplexer 17 in synchronization with the read selection of the selection pulse signal Q, and the multiplexer 17 reads out the latch signal f1 or f2. When switched to the side, it latches the encoded data addressed by the read counter A14a or B14b and read from the RAM 7 onto the data bus.

24a and 24b are D/2 inputs the encoded signals latched by read latches A and B and converts them into analog signals.
The signals output from the D/A converters 24a and 24b are sent to the integrator 25 for integration, and then the f8@amplitude compressed by the compressor 3 at the time of input is converted into a 1-kispander to restore the original amplitude. 26, further sent to an output filter 27, and an analog acoustic signal whose time axis has been converted and whose pitch has been changed is obtained from an output terminal 28.

Although not shown in the block diagram of Figure 1, it is not only possible to input an original sound such as a musical tone signal and simply change the pitch by time axis conversion processing and output it, but also to provide a mixer circuit on the output side to convert the original sound signal. and form a consonant interval with respect to its original sound J
By mixing and outputting a time-axis converted reproduced sound signal having a specific pitch ratio, for example, a consonant tone having a harmonic third or fifth degree can be generated from a single sound source.

Next, the operation of the time axis conversion device will be explained with reference to the waveform diagrams and timing charts of FIGS. 3 to 8.

First, the pitch setting device 12 sets the pitch ratio (tone pitch ratio) between the input original sound and the output reproduced sound. For example, if the pitch ratio is set to 1:2, this means that the frequency of the reproduced sound will be converted to 2 (8) with respect to the original sound. For example, if the input musical sound signal is the sound of "C", The sound is a "do" sound, which is an octave higher.

By setting this pitch ratio, the variable clock signal generator 13
The period of the clock signal is adjusted in inverse proportion to the bit ratio based on the period of the fixed clock signal of the clock signal generator 15 sent to the writing side circuit, and the reading speed is adjusted based on the signal rounding speed. The number of players will increase in proportion to the pitch ratio.

When the pitch ratio is set and the device starts operating, the control circuit 11 uses the fixed write clock signal output from the clock signal generator 15 and the read clock output from the variable clock signal generator 13. Detect the period ratio of signal 1, and based on the reciprocal of this period ratio, that is, the pitch ratio,
If the pitch ratio is 1 or more and the signal is to be compressed, the setting time of the I timer circuit 1o is lengthened according to the degree of compression; conversely, if the pitch ratio is 1 or less and the signal is to be expanded, the setting time of the I timer circuit 1o is Accordingly, the timer circuit controls the set time of 10 to be shortened. The setting time of this timer circuit 10
Due to l11, the block length of the read signal is almost constant regardless of compression or decompression processing, and the deterioration of sound quality due to the increase in block separation points during playback that occurs during compression processing with a large pitch ratio, and the increase in pitch It is possible to eliminate the delay in reproduced sound that occurs during expansion processing with a reduced ratio.

An acoustic signal such as a musical tone signal is input from an input terminal 1 , passes through an input filter 2 to remove frequency components and noise unnecessary for signal processing from the signal, and is sent to a compressor 3 . The compressor 3 compresses the amplitude of the audio signal for noise reduction, etc. The amplitude-compressed analog audio signal is sent to the DPCM encoding processing circuit, and first input to the sample/hold circuit 4 for sampling. It will be done. Sampling is from write/read controller 1
This is performed at the time interval of the sampling pulse signal a sent from the roller 8, and each amplitude value is held as a sample value. The signals sampled by the sample-and-hold circuit 4 are then sent to the A/D converter 5, where the differences between these signals are multiplied and converted into binary codes. That is, here, the difference between the continuously inputted and sampled signal and the predicted signal is quantized, and the quantized signal data is encoded into a binary number. DPC with A/D converter 5
The encoded data of the acoustic signal, which has become the M code, is then sent to the write latch 6 and latched by the latch signal C supplied from the write/read controller 8 . and,
The encoded data latched by the write latch 6 is sequentially
The data is sent to the RAM 7 and written into the RAM 7 in synchronization with the encoding cycle while being addressed based on an address signal supplied from the write counter 16 via the multiplexer 17.

On the other hand, when the encoded data is sent from the A/D converter 5 to the write latch 6 and temporarily stored, a mark indicating the block division point of the signal is placed in the least significant bit of the encoded data under the control of the control circuit 11. It is given at intervals based on the set time of the timer circuit and at the peak position of the acoustic signal as follows.

That is, the analog audio signal S output from the compressor 3 is input to the peak detection section of the marking circuit 9 to detect the peak of that page, and at this time, the timer circuit 10 outputs the previous signal as shown in FIG. After the marking signal is output, when setting l! An output signal V that masks the peak detection signal t by lTM is output to the peak detection section, and peak detection during this period is canceled. Therefore, the control circuit 11
The interval between the marks indicating the cutting point, that is, the length of the block, is determined by the set time of the timer circuit 10 controlled by the timer circuit 10. Such a peak detection signal t is sent to the zero cross detection section, and at the same time as the peak signal is input, the positive
While checking the most significant bit with a negative sign, when a zero crossing point where the positive/negative sign of each data changes from negative to positive is detected, a marking command signal U is generated in the marking circuit 9 and latched in the write latch 6. A mark indicating a block cutting point is attached to, for example, the least significant bit of the encoded data, for example, with a code of logic "1".

Note that if the silent signal continues, the peak of the acoustic signal cannot be detected and marking cannot be performed; however, in such a case, the second timer section in the timer circuit 10 detects the mask signal of the timer circuit After a set delay time from the falling edge of V, the output signal is output to the zero-cross detection section, and a marking command signal is generated unconditionally, so that the mark indicating the block cutting point is part of the encoded data in the same way as above. Department. Of course, the set delay time of the second timer section is also controlled by the control circuit 11 in the same way as the mask time of the timer circuit 10.

On the other hand, the encoded data stored in the RAM 7 is read out at a reading speed based on the pitch ratio set by the pitch setting device 12, and while compressing or expanding the signal, the encoded data stored in the RAM 7 is read out in real time as follows by the operation of the reading side circuit. is read out from RAM 7.

First, the mark detection circuit 21 detects the mark signal m at the block division point added to the encoded data sequentially written into the RAM 7, and at timing 11 in FIG.
- Mark detection signal [)e detected according to the reading speed of encoded data (slope of graph line B) as shown in Fig.
is detected and two mark detection signals De are generated between the two mark signals m, the second mark detection section f'i3
[) A load signal o is generated in synchronization with e. Then, every other load signal n is divided into a load signal j1 and a load signal j2, which are sent to two reading counters A14a and two bladder evacuation counters B14b through an OR gate, respectively, and the readout counters A14a and 814b receive this load signal j1. and j2 preset the address data that is the beginning of the readout and is latched by the latches C19 and D20. Then, self-contained read controller 1-roller 8
When the multiplexer 17 is switched to the read side by the selection pulse signal q sent to the multiplexer 17, the read enable signal e to the RAM 7 is activated, and the encoded data is sequentially read from the address specified by the read counter 14a1 or 14b. Read out.

At this time, graph line B, which indicates the data write speed, is plotted against the slope of rough line A, which indicates the data write speed.
When the slope of is large, that is, when the time axis is compressed,
When two mark detection signals [)e are detected between mark signals m, the previous block is read out again to prevent the read processing from overtaking the write processing. There is.

On the other hand, when the signal is expanded by setting the pitch ratio to 1 or less, two mark signals are generated between the two mark detection signals [)e, as shown in the graph of FIG. If there is m, a load signal n is generated in the mark detection circuit 21 in synchronization with the second mark detection signal, and this is divided into two read signals j1 and jz and applied to the read counter 14a114b, and the write signal is Indicates speed 1
With respect to graph line C, blocks are skipped along graph lines with lower reading speeds.

The encoded data output from the RAM 7 is latched into read latches A23a and B23b, and the two D/D
The signals are sent to A converters 24a and 24b.

The D/A converters 24a and 24+3 convert the differentially encoded signal into an analog signal, and each D/A converter 24a and 24+3 converts the differentially encoded signal into an analog signal and converts each D/A converter into an analog signal by using the envelope signals EnA and En3 to which the reference input is applied.
The amplitude is adjusted so that the peak of the waveform of the analog signal output from the A converters 24a, 24b, that is, the envelope, has a smooth slope. Then, the two output signals are combined and sent to an integrator 25 to be decoded into a complete analog signal, and then returned to the original signal amplitude by an expander 26, passed through an output filter 27, and is output from an output terminal 28. An acoustic signal whose pitch has been raised by signal compression processing of time axis conversion is output.

To summarize the main points of the above explanation, in this embodiment, when compressing the time axis to 1/2, that is, setting the pitch ratio to 2, the length of one block during encoding is set to about 60 m5ec, for example, and when decoding On the other hand, when the time axis is doubled, that is, the pitch ratio is reduced to 1/2, the block length during encoding is set to about 15 m, for example.
5ec, and the block length during decoding is approximately 3 On+sec
It is controlled so that

Further, the envelope of the signal sent to the integrator 25 during decoding is schematically represented in FIG. The A converter 24b outputs a signal as shown by (IF), and the input signal of the integrated integrator 25 is <I
The shape is represented by II).

As described in detail above, according to the audio signal time axis conversion device of the present invention, when performing time axis conversion on the input original sound to subtly change the pitch without changing the length of the sound, the decoding cycle can be changed. Even when the signal is compressed by shortening the signal, the block length during writing is controlled to be long, so the number of cut points for each block does not increase, and noise and noise caused by an increase in the number of cut points are reduced. Deterioration of reproduced sound can be prevented. Furthermore, even when the decoding cycle is lengthened to expand the signal, the block length at the time of writing is controlled to be shortened, so that the next playback sound after a silent state can be played back without delay. This makes it possible to maintain a constant sense of hearing at all times.

[Brief explanation of the drawing]

The figures show an embodiment of the present invention, in which Fig. 1 is a block diagram of a time axis pA device for acoustic signals, Fig. 2 is a circuit diagram of the readout controller 18, and Fig. 3 is a waveform diagram showing marking operation.
FIG. 4 is a timing chart of each signal showing the write and read operations of encoded data to the RAM 7, FIG. 5 is a timing chart of each signal of the read controller, and FIG. 6 is a timing chart of each signal of the read controller.
The figure shows a graph showing the signal compression processing and the repeated readout that accompanies this, and a timing chart of each (No. 73 timing chart). The timing chart and WXB diagram of each signal showing its operation are waveform diagrams schematically representing the envelope of the input waveform of the integrator. 4...Sample/hold circuit 5...A/D converter 6...Write latch 8...RAM 9...Marking circuit 10...Timer circuit 12...Pitch setter 16...Write counters 14a, 14b...Read counters 24a, 24b...D /A Converter agent Patent attorney Establishment One idiot Figure 2 Figure 18 Figure 3 Figure 4 Figure 5 ■ L- Figure 6 Athos (e8 l A c V'IA Figure 7

Claims (1)

[Claims] An analog audio signal is input, the analog audio signal is encoded into a digital signal, and the encoded signal is used as encoded information and marked as a cutting point to be divided into blocks and sequentially stored in a readable/writable memory. With,
The hunting information in the memory is sequentially read out and decoded into an audio signal, and further, the time axis of the audio signal is converted by changing the encoding period and the decoding period. In the conversion device, pitch setting means sets a pitch ratio between the analog audio signal before encoding and the analog audio signal after decoding, and a pitch setting means for setting the pitch ratio between the analog audio signal before encoding and the analog audio signal after decoding; A time axis conversion device for acoustics (JN) characterized by having a block length control means that changes the length of the block.