JPS6051302B2 - vertical deflection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a vertical deflection device for a television receiver;
In particular, the present invention relates to an improvement in a device that uses a circuit that uses a frequency divider to generate a vertical pulse output from a horizontal oscillation output.

In recent years, with the improvement of IC technology, automatic synchronization circuits using frequency dividers are being adopted in the vertical synchronization circuits of television receivers.

IIL (Integrated Inje) is also used in the frequency divider.
tionLogic technology has been introduced and is being integrated on the same IC chip along with other linear circuits. FIG. 1 is an example of a block diagram of a vertical deflection circuit including an automatic synchronization circuit for a television receiver currently being developed.

A synchronization signal is extracted from the video signal input by a synchronization separation circuit 1, and a part of it is applied to a horizontal AFC circuit 2. Here, the phase is compared with the flyback pulse, and the horizontal oscillator 3 is driven to create a 2fH oscillation output with stable phase and frequency. (However, fH is the horizontal frequency). This is frequency-divided by the frequency divider circuit 4 112 and then applied to the horizontal drive circuit 5, and the output thereof drives the horizontal output circuit. In addition, the oscillation signal of 2fH is frequency-divided by the frequency divider circuit 6 to 11525, and the vertical frequency chirp (60H2
) is the vertical pulse.

Its phase is controlled by a reset pulse generator 7. In other words, the vertical synchronization signal created by integrating the synchronization signal using the integration circuit 8 and the phase of the divided output are compared in the reset pulse generation circuit 7, and if the phases of the two are different, a reset pulse is generated. , the phase of the frequency-divided output can be determined. The vertical synchronization signal is also applied to the vertical oscillator, and the oscillation output (60
Hz) and the frequency-divided output of the frequency divider circuit 6 are applied to the switching circuit 10. This switching circuit 10 is controlled by a switching signal from a switching signal generating circuit 11, and the frequency relationship between the received vertical synchronizing signal and the generated 2fH signal is a predetermined ratio of 11525 specified in the NTSC standard system. At the time, the output of the frequency divider 6 is taken out, and at other times, the vertical oscillation output is taken out and applied to the vertical drive circuit 12. By doing this, vertical synchronization is maintained stably even when the horizontal and vertical frequency relationship does not match the standard method's predetermined 11525 when playing still images or slow motion on a VTR. .

As mentioned above, the circuit shown in FIG. 1 is all integrated circuit elements on the same IC chip, thereby simplifying and rationalizing the circuit. The portion excluding the additional portion surrounded by the broken line in FIG. 2 is the portion extending from the integrating circuit 8 and vertical oscillator 9 to the switching circuit 10 and the vertical drive circuit 12 in FIG.

Components within the range surrounded by the one-dot chain line are configured on the chip of the IC element, and the circles on the one-dot chain line are connection terminals with external circuits. Capacitor C1 constitutes an integrating circuit 8 together with resistor R1. Capacitor C2 and resistors R3 to R5
is a time constant circuit that determines the oscillation frequency of the vertical oscillator 9, and is normally connected to terminal B, which is a terminal of a bias circuit such as a multivibrator type, and forms the time constant of the CR oscillator. The output circuit of the switching circuit 10 is connected to a resistor R2. The output is applied to the vertical pulse amplifier through the terminal C, and is further applied to the vertical drive circuit 12.
is applied to the waveform comparison circuit 13. The capacitor C3 is used to create a sawtooth voltage that is used as a reference for the vertical deflection waveform. Normally, a constant current source charges and discharges the capacitor C3 in a vertical cycle, and the voltage across the capacitor C3 is used. Terminals E and F are vertical output terminals to the vertical output circuit and feedback terminals for correcting the deflection waveform in a feedback type, and drive the vertical output car circuit with a predetermined waveform while comparing it with the reference waveform. . Note that the above-mentioned vertical pulse amplifier is a power supply booster circuit for a low-voltage vertical output circuit that equivalently increases the power supply voltage of the SEPP vertical output circuit only during the vertical retrace period. As mentioned above, this method has been streamlined by being implemented in an integrated circuit element, and there are almost no problems in operation, but it has been found that vertical synchronization becomes unstable under special reception conditions.

This is a case where the output phase of the integrating circuit fluctuates over time.
For example, this is the case when receiving television radio waves of the same channel transmitted by a 10 KHz offset carrier. FIG. 3 is an explanatory diagram thereof. A is the synchronization signal waveform of the vertical synchronization signal portion of the composite video signal without interference due to the offset carrier, and B is the received waveform when the heat component due to the 10 KHz offset carrier is superimposed on it. At this time, a heat component of about two cycles is added to the vertical synchronization signal portion, and it slowly moves to the left like a wave. C is the separated output when a synchronizing signal like B is synchronously separated at the level indicated by the broken line, and D1 to D4 are the waveforms of the outputs obtained by integrating it in the integrating circuit 8. If you look at this, you can see that the vertical synchronization part is split into two, and if you pay attention to the split components and follow them in time, you will see D1→D2→D3→D
You can see that it is moving towards the left as shown in 4. When the integral waveform fluctuates in this way, when the trigger levels of the reset pulse generation circuit 7 and switching signal generation circuit 11 in FIG. . The synchronization position shifts in time, which means that the horizontal and vertical frequency relationship is 115
25 cannot be maintained, so switching circuit 1
0 works and reset works. Since this synchronization position shift is gradual, once the reset is activated, the relationship 11525 is maintained for a while, and the switching circuit 10 is restored. However, if the switching circuit 10 is switched from moment to moment and the reset is changed from moment to moment, the vertical position on the screen will fluctuate up and down, making it very difficult to see. In particular, in order to reduce the loss in the vertical output transistor, the leading edge of the output of the frequency divider circuit 6 is moved forward to the beginning of the equivalent pulse as shown in F, so the phase of the frequency divided output and the vertical oscillation The phase shift of the output is large, and when the switching circuit 10 is switched, the vertical fluctuation of the screen is large. In such a case, the switching circuit 10 should work in a negative way and force the vertical oscillation output to be constantly applied to the vertical drive circuit, but this switching circuit is also a digital circuit and is an integrated circuit. Since all the processing is normally done within the device, it is not reasonable to provide a control terminal to forcibly switch to one side. Additionally, this abnormal radio wave is received in 3% of the areas in Japan.
For this reason, adding one more external connection terminal to the integrated circuit device standardly used in all television receivers would result in a significant cost increase. Therefore, an object of the present invention is to provide a device that can disable the switching circuit only in such special areas without increasing the number of terminals of the integrated circuit element. .

An embodiment of the invention for such a pair is shown in the additional portion of FIG. 2 enclosed by dashed lines. In the IC element, the impedance of the output circuit until the vertical pulse output is output to the terminal C is increased to some extent by inserting a resistor R2 or the like. Then, resistors R3 to R5 are connected from terminal B to determine the oscillation time constant of vertical oscillator 9, and at the same time, the oscillation output of vertical oscillator 9 is taken out from the elements of this time constant circuit and received by the emitter follower of transistor Q1. Since this is a charge/discharge waveform, it is a sawtooth wave voltage as shown in the figure. This is differentiated by capacitor C4 and resistor R8 to produce a negative direction pulse, and when biased by resistor R7 and applied to the switching circuit of transistor Q2, it becomes a positive direction vertical pulse. This is applied to terminal C through switch SW2. If the values of resistor RlO and resistor R2 are selected appropriately, the output of switching circuit 10 will not appear at terminal C. It can be made to work only with a vertical pulse applied externally from transistor Q2. That is, when transistor Q2 is on, terminal C is almost completely grounded. Transistor Q2
When is off, terminal C is connected to the power supply 12V and resistors RlO and R2.
It is determined by the relationship between the voltage and the output of the switching circuit 10, but depending on the selection method, it can always be made to be higher than the threshold of the next stage circuit (approximately 0.7V for transistor Q). As a result, the subsequent vertical drive circuit 12 is operated only by the vertical oscillation pulse applied to the terminal C from the external transistor Q2, and the vertical oscillation pulse is applied regardless of the switching state of the switching circuit 10. Vertical synchronization of the screen is controlled. In this way, the screen will not fluctuate greatly up and down due to switching between the frequency division output and the vertical oscillation output, and the above-mentioned disadvantages will be eliminated. Furthermore, the switches SWl and SW2 are linked, and when set to the manual side M, the variable resistor R5 works, allowing the vertical oscillation frequency to be varied to some extent.
The optimum point can be selected and a pulse can be applied to terminal C.

Also, if you switch to automatic side A, the fixed resistance will become R4,
The oscillation frequency is fixed to 60Hz or less, taking into account variations. At this time, since no pulse is input from the outside to the terminal C, it is driven by the vertical pulse output from the switching circuit 10 from inside. In this way, vertical synchronization can be maintained stably even when playing back VTR still images or slow motion, and a sufficiently stable screen can be displayed.

As described above, according to the present invention, the following effects can be obtained.

Even in special radio wave receiving areas where broadcast waves of the same channel exist with a 110 KHz offset, images can be stably received without any problems by simply adding a simple circuit outside the IC element. 2. There is no increase in the cost of television receivers in areas where ordinary radio waves are received.

In other words, the number of IC terminals does not increase. Since the variable resistors can be linked with each other by the two interlocking switches, there is no possibility of setting errors in the variable resistors during automatic operation.

Since a switch is provided to prevent the 4-terminal B from becoming open, all contacts are not floating during switching, so vertical transmission will not stop or screen abnormalities will not occur.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of a vertical deflection device devised prior to the present invention, Fig. 2 is a circuit diagram of a vertical deflection device in an embodiment of the present invention, and Fig. 3 is a wave/form diagram of each part thereof. . 1... Synchronous separation circuit, 2... Horizontal M°C circuit, 3... Horizontal oscillator, 6... Frequency divider circuit, 7... Reset Pulse generation circuit, 8...
...Integrator circuit, 9... Vertical oscillator, 10...
...Switching circuit, 11... Switching signal j generation circuit, 12... Vertical drive circuit, 13... Waveform comparison circuit, Rl, R2, R3, R4, R ,,R6,R
7, R8...Resistance) Cl9C29C39C4l-0
Capacitor~Ql9Q2...Transistor, S
Wl, SW2...Switch.

Claims (1)

[Claims] 1. A vertical oscillator that is synchronously controlled by a vertical synchronizing signal and has an oscillation time constant circuit added outside the integrated circuit element, and a horizontal oscillator that is synchronously controlled by a horizontal synchronous signal, and the outputs of the horizontal oscillator are frequency-divided to produce a vertical oscillator. and a frequency divider for creating pulses, and when the frequency relationship between the output of the vertical oscillator and the output of the frequency divider is not a predetermined ratio of the television standard system, the output of the vertical oscillator is used, and when the ratio is a predetermined ratio, the frequency relationship is A switch is provided to take out the output of the frequency divider, and the output of this switch is applied to the vertical drive circuit. The oscillation signal of the oscillator is extracted from the oscillation time constant circuit element outside the integrated circuit element, pulse-shaped, and the pulse-shaped output is applied at low impedance to the output circuit of the switching circuit, which has a high output impedance, to output the switching circuit. The vertical drive circuit can be driven by the vertical oscillation output regardless of the situation, and a switch is provided in the pulse application path for switching whether or not to apply the pulse-shaped pulse to the output circuit of the switching circuit. A vertical deflection device featuring: 2. The vertical deflection device according to claim 1, wherein the circuit for the oscillation time constant of the vertical oscillator is changed over in conjunction with a switch.