JPS6055826A - Automatic power source switch circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a power switch circuit. Turn on the power using input contacts that open and close, and turn off using a timer.
This invention relates to a power-saving automatic power switch circuit that performs +″-.

[Technology background]

Generally, computers and other electronic devices are often required to be available for immediate use at any time. In this case, a method is used in which the power to the device is always turned on and the device is kept in an operating state so that input from the keyboard or operation panel can be detected at any time. But for that.

When power consumption increases and the device is used for a short time, the problem arises that the power utilization rate decreases.For this reason, conventional methods have been used to reduce power consumption in various ways, such as configuring the device with CMO8. This solved the problem, but it also had its limits.

On the other hand, as devices such as calculators become smaller, increasing the efficiency of panel space for keyboards and switches has become an important issue.

[Object and structure of the invention]

An object of the present invention is to provide an automatic power switch circuit that can save power and is suitable for small devices.Therefore, the purpose of the present invention is to eliminate the conventional manual-operable dedicated power switch. The purpose of the present invention is to provide an automatic power switch circuit that allows keys and switches used for signal input to have a power-on function, and also uses a timer to automatically turn off the power.

The arrangement of the present invention thereby provides, in an electrical device having input contacts, means for detecting actuation of any of the input contacts, and power switch means driven into an on state by the input contact actuation detection means. , means for self-maintaining the on state of the power switch means in response to the power supply voltage applied when the power switch means shifts to the on state; The self-holding means is characterized by comprising means for releasing the self-holding state of the self-holding means after a predetermined period of time after activation.

[Embodiments of the invention]

The details of the present invention will be explained below based on the following examples.
Do J.

FIG. 1 is a block diagram showing the basic configuration of the present invention.

In the figure, 1 is a power supply source, 2 is a power switch, 3 is a main unit, 4 is a key operation panel, 5 is a power switch control circuit, 6 is a key operation detection circuit, 7 is a self-holding circuit, and 8 is a timer. .

The operational function of the circuit is as follows.

The power supply source 1 is a battery or a rectified AC voltage. The power supply voltage supplied from this power supply source 1 is
When the power switch 2 is turned on, the power is supplied to the main unit 3 via this switch.

Note that the power switch 2 is normally kept in an off state.

The main body device 3 can be any device such as a CPU, a control device, a measuring device, or the like. The key operation panel 4 is provided with keys such as control keys and data keys for controlling the main body device 3, or switch means, and includes, for example, a numeric keypad, a full keyboard, and the like.

When any key on the key operation panel 4 is operated, the power switch control circuit 5 detects this through the key operation detection circuit 6 and turns on the power switch 2. Further, when the power switch is turned on and the power supply voltage is applied to the main unit 9, the self-holding circuit 7 and the timer 8 are activated at the same time.

When the self-holding circuit 7 detects the power supply voltage, it establishes a control loop that turns on the power switch 2.

After that, even if the key operated 9 is restored, the power switch 2
self-holds in the on state.

Timer 8 turns on power switch 2.

Functions as a timing control switch to automatically turn off after a predetermined period of time, and disconnects the control loop established by the self-holding circuit 7 (secondarily, canceling the self-holding state and turning off the power switch 2) Timer 8 is a counter and OR time constant circuit.

It can be constructed of any suitable thing, such as an integrating circuit. The timer operating time is optimally determined according to the characteristics of the device and the usage environment.

With the above configuration, the device user is not aware of the current on/off state of the device power supply.

You can enter the execution state immediately using the key operation panel 4, and even leave it as it is after using the device.
The power switch 2 can be automatically turned off. Next, a specific example circuit will be explained.

FIG. 2 is a configuration diagram of a circuit according to an embodiment of the present invention;
The figure is a timing diagram for explaining the operation.

In FIG. 2, 9 is a power input terminal, 10 is a PNP transistor for a power switch, 11 is a constant voltage circuit, 2 is a CPU, 13-1 to 3-IL is a key switch,
14-1 to 14- are diodes for key power, 15 is an input circuit, 16-1 to 16-B are diodes for detecting key operation, 17 is a PNP transistor for power switch control, 18 is an NPN transistor for self-holding) , 19 to 23 are resistances.

24 is a timer, 25 is a timer output signal line, Vcc is a power supply voltage, and Vsz is a ground voltage.

In steady state, transistors 10, 17 and 18 are all off. This is the key switch 13-1 to 1
This is because there is no drive voltage on the base (b) side of each transistor because 3-n and timer 24 are off. Note that the following explanation of the operation will be made in correspondence with the operation timing waveforms of each part of the circuit shown in FIGS.

First, the user presses one of the key switches, for example 13.
-1 is assumed to have been activated. Due to this.

The key operation detection diode 16-1 turns on.

The lower ends of resistors 20 and 21 are grounded via this diode. This allows the PNP for power switch...
A base current flows through the transistor 10 through the resistor 21 and the diode 16-1, and the transistor 10 moves to a predetermined operating point within a preset linear operating region. As a result, this transistor 10 is turned on.

When the transistor 10 is turned on, the voltage at the input side (two power supply input terminals 9) of the constant voltage circuit 11 is applied.

A constant voltage Vcc appears on its output side. This Vcc
A voltage is applied to CPU 12 and also across resistors 22 and 2.
The transistor 18 is turned on by the potential applied to the base of the self-holding NPN transistor 18 via the timer output signal line 3 and output to the timer output signal line.

When the transistor 18 is turned on, the key switch 13-
1 is then turned off, the lower ends of resistors 20 and 21 will remain grounded via transistor 18, completing a self-holding control loop.

On the other hand, the CPU], 2 enters the operating state by applying Vcc, starts the timer 24, and reads the key switches [3-1 to 13-n] on the key operation panel (REA
D) Perform processing. In the example shown.

As shown in FIG. 3 (J), if the key switch 3-1 is in the on state, or the input diode 14-1 is traced to the input circuit 1.
5 and the code is converted.

It is sent to the input port of CPU12.

The timer 24 may be configured by software, for example, and outputs a ground potential to the timer output signal line 25 after a predetermined time. As a result, despite the presence of Vcc, the base of transistor 1B is lowered to the ground potential, transistor 18 is reset to the same off state as before, and the entire nine circuits are returned to a steady state.

Note that the PNP transistor 17 for controlling the power switch turns on when the supplied voltage increases, so it acts to short-circuit between the base and emitter of the transistor 10.Therefore, it will not react to an overvoltage of - chamber or higher. In contrast, the transistor 10 can be turned off (2) and functions as an overvoltage protection circuit. The timer 24 can also be restarted each time the key switch is activated one after the other, and the timer activation can be deferred sequentially.For example, a retriggerable one-shot multi-circuit can be used. It is also possible to do so.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to realize a power-saving power switch circuit that has a simple configuration and is easy to operate, and particularly has the advantage that the current consumption can be reduced to zero when the power switch is off. There is.

Furthermore, since a manual power switch is not required, the design of the panel surface of a small device becomes easier.

[Exception] In this embodiment, the input contact is a human key input, but it may be an automatic contact using some electronic means without human intervention.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the basic configuration of the present invention. FIG. 2 is a block diagram of a circuit according to an embodiment of the present invention, and FIG.
FIG. 3 is a timing diagram illustrating the operation of the example circuit shown in the figure. In the figure, 1 is a power supply source, 2 is a power switch, 3 is a main unit, 4 is a key operation panel, 5 is a power switch control circuit, 6 is a key operation detection circuit, 7 is a self-holding circuit, and 8 is a timer. . 1st (21 3rd figure '1JJ), 7/Shizu+s-1' 1-Yoto 3. ------
- (1 piece)

Claims (1)

[Scope of Claim] An electric device having an input contact, means for detecting operation of any of the input contacts, and power switch means driven to an on state by the input contact operation detection means;
and means for self-maintaining the on state of the power switch means in response to the power supply voltage applied when the power switch means shifts to the on state. An automatic power switch circuit characterized in that the automatic power switch circuit comprises means that is activated in response to the power supply voltage applied when the power switch means shifts to an on state, and releases the self-holding state of the self-holding means after a predetermined period of time.