JPS6055977B2 - Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor - Google Patents
Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitorInfo
- Publication number
- JPS6055977B2 JPS6055977B2 JP14564078A JP14564078A JPS6055977B2 JP S6055977 B2 JPS6055977 B2 JP S6055977B2 JP 14564078 A JP14564078 A JP 14564078A JP 14564078 A JP14564078 A JP 14564078A JP S6055977 B2 JPS6055977 B2 JP S6055977B2
- Authority
- JP
- Japan
- Prior art keywords
- electrode layer
- grain boundary
- laminate
- metal oxide
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Ceramic Capacitors (AREA)
Description
【発明の詳細な説明】
本発明は小型、大容量で製作の容易な、半導体粒界絶
縁型積層磁器コンデンサを製造する方法に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor grain-boundary insulated multilayer ceramic capacitor that is small in size, has a large capacity, and is easy to manufacture.
近時電気機器の小型化に伴い、電子部品の小型化も強
く要望されておる。With the recent miniaturization of electrical equipment, there is a strong demand for miniaturization of electronic components.
積層磁器コンデンサは、小型で大容量が得られるものと
してこれまで汎用されている。しかしより大容量のもの
を要求される場合には、小型化にも限度がある。 一般
に半導体磁器コンデンサは、他のものと比較してその容
量値にきわめて大きなものが得られることが知られてい
る。Multilayer ceramic capacitors have been widely used so far because they are small and can provide large capacitance. However, if a larger capacity is required, there is a limit to miniaturization. It is generally known that semiconductor ceramic capacitors have extremely large capacitance values compared to other capacitors.
しかしこのものは、これまでいわゆる単板コンデンサと
してしか利用されていない。 本発明は上記の点に鑑み
てなされたものであつて、粒界絶縁型の半導体磁器を用
いる積層コンデンサの製造方法にかかるものである。However, this type of capacitor has so far only been used as a so-called single-plate capacitor. The present invention has been made in view of the above points, and relates to a method for manufacturing a multilayer capacitor using grain boundary insulated semiconductor porcelain.
先づ、本発明においては、第1図に示すように、チタン
酸バリウム系やチタン酸ストロンチウム系等の、一般に
粒界絶縁型コンデンサ用として用いられる磁器を、従来
の積層コンデンサを製造する場合と同様シート状1に形
成する。First, in the present invention, as shown in FIG. 1, ceramics such as barium titanate and strontium titanate, which are generally used for grain boundary insulated capacitors, are used for manufacturing conventional multilayer capacitors. Similarly, it is formed into a sheet 1.
この磁器シート1の一平面上に、まず銅、マンガン、ヒ
スマス等の粒界絶縁体化用金属酸化物5の層を付与し、
この金属酸化物5表面上に金、白金、パラジウム等の高
融点金属よりなる容量用電極2の層を重層させて付与す
る。First, a layer of metal oxide 5 for forming a grain boundary insulator such as copper, manganese, hismuth, etc. is applied on one plane of the porcelain sheet 1,
On the surface of this metal oxide 5, a layer of capacitive electrode 2 made of a high melting point metal such as gold, platinum, palladium, etc. is applied in a superimposed manner.
この容量用電極2は、磁器シート1の外周端から所定の
距離をもつてほぼ中央部に付与される。この場合前記金
属酸化物5の形状は特に任意であるが、容量用電極5と
同形状で重ね合わせておくと製造上好都合である。この
磁器シート1の一平面上には、前記容量用電極2を磁器
シート1の一側端に導出させるための引出電極3の層が
、その容量用電極2の一部と連続して付与される。この
引出電極3は、容量用電極2の付与と同時に、同じ材質
のもので形成しておくことが好ましい。なお金属酸化物
5と容量用電極2とは、必すしも金属酸化物5を下層に
しなければならない必要はなく、逆にしても同じ結果が
得られる。次にこのように構成された磁器シート1を複
数枚用意し、これらを前記引出電極3が交互に位置され
るように積み重ね、圧着し,て積層体4を形成する。こ
の積層体4を形成する具体的な手段は、従来周知の方法
で行なえばよい。次にこの積層体4を、1350〜14
50゜Cの中性あるいは還元性雰囲気中で焼成し、積層
体4を磁器化.するとともに、金属酸化物5を積層体の
結晶粒界に拡散させて絶縁層(図示せず)を形成し、さ
らに容量用電極2を焼付ける。This capacitive electrode 2 is provided approximately at the center of the ceramic sheet 1 at a predetermined distance from the outer peripheral edge thereof. In this case, the shape of the metal oxide 5 is particularly arbitrary, but it is convenient for manufacturing to overlap it in the same shape as the capacitor electrode 5. On one plane of the ceramic sheet 1, a layer of an extraction electrode 3 for leading out the capacitor electrode 2 to one side end of the ceramic sheet 1 is provided continuously with a part of the capacitor electrode 2. Ru. It is preferable that the extraction electrode 3 is formed of the same material at the same time as the capacitor electrode 2 is provided. Note that the metal oxide 5 and the capacitor electrode 2 do not necessarily have to have the metal oxide 5 as the lower layer, and the same result can be obtained even if they are reversed. Next, a plurality of porcelain sheets 1 constructed in this manner are prepared, stacked so that the extraction electrodes 3 are alternately positioned, and pressed together to form a laminate 4. The specific means for forming this laminate 4 may be any conventionally known method. Next, this laminate 4 was
The laminate 4 is made into porcelain by firing in a neutral or reducing atmosphere at 50°C. At the same time, the metal oxide 5 is diffused into the grain boundaries of the laminate to form an insulating layer (not shown), and the capacitor electrode 2 is baked.
最後にこのように構成された積層体4の、前記引出電極
3が導出されている各側端面(およびそ!の近傍)に、
それぞれ外部接続用電極6を付与し、各容量用電極2と
導電接続させ、半導体粒界絶縁型積層磁器コンデンサを
得る。Finally, on each side end surface (and the vicinity thereof) from which the extraction electrode 3 is led out of the laminate 4 configured in this way,
An external connection electrode 6 is applied to each capacitor, and conductive connection is made to each capacitance electrode 2 to obtain a semiconductor grain boundary insulated multilayer ceramic capacitor.
外部接続用電極6の付与手段としては、従来の場合と同
様、メッキ、焼付、接着等を用いればよい。本発明製造
方法により得られた積層磁器コンデンサはこのように構
成され、磁器の粒界に形成される絶縁層を誘電体とする
大容量のものが得られるのである。As a means for applying the external connection electrode 6, plating, baking, adhesion, etc. may be used as in the conventional case. The multilayer ceramic capacitor obtained by the manufacturing method of the present invention is constructed in this manner, and has a large capacity in which the dielectric is an insulating layer formed at the grain boundaries of the ceramic.
従つて小型化を可能な限り行なえ、セットの小型化によ
り適応できる。また本発明では、製造工程も従来のもの
とさほど変える必要はなく、さらに誘電損失や絶縁抵抗
、温度変化特゛閉等の電気的諸特性も、従来のものと殆
んど遜色がlない。上述の例においては、積層体4の焼
成時に金属酸化物5を拡散させて粒界に絶縁層を形成し
たものを示したが、粒界への絶縁層形成をより安定なも
のとするため、積層体4の焼成とは別工程で行なつても
同様の結果が得られる。Therefore, the size can be reduced as much as possible, and the set can be made smaller. Further, in the present invention, there is no need to change the manufacturing process much from that of the conventional method, and the electrical characteristics such as dielectric loss, insulation resistance, and temperature change resistance are almost the same as those of the conventional method. In the above example, an insulating layer was formed at the grain boundaries by diffusing the metal oxide 5 during firing of the laminate 4, but in order to make the formation of an insulating layer at the grain boundaries more stable, Similar results can be obtained even if the firing of the laminate 4 is performed in a separate process.
すなわち、磁器シート1を複数枚積み重ねて圧着して形
成した積層体4を、先づ1350〜1450℃の温度の
中性あるいは還元性雰囲気中て焼成し、積層体4を磁器
化する。この場合金属酸化物5は、積層体4の結晶粒界
中へ拡散される。その後焼成された積層体4を、100
0〜1250℃の温度の中性あるいは酸化性雰囲気中で
熱処理して、粒界に拡散された金属酸化物5を安定な絶
縁層に形成するのである。この例におけるその余の工程
および手段は、先の例と同様でよいので、説明は省略す
る。またこの例によつて得られた積層磁器コンデンサの
電気的諸特性も、従来のものと殆んど遜色のないもので
あつた。なお本発明にかかる上記の各例についての説明
から容易に認識し得る程度のことは、当然本発明の範囲
に含まれるものであつて、本発明が上記記載のものに限
定されるものではないことを付言しておく。That is, a laminate 4 formed by stacking and pressing a plurality of porcelain sheets 1 is first fired in a neutral or reducing atmosphere at a temperature of 1,350 to 1,450°C to form the laminate 4 into porcelain. In this case, the metal oxide 5 is diffused into the grain boundaries of the stack 4. After that, the fired laminate 4 was heated to 100
Heat treatment is performed in a neutral or oxidizing atmosphere at a temperature of 0 to 1250° C. to form the metal oxide 5 diffused into the grain boundaries into a stable insulating layer. The remaining steps and means in this example may be the same as in the previous example, so their explanation will be omitted. Furthermore, the electrical properties of the multilayer ceramic capacitor obtained in this example were almost comparable to those of conventional capacitors. It should be noted that things that can be easily recognized from the explanation of each of the above examples of the present invention are naturally included in the scope of the present invention, and the present invention is not limited to the above-mentioned examples. I would like to add this.
第1図は本発明を具体的に示すための図である。
1・・・・・・磁器シート、2・・・・・・容量用電極
、3・・・・・・引出電極、4・・・・・・積層体、5
・・・・・・金属酸化物、6・・・・・・外部接続用電
極。FIG. 1 is a diagram specifically showing the present invention. DESCRIPTION OF SYMBOLS 1...Porcelain sheet, 2...Capacitor electrode, 3...Extractor electrode, 4...Laminated body, 5
...Metal oxide, 6...External connection electrode.
Claims (1)
用電極層と、この容量用電極層に連続し、この容量用電
極層を前記磁器シートの一側端に導出させる引出電極層
と、前記容量用電極層と重畳させた粒界絶縁体化用金属
酸化物層を形成し、この磁器シートを複数枚、前記引出
電極層が交互になるように積み重ねて圧着して積層体を
形成し、この積層体を中性あるいは酸化性雰囲気中で焼
成し、この焼成によつて積層体の磁器化と積層体の結晶
粒界への絶縁層の形成とを同時に行ない、その後前記引
出電極層の各導出端面に外部接続用電極を付与してなる
ことを特徴とする半導体粒界絶縁型積層磁器コンデンサ
の製造方法。 2 磁器シートの一平面上に、重畳して付与される高融
点金属よりなる容量用電極層と粒界絶縁体化用金属酸化
物層は、金属酸化物層が下層となるように付与されてい
ることを特徴とする、特許請求の範囲第1項記載の半導
体粒界絶縁型積層磁器コンデンサの製造方法。 3 磁器シートの一平面上に、高融点金属よりなる容量
用電極層と、この容量用電極層に連続し、この容量用電
極層を前記磁器シートの一側端に導出させる引出電極層
と、前記容量用電極層と重畳させた粒界絶縁体化用金属
酸化物層を形成し、この磁器シートを複数枚、前記引出
電極層が交互になるように積み重ねて圧着して積層体を
形成し、この積層体を中性あるいは還元性雰囲気中で焼
成した後、中性あるいは酸化性雰囲気中で熱処理して結
晶粒界の絶縁層を安定に形成し、その後前記引出電極層
の各導出端面に外部接続用電極を付与してなることを特
徴とする半導体粒界絶縁型積層磁器コンデンサの製造方
法。 4 磁器シートの一平面上に重畳して付与される高融点
金属よりなる容量用電極層と粒界絶縁体化用金属酸化物
層は、金属酸化物層が下層となるように付与されている
ことを特徴とする、特許請求の範囲第3項記載の半導体
粒界絶縁型積層磁器コンデンサの製造方法。[Scope of Claims] 1. A capacitor electrode layer made of a high-melting point metal on one plane of the porcelain sheet, and a capacitor electrode layer that is continuous with the capacitor electrode layer and led out to one side end of the porcelain sheet. A metal oxide layer for forming a grain boundary insulator is formed, which is overlapped with the capacitance electrode layer, and a plurality of these porcelain sheets are stacked and crimped so that the lead electrode layers alternate. forming a laminate, firing this laminate in a neutral or oxidizing atmosphere, and by this firing simultaneously converting the laminate into porcelain and forming an insulating layer at the grain boundaries of the laminate, A method for manufacturing a semiconductor grain boundary insulated multilayer ceramic capacitor, characterized in that an external connection electrode is then provided on each lead-out end face of the lead-out electrode layer. 2. The capacitor electrode layer made of a high-melting point metal and the metal oxide layer for forming a grain boundary insulator are applied in a superimposed manner on one plane of the ceramic sheet so that the metal oxide layer is the lower layer. A method for manufacturing a semiconductor grain boundary insulated multilayer ceramic capacitor according to claim 1. 3. A capacitive electrode layer made of a high melting point metal on one plane of the porcelain sheet, and an extraction electrode layer that is continuous with the capacitive electrode layer and leads out the capacitive electrode layer to one side end of the porcelain sheet. A metal oxide layer for forming a grain boundary insulator is formed so as to overlap with the capacitor electrode layer, and a plurality of these ceramic sheets are stacked and pressure-bonded so that the extraction electrode layers are alternately formed to form a laminate. After firing this laminate in a neutral or reducing atmosphere, it is heat-treated in a neutral or oxidizing atmosphere to stably form an insulating layer at the grain boundaries, and then on each lead-out end face of the lead-out electrode layer. A method for manufacturing a semiconductor grain boundary insulated multilayer ceramic capacitor, characterized in that it is provided with an electrode for external connection. 4. The capacitive electrode layer made of a high-melting point metal and the metal oxide layer for forming a grain boundary insulator are applied so as to be superimposed on one plane of the porcelain sheet, with the metal oxide layer being the lower layer. A method for manufacturing a semiconductor grain boundary insulated multilayer ceramic capacitor according to claim 3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14564078A JPS6055977B2 (en) | 1978-11-24 | 1978-11-24 | Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14564078A JPS6055977B2 (en) | 1978-11-24 | 1978-11-24 | Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5572024A JPS5572024A (en) | 1980-05-30 |
| JPS6055977B2 true JPS6055977B2 (en) | 1985-12-07 |
Family
ID=15389678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14564078A Expired JPS6055977B2 (en) | 1978-11-24 | 1978-11-24 | Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6055977B2 (en) |
-
1978
- 1978-11-24 JP JP14564078A patent/JPS6055977B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5572024A (en) | 1980-05-30 |
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