JPS6057749A - デジタルデ−タ獲得窓拡長回路 - Google Patents

デジタルデ−タ獲得窓拡長回路

Info

Publication number
JPS6057749A
JPS6057749A JP59032263A JP3226384A JPS6057749A JP S6057749 A JPS6057749 A JP S6057749A JP 59032263 A JP59032263 A JP 59032263A JP 3226384 A JP3226384 A JP 3226384A JP S6057749 A JPS6057749 A JP S6057749A
Authority
JP
Japan
Prior art keywords
circuit
time period
output
signal
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59032263A
Other languages
English (en)
Japanese (ja)
Inventor
ウイリアム、アンブロシウス、サード
ランダル、チユン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Western Digital Corp
Original Assignee
Western Digital Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Digital Corp filed Critical Western Digital Corp
Publication of JPS6057749A publication Critical patent/JPS6057749A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
    • G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/14—Digital recording or reproducing using self-clocking codes
    • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
    • G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Interface Circuits In Exchanges (AREA)
  • Dc Digital Transmission (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Control Of El Displays (AREA)
  • Image Analysis (AREA)
  • Image Generation (AREA)
JP59032263A 1983-02-22 1984-02-22 デジタルデ−タ獲得窓拡長回路 Pending JPS6057749A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/468,129 US4550391A (en) 1983-02-22 1983-02-22 Data capture window extension circuit
US468129 1995-06-06

Publications (1)

Publication Number Publication Date
JPS6057749A true JPS6057749A (ja) 1985-04-03

Family

ID=23858542

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59032263A Pending JPS6057749A (ja) 1983-02-22 1984-02-22 デジタルデ−タ獲得窓拡長回路

Country Status (5)

Country Link
US (1) US4550391A (de)
EP (1) EP0119766B1 (de)
JP (1) JPS6057749A (de)
AT (1) ATE30796T1 (de)
DE (1) DE3467444D1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4780844A (en) * 1986-07-18 1988-10-25 Commodore-Amiga, Inc. Data input circuit with digital phase locked loop
US4884198A (en) * 1986-12-18 1989-11-28 Sun Microsystems, Inc. Single cycle processor/cache interface
US4789838A (en) * 1987-03-23 1988-12-06 Cheng Jyi Min Pulse detection circuit using amplitude and time qualification
US6341326B1 (en) * 1998-12-23 2002-01-22 Intel Corporation Method and apparatus for data capture using latches, delays, parallelism, and synchronization

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3414889A (en) * 1965-09-07 1968-12-03 Westinghouse Electric Corp Electronically multiplexed dynamic serial storage register
US3794987A (en) * 1972-11-01 1974-02-26 Burroughs Corp Mfm readout with assymetrical data window
US3877027A (en) * 1974-01-23 1975-04-08 Ibm Data demodulation employing integration techniques
US4109236A (en) * 1977-06-17 1978-08-22 Honeywell Information Systems Inc. Apparatus for digital data recovery from mass storage devices
US4281356A (en) * 1979-11-28 1981-07-28 R. C. Sanders Technology Systems, Inc. Magnetic disk memory
US4393458A (en) * 1980-02-06 1983-07-12 Sperry Corporation Data recovery method and apparatus using variable window

Also Published As

Publication number Publication date
EP0119766A1 (de) 1984-09-26
DE3467444D1 (en) 1987-12-17
EP0119766B1 (de) 1987-11-11
US4550391A (en) 1985-10-29
ATE30796T1 (de) 1987-11-15

Similar Documents

Publication Publication Date Title
JP3395210B2 (ja) 同期信号検出器及び同期信号検出方法
JPH0157854B2 (de)
JPS58169341A (ja) 光学的情報記録再生方法
JPS6057749A (ja) デジタルデ−タ獲得窓拡長回路
US3382492A (en) Magnetic data recording formatting
US4646167A (en) Time code decoder
US3491349A (en) Phase modulation data recovery system for indicating whether consecutive data signals are the same or different
JPS6313425A (ja) 情報デ−タ復元装置
US3656149A (en) Three frequency data separator
CN108777576B (zh) 一种SoC系统复位期间锁相环稳定时钟输出电路
JPS6035863B2 (ja) クロツクパルス発生器同期用装置
US6473369B1 (en) Methods and apparatus for regenerating track crossing signals for searches across unrecorded areas on read/write optical discs
JP3140483B2 (ja) 同期データ取り込み方法および回路
US3493962A (en) Converter for self-clocking digital signals
JPH01151082A (ja) Ｐｄｍ信号デコード回路
JP2585536B2 (ja) ディジタルデ−タ再生装置
US5436881A (en) Method and apparatus for detecting pulse signal for generating clock from recording medium
JPS5847525Y2 (ja) ３周波数デ−タ復号装置
JPH0628649A (ja) サーボ情報抽出装置およびサーボマーク検出装置およびウインドウ生成装置
JPS6211095Y2 (de)
JPS6113305B2 (de)
JPH0247653Y2 (de)
JPS5853257A (ja) デイジタルデ−タ受信回路
JPH05315945A (ja) デジタルｐｌｌ回路
JPS61224181A (ja) 同期クロツク信号取出し方法および装置