JPS6065363A - Shared chp access control system - Google Patents

Abstract

PURPOSE:To improve the overall processing efficiency of a system by sending back a condition code showing an application unable state according to the result of access decision in case an access is given to an input/output device which is under the control of a shared channel processor. CONSTITUTION:An access deciding part 15 receives an information showing that an SIO instruction is delivered on a virtual computer from a handler 14. In this case, the part 15 decides whether the instruction is delivered from an exclusive processor and whether the access bus passes through a shared CHP5-0. If an access is given to the CHP5-0, this information is given to a condition code producing part 16. Then a condition code CC=3 showing that an input/output devide is not available with the part 16 to an access to be given to the CHP5-0 from the exclusive processor. Thus an operating system acts on the virtual computer recognizes substantially that the hardware sets the code CC=3.

Description

[Detailed description of the invention] 4. Technical part of the invention! I! 1. The present invention is a shared CIIP access control method, especially ! number of virtual silk-tubes {shared channel processing device (C
H-P) For the access from the 1q processor to Ic, the control logic is simplified to 17i'I, and the CI
) This relates to the shared C IIP access control 1 method that eliminates the overhead due to inter-U communication by 1.+7.

[11 Prior Art and Problems FIG. 1 shows an example of a system 419 configuration related to the present invention. In the figure, 110 to 1-3 are main storage units (MSU) that store data in storage elements, 2 is a storage control unit (MCU) that controls main memory access, 3 is a service processor (SVP),
Equipped with main unit, &-J, independent processor, and system console function.

4-0 and 4-1 are central processing units (CPUs), which have a system abnormality monitoring function, a maintenance console function, etc., a command control unit, a control unit 3, a storage control unit 1/kasa, Those that execute the instructions stored in MSUs 1-0 to 1-3, 5-ol, c to 5-2, are channel processing units (CIlr), which are connected to input/output devices (not shown). ) and M S U
It represents what controls the flow of data between 1-0 and 1-3.

Under the hardware configuration shown in FIG.

Virtual clearing (When realizing μ system, l specific virtual i
t 31: <F] place Jlj, 0) High speed notame K
, f/IJ Ekf, CPU 4-1 is the virtual 7 (11 dedicated processors), and dedicated C111'
can also be arbitrarily determined in advance. In this case, the shared CIIP that can be accessed from any virtual divider is CPU4.
Only accesses from -0 are 81 made.

Therefore, conventionally, when the virtual computer running on the CPU 4-1 accesses the input/output device under the CIIP for 2, 11-1, the so-called 5IGP (Signalr'
rocessor) instruction to perform inter-CPU communication, notify the access request to CPIJ4-0, and
The shared CHP was accessed from U4-0. Therefore, there was a problem that the control became complicated and the overhead due to CPU open communication also increased.

(C) Object and Structure of the Invention The present invention aims to solve the above-mentioned problems. Under the virtual machine 'J'r machine system deno, a virtual machine with the channel cross call function enabled is From Proselli,
Shared C) l Simplify the control logic when issuing an input/output request to P, reduce overhead,
The purpose is to improve the processing efficiency of the entire system. Therefore, the shared CHP access control method of the present invention is useful in a virtual paper machine system that is equipped with a plurality of central processing units and a shared channel processing device that is shared by a number of virtual machines. A shared channel processing device information storage unit that stores identification information of the shared channel processing device in a fixed area, and input/output instructions for a virtual computer running on a central processing unit that does not manage the shared channel processing device. an access determination unit that determines whether or not the access is to an input/output device under the shared channel processing device; and an access determination unit that determines whether the access is to an input/output device under the shared channel processing device; 1, a condition code generator that directly generates a condition code indicating an unusable state is included. In other words, generally speaking, the The access frequency is low and for the access.

It is noted that access to the shared channel processing bag P7 is made from the shared processors 1ti and 11 when the shared channel processing bag P7 reaches the unusable state. Stand ;) 5 light.

(1)) Embodiment of the Invention FIG. 2 shows the configuration of an embodiment of the invention, and FIG. 3 is a control diagram for the embodiment shown in FIG.

In the figure, codes 1-0.4-0.4-1.5-0 to 5-
2 corresponds to the m1 diagram, and 10 is a virtual calculation-like control unit (CP)
, 11 to 13 are virtual machines (VM).

14 is an interrupt handler, and 15 is an access determination unit.

164t represents a code generation unit, and 17 represents a shared CHP information storage unit.

The i-machine control unit (CI') 10 prepares a virtual dividing machine environment, controls the virtual computers 11 to 13, and controls the CPU 4-0° for each virtual dividing machine 11 to 13. It allocates 45 spindle hardware resources such as 4-1 and memory. In each virtual computation (FS 11 to 13), each operating system (OS)
The real 11 is controlled independently as if U4-0 or CPU1-1 were each occupied. In particular, in the case of this embodiment, the CPU 4-1 is a dedicated processor for the virtual computer 3, and the instructions of the virtual computer 13 are
The processing is executed by either the PU 4-0 or the CPU 4-1. In contrast, the instructions of the virtual machines 11 and 12 are executed only by the CI'U 4-0 because the CPU 4-1 is dedicated to the virtual machine 13.

In addition, in the case of this embodiment, C111' 5-0 is set to a shared channel processing device that can be accessed from any of the virtual languages 11 to 13, and CI-II'
5-1%', the virtual δI bean Ill is also determined to be exclusive to J2, and the CI-IF52 is determined to be exclusive to the virtual η4t'q13.

Interrupt controller 14 handles, for example, program interrupts. Virtual wtg machine shift system white, CI' 10 in general! 1. Operates in 4f mode.

IE-A [A it:? The operating systems of j + lengths 11 to 13 are virtually in )lt-1, right mode, but in the actual hardware state of j2+jl, they are not /i? Operates in +16 mode.

Therefore, C2, for example, S I OC3t, which is an input/output activation command.
artl rfntt 0rttpuf ) instructions, etc.
When you execute the agency command.

There are 11 progranos and 11 pieces. , (The interrupt handler 14 of j'IO analyzes the cause of 9 interrupts.

The processing requests for each virtual division 4j% 11 to 13 can be recognized.

The access determination module 5 may be configured to interrupt the 2-interrupt handler 14, when it is notified that an SIO instruction has been issued on the virtual ryl [gate], the 810 instruction is dedicated to the processor v.
and whose access bus is a shared C
This is to determine whether or not the information is transmitted via i-I P 5-0. If the access is not to the shared CIIP 5-0, then ? 7/ Normal input/output event Jt+11 11j is 1. (If the access is to the shared CI-I P5-Q, 7+J: ).

/1'-( without issuing an actual SIO instruction
'Notify the I code generation unit 16.

The condition code generation unit j6 generates a condition code CC indicating the execution result of the S10 instruction in a manner similar to 1ν. Normally, two condition codes (1) are set by the hardware by executing the instruction. In the case of the present invention, when accessing the shared Cl1P5-0 from the dedicated blog module, the 8 code generator 6 is set by the hardware. , generates the code FCC=3 indicating that the input/output device is in the (=+5 disabled f1) state, and executes the operation e which operates on the virtual division (9'2).
-/ For stems, C makes it appear as if the hardware had set condition code CC=3.

The shared CUP information storage unit 17 is secured in a fixed area of the lower address part of 2, for example, N4SU1-0, and is shared by CIII).
This is to store the CII P number of. This information is referred to by the access determining unit 15 when determining the shared CDI'. Shared CIIP information'tlJtj
21'? 7;l! ] 7 Heno common CIIP number-NノNk2 HA1' [J ECHESISY), initials.
Program-Loading (, r, i' II, )
When 1, for example, the rl of 5vP3 shown in Figure 1 is cisy'no' 4? '? The event will be held on September 9, 2019 in the prefecture.

Next, we will explain about the raccoon bait 1 of the embodiment shown in FIG. For example, when the virtual elegance machine 13's Mepeleding System issues the F3LO command in process 2o, J,
An interrupt occurs, and the CPIO process 21 causes the interrupt to occur.

A program interrupt is received. The cause of the program interrupt is! +! 22), and S
When it is determined that the issue is due to the issuance of the IO command 11, after checking the issuer's pass, the processor 23 determines the cllF number at which the access bus for the input/output request is passed.

It is determined whether or not the shared CII i' number is stored in the shared CJII' information storage section 17.

In addition, shared ClTl' information 1 脣 11. The storage section 17 stores each CI
) Each U can be played separately.

“If the access bus is not related to the shared C11l', the hJL Tanuki 24 replaces addresses 1, Seiko 13, etc. of the channel command word (CCW) as necessary, and The SiO instruction is reissued in privileged mode.Meanwhile, the access determination unit
If it is related to P, feed control I is transferred to process 25 and CC=3 indicating an unusable state is given as a condition code.

1. When the operating system of the computer 13 returns after issuing the 810 instruction, the operating system of the computer 13 executes the processing 12G.
Determine whether the condition code is C(,'=3. If CC=3, move to the first process.C
If C=3, the input/output request is put on hold in step 27, and the ninth step 111 is executed. Top 5
Go, place J! ]! For example, the input/output request of the SIO command issued by KCPU 20 is taken up by the KCPU 4-0 on another occasion and processed normally by reissuing the f910 command.

(I! 1 Effects of the invention As explained above, 2 According to the present invention, the common chaol 1 (
IL', ITl 1J2 (branch) (dedicated to) ゛ Actonu from Rossenori 1lill j'll will be in the middle of the day. Therefore, due to inter-CI'U communication, etc., one bar head is lost, and the system's processing ``lj''! Since the number of bugs (such as 10 mistakes, etc.) is reduced, the reliability is improved.

[Brief explanation of drawings]

Flood 11'￥1 is an example of a system/configuration related to Book 1. The second part is one implementation V++ configuration of the misfired IIJ, and Figure 3 is the second
Figure 1? 71 Harmful satiation f! A control explanatory diagram of '11 is shown. During this period, ■-〇~1-3 are main storage devices, 4-0.4-1
(λΦ history processing unit, 5-O to 5-2 are channel processing units
! 10 is a virtual computer control unit, 11 to 13 are temporary, I
T'! tears Ωl'j, 15 is access-tlJ constant part, 16
is a multi-item code generation unit, and 17 is a shared CI-IP information record 1.
, represents the It part. Patent Applicant: Fujitsu Ltd. Representative Patent Attorney: 1) Hiroshi (1 other person); r'-1m 13 (2)

Claims (1)

[Claims] rτν1r! In addition to having the central processing power of j9"C, it also has the shared channel processing power f/r shared by multiple 4) 1 thoughts nl"n stingy people (in a virtual computer system with a fixed area. J, 'l member and the above shared channel processing device, identification information 13 (,, \11 channel processing device d information memory unit and. l I used to manage the boo Y channel processing device for i74+-. Access judgment 5 determines whether the input/output command of the virtual n1 computer running on the central 6th 3. access device is an access to the input/output device under the shared Guyanel processing device.
57 rjl A shared CIIP access control method characterized by comprising a condition code generator that returns a condition code.