JPS60700B2 - Fault indicator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a fault display device that collectively displays the occurrence and recovery of a fault in an electrical station or the like.

In order to smoothly operate and control electrical stations such as power plants and factories, it is necessary to take prompt and accurate measures when an accident occurs or when recovery occurs. Conventionally, the occurrence of an accident is detected and displayed, so even if the accident has already been recovered or the measures have been taken, it is not possible to know when the accident has been recovered.
That is, since it is not possible to detect and display the time of recovery from an accident, the point of recovery from the failure is unclear, and the operator cannot take prompt and accurate measures. The present invention has been made in view of the above circumstances, and when the occurrence of an accident is detected, the first failure point and the second and subsequent failure points are distinguished and displayed, and the time of recovery from the accident is detected and displayed. It is an object of the present invention to provide a failure display device that notifies the operator of the failure and recovery and allows an operator to take prompt and accurate measures.

Embodiments of the present invention will be described in detail below with reference to the circuit diagram shown in FIG.

In the figure, XI is a failure detection contact that is driven and closed when a failure is detected in an electrical station, etc., and one end is connected to the bus P and the other end is connected to the input terminal 23 of the failure display unit DISI. The above fault display section DISI connects the terminal 23 to the anodes of the diode D5, DIO, the pulse circuits PH and PP, and the gate circuit G3.
, connect to G4. Further, the terminal 22 is connected to the gate circuit G5. Then, terminal 21 is connected to the anode of diode D9, and the cathode of this diode D9 is connected to resistor 1.
3 to the cathode of diode D8, DIO and the anode of thyristor S5, respectively. The terminal 20 is then connected to the anode of the diode D8. Further, the terminal HI9 is connected to the anode of the diode D4, and the cathode of the diode 4 is connected via the resistor 12 to the anodes of the diodes D6 and D7 and the cathode of the diode D3, respectively. Then, the terminal 18 is connected to the anode of the diode D3, and the cathode of the diode D7 is connected to the anode of the thyristor S4. and gate circuit G
The other end of thyristor S5 is connected to the gate and cathode of thyristor S5, and the cathode of thyristor S5 is connected to the anode of thyristor S3. The other end of gate circuit G4 is connected to the gate and cathode of thyristor S4, and the cathode of thyristor S4 is connected to the anode of thyristor S3. The other end of gate circuit G3 is connected to the gate and cathode of thyristor S3. Furthermore, diode D
The cathode of No. 5 is connected to the cathode of diode D6 and the anode of thyristor S2. The terminal 17 is connected to the anode of the diode D2, and the terminal 16 is connected to the anode of the diode DI. Then, the cathode of the diode DI is connected via the resistor 11 to the cathode of the diode D2 and the anode of the thyristor SI. Then, the terminals of the pulse circuit PP are connected to the gate circuits GI, G2 and the terminal 24, respectively. Then, the terminal of the gate circuit GI is connected to the gate and cathode of the thyristor SI. The other end of gate circuit G2 is connected to the gate and cathode of thyristor S2. Furthermore, as shown in FIG. 2, for example, one end of a clip circuit C consisting of a level detection circuit LD, a relay drive circuit RD, an auxiliary relay Z, their contacts Z1 and Z2, etc. is connected to the cathodes of thyristors S2 and S3. The other end of this clip circuit is connected to the terminal 25, the cathode of the thyristor SI, the terminal 26, and the terminal 27. Further, the other end of the pulse circuit PA is connected to the terminal 15. And the terminals of this failure display section DISI are day 22, day 21, day 20, HI9, day 18, day 17,
Day 16, Day 15, Day 24 will be described later at the terminals of the failure control unit CON Day 6, Day 8, HI0, Day 7, HI1, Day 1
2, connect on days 9, days 14, and days 13. In addition, the terminal date 27 of the failure display unit DISI is transferred to the bus N, the terminal date 26 is transferred to the bus N via the lamp WI of the indicator LMI, and the terminal date 25 is transferred to the bus N via the lamp WI of the indicator LMI.
are respectively connected to the bus N through the lamp RI of the indicator LMI. Then connect the bus P to the terminal HI of the failure control unit CON.
and one end of each of the push nail switches AR, LR, PR, and one end of the failure detection contact XI. Then, the other ends of the push button switches AR, LR, PR and the bus line N are connected to terminals 3, 4, 5 and 2 of the fault control unit CON. The above failure control unit CON has terminals Day 6, Day 7, Day 8.
are connected to contacts L1, E1, and AI, respectively.

Further, the terminal 9 is connected to the contact K1 and the auxiliary relay Y, and the terminal HIO is connected to the second flicker circuit SF and the detection circuit FK. Then, connect the terminal HII to the first flicker circuit HF and the contact Y3, connect the terminal 13 to the relay drive circuit YK and the contact YI, and connect the other end of the auxiliary relay Y to the other end of the relay drive circuit YK. . Then, the terminal 12 is connected to the end of the first flicker circuit HF, and the terminal 14 is connected to the other end of the alarm circuit B and the detection circuit FK. Then, the end of contact Y3 is connected to the other end of detection circuit FK, terminal 5 is connected to auxiliary relay L, and terminal 3 is connected to auxiliary relay A and contact TI. Then, the contact TI is connected to the auxiliary relay E via the contact Y2, and the terminal HI is connected to the first flicker circuit HF, the second flicker circuit SF, each contact L1, E1,
Connect to A1, KI and contact A2. and contact A2
The other end is connected to an alarm circuit B, and this alarm circuit B is connected to an auxiliary relay T. Then, the terminal 2 is connected to the first flicker circuit HF, the second flicker circuit SF, the contact Y1, each of the auxiliary relays K, L, A, E, and T, and the relay drive circuit YK. Furthermore, the fault display section DISN, which is shown without detailed circuitry, has its terminals connected in parallel to the above-mentioned fault display section DISI, and is provided with a display LMN having lamps WN and RI.

With such a configuration, for example, the first
When a fault occurs and the fault contact x1 closes, the signal is sent to the gate circuits GI, G2 and the relay drive circuit Y via the pulse circuit PP.
A signal is applied to K, and thyristors S1 and S2 and auxiliary relay Y operate.

At the same time, a signal is applied to gate circuits G3 and G4 to operate thyristors S3 and S4, and an output pulse signal from pulse circuit PA is applied to alarm circuit B, which then issues an alarm. Further, due to the operation of the thyristor SI, the lamp RI starts the first flicker display via the first flicker circuit HF, the diode D2, and the thyristor SI. Then, a holding current is applied via the bus P, auxiliary contact K1, diode D1, and resistor 11 to hold the thyristor SI. Furthermore, due to the operation of thyristor S2, lamp WI receives a continuous lighting signal via bus P, fault contact x 1, diode D5, thyristor S2, and clip circuit C, but is clipped by the holding current supplied to thyristor SI. Although the thyristor S2 cannot be lit continuously because of the current, the holding current that holds the thyristor S2 itself flows. Also, thyristors S3 and S4
Due to the operation of the first flicker circuit HF, the diode D
3. A second flicker signal is applied via the diode D7, but it is clipped by the continuous lighting signal applied via the thyristor S2. Then, by pressing the alarm reset pushbutton switch AR, the auxiliary relay A is operated, and by opening the contact A2, the alarm circuit B is restored, and the alarm is stopped 2. Further, even if the lamp reset push-down switch LR is operated, the alarm reset state continues, regardless of the first failure point. Then, by pressing the priority display reset switch PR, the auxiliary relay K is operated, and the holding current of the thyristor SI is cut off by opening the third contact KI.
is turned off. Then, the auxiliary relay Y also returns to normal operation, and the first flicker signal flowing to the lamp RI is suddenly cut off by turning off the thyristor SI. In addition, the lamp WI, which was clipped by the holding current of the thyristor SI, is unclipped, and the lamp WI is lit continuously by the continuous lighting signal given via the bus P, the fault detection contact X1, the diode D5, the thyristor S2, and the clip circuit C. . Then, the continuous lighting signal is cut off due to the recovery of the failure detection contact
A second flicker signal is supplied to the lamp WI via the thyristor S2 and the clip circuit C, and the lamp WI starts a second flicker display. At the same time, the detection circuit FK detecting this signal gives a signal to the alarm circuit B to operate it and issue an alarm. Then, the second flicker of the lamp WI and the generation of an alarm notify the recovery of the first failure. Then, by pressing the alarm reset push switch AR, auxiliary relay A and auxiliary relay E operate, and by opening contact EI, bus bar P, contact E1, diode D4, and resistor 12 are opened.
, the holding current applied via the diode D6 is cut off, the thyristor S2 is turned off, and the lamp WI is turned off. At the same time, the alarm circuit B is restored by opening the contact A2, the alarm is also stopped, and the first failure display circuit is returned to the standby state. Next, when the failure detection contact XI is activated due to the second or later failure, the pulse signal from the pulse circuit PP is short-circuited to the bus line N via the contact YI that was closed due to the first failure.

Therefore, since the gate circuits GI and G2 are not given signals, the thyristors S1 and S2 cannot be turned on. On the other hand, the gate circuits G3 and G4 turn on the thyristors S3 and S4 because they are given a continuous signal from the failure detection contact XI, and the alarm circuit B is activated by the pulse signal from the pulse circuit PA to generate an alarm. emanate. and thyristor S3
, S4 is turned on, the first flicker circuit HF is turned on.
, diodes D3, D7, sirens S4, S3, and clip circuit C, a second flicker signal is supplied, and lamp WI starts a second flicker display. By the way, in the case of a failure in the second or higher order, the thyristors S1 and S2 do not turn ○N, so the zero thyristors S3 and S4 are not clipped. Therefore, when a failure occurs in the second or subsequent order, the occurrence of the failure is notified by a flicker display on the lamp WI and an alarm in the alarm circuit B using the second flick force signal. Next, by pressing the alarm reset pushbutton AR, the auxiliary relay A is activated, the contact A2 is opened, the alarm circuit B is restored, and the alarm is stopped. Furthermore, by pressing the lamp reset pusher switch LR, the auxiliary relay L is operated, and by closing the contact LI, a signal is given to the gate circuit G5 and the thyristor S5 is turned on. When the thyristor S5 is turned on, a continuous lighting signal is supplied via the bus P, the failure detection contact X1, the diode DI0, the thyristors S5, S3, and the clip circuit C, and the lamp WI is switched from the second flicker display to the continuous lighting display. Then, the thyristor S4 is turned off by this continuous lighting signal. And the point after failure detection ×
Due to the return/recovery of 1, the continuous lighting signal is suddenly cut off, and the 2nd
Flicker circuit SF, diode D8, thyristor S5,
S3, a third flicker signal is supplied via the clip circuit C, and the lamp WI performs a third flicker display. At the same time, the detection circuit FK detects the third flicker signal and sends a signal to the alarm circuit B to issue an alarm. Note that the thyristor S5 is held by a holding current applied via the bus P, the contact AI, the diode D9, and the resistor 13. That is, the third flicker display of the lamp WI and the alarm of the alarm circuit B notify the recovery of the second and subsequent failures. Then, by pressing the alarm reset push switch AR, the auxiliary relay A is activated, and by opening the contact A2, the alarm circuit B is activated.
"By opening contact AI, the holding of thyristor S5 is interrupted, lamp WI is turned off, and display circuit DIS
I enters a special state. The table below shows each lamp RI to RN, WI for the first failure point and the second and subsequent failure points.
~WN operations are collectively shown.

Table ■: Lamps RI to RN ■: Lamps WI to WN As is clear from this table, the occurrence of failures is displayed separately into the first failure point and the second and subsequent failure points, and the time of accident recovery is also indicated. It can be detected and displayed, allowing operators to quickly respond to the occurrence and recovery of failures.

Note that the present invention is not limited to the above-mentioned embodiments. For example, in the above-mentioned embodiments, display is performed by a combination of the first to third flicker displays of the lamps RI to RN and WI to WN, but the The types of flicker signals may be further increased such that the failure point is displayed as a first and second flicker, and the second and subsequent failure points are displayed as a third and fourth flicker.

Further, the alarm output may be differentiated between an alarm when a failure occurs and an alarm when a failure is recovered, and the clip circuit C shown in FIG. 2 may have a different circuit configuration with the same function. As detailed above, according to the present invention, when a failure occurs at an electrical station, etc., it is possible to distinguish and display the first failure point and the second and subsequent failure points, thereby obtaining clues for tracing the cause of the failure. .

Further, to provide a failure display device that can display the first failure occurrence point at the time of failure recovery, distinguishing it from the recovery of other failures, notify the occurrence of failure and recovery, and enable an operator to take prompt and accurate measures. I can do it.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing an example of the clip circuit of the above embodiment. XI~XN...Failure detection contact, SI~S5...
Thyristor, C...Clip circuit, HF...
・First flicker circuit, SF...Second flicker circuit, DISI to DISN...Failure indicating circuit. Figure 1 Figure 2

Claims (1)

[Claims] 1. A first thyristor that stores an input applied at the time of occurrence of the first fault point and conducts a first lamp flicker signal for generating the first fault point; and a memory of the first thyristor that stores the first fault input. and a second thyristor that conducts a second lamp flicker signal for recovery from the first failure point and a continuous lamp lighting signal for indicating failure continuation when released, and also releases the memories of the third thyristor, the fourth thyristor, and the fifth thyristor. The first failure display circuit and the second
The second
A third thyristor, a fourth thyristor, which conducts a second lamp flicker signal for the generation of a failure point after the second position, and a lamp continuous lighting provided through the third thyristor only when the failure point after the second failure point continues to fail. It has a fifth thyristor that conducts the signal, and when the fifth thyristor conducts, the memory of the fourth thyristor is released, and when the fault input of the second and subsequent fault points is de-energized, the fifth thyristor and the third thyristor a second and subsequent failure indication circuit that conducts a third lamp flicker signal for detecting a return to a failure point; and a second thyristor, a third thyristor, a fourth thyristor, a fifth
A fault characterized in that it is equipped with a clip circuit that prevents a flicker signal and a continuous lighting signal while retaining the memory of the thyristor, and that the occurrence and recovery of the first fault point are notified separately from the second and subsequent fault points. Display device.