JPS607206A - Peak clamp circuit - Google Patents

Abstract

PURPOSE:To offer a peak clamp circuit with less number of components and grounding a peak value of an AC signal having different earth potential at each 360 deg. by providing a timing signal generating circuit outputting a pulse in synchronizing with the peak value of the AC signal and using its output. CONSTITUTION:In figure, 1 is a signal source and 2 is an insulation transformer. A timing signal generating circuit 5 generates a pulse in synchronizing with a positive or a negative peak value of the AC signal generated by the signal source 1 and turns on a semiconductor switch 4 at an interval of 360 deg.. Further, the polarity of an output pulse is changed depending whether a transistor (TR)4 is of PNP or NPN type. When the semiconductor switch 4 is turned on, it is operated to ground the output of a capacitor 3 and a rectified output clamped to a ground potential appears at an output terminal 6 every time when the semiconductor switch 4 is turned on. In order to make the polarity of the rectified output positive, the semiconductor switch 4 is turned on when the signal of the output of the capacitor 3 shows a negative peak. In order to obtain a negative polarity of the rectified output, the semiconductor switch 4 is turned on when the signal of the output of te capacitor 3 shows a positive peak.

Description

Detailed Description of the Invention (a) Technical Field of the Invention The present invention relates to a peak clamp circuit used when synchronously detecting alternating current signals with different ground potentials. This is about a peak clamp circuit that locks the phase of an alternating current signal by grounding every degree.

(b) Prior Art An example of a conventional circuit used in such a case is shown in FIG.

In FIG. 1, the output of a signal source 1 that generates an alternating current signal is insulated by an insulating converter 2, and is connected to an output terminal 13 via an amplifier 11 and an amplifier 12. Amplifier 11 is an in-phase amplifier,
Amplifier 12 is an inverting amplifier. In FIG. 1, a case is illustrated in which a transformer is used as the insulation converter 2. In FIG.

A square wave voltage whose phase is the same as that of the signal source 1 by 1υj is applied to the terminal 14, and a square wave voltage whose phase is shifted by 180 degrees from the phase of the signal source 10 is applied to the terminal 15.

Diode 16 turns on transistor 17 in synchronization with the phase of signal source 1, and diode 18 similarly turns on transistor 19 in synchronization with the phase of signal source 10. Therefore, the transistor/transistor 17 and the transistor 18 are alternately turned on and off every half cycle in synchronization with the phase of the signal source 1.

The + side peak voltage +V of the square wave voltage applied to the terminals 14 and 15 is set to be equal to or higher than the + side peak voltage of the signal to be synchronously detected.

Also, the peak voltage -VP on one side of the square wave voltage applied to terminals 14 and 15 is between transistor 17 and transistor 1.
The voltage is set to be lower than the pinch-off voltage V of 8.

The resistor 21 is a self-biasing resistor for keeping the transistor 17 at Vcs''O and turning it on when the square wave voltage at the terminal 14 is -1-V. It is for self-bias.

Between resistors 21 and 24, resistor 21) resistor 22, resistor 2
3) Provide a relationship with the resistor 24 to reduce leakage of the square wave to the detected signal.

With this configuration, the full-wave rectified output of the signal source 1 can be obtained at the output terminal 13 in FIG.

(c) Problems with the Prior Art In FIG. 1, the rising and falling components of the square wave voltage at the terminal 14 are bypassed by the junction capacitance of the diode 16. Since this bypassed signal is applied to the gate of transistor 17, there is a problem in that a positive spike voltage is superimposed on the rectified output.

Especially when the rectified output is small, this phenomenon cannot be ignored.

Note that similar problems occur on the diode 18 and transistor 19 sides.

In addition, since the gate bias resistor 21 of the transistor 17 needs to have a large resistance value, the transistor 17
There is a problem that a rectified output with frequency characteristics occurs due to the input capacitance of the input capacitor.

This relationship is also the same for the resistor 23 on the transistor 19 side.

(d) Purpose of the Invention This invention provides a capacitor connected in series to an alternating current signal;
It is equipped with a semiconductor switch connected between the output side of the converter and ground, and a timing signal generation circuit that outputs a pulse synchronized with the peak value of the AC signal. It attempts to solve the problems of the prior art by providing a peak clamp circuit that turns on the capacitor and grounds the output side of the capacitor.

(e) Examples of the invention First, a configuration diagram of an embodiment according to the present invention is shown in FIG.

The signal source 1 and isolation converter 2 in FIG. 2 are the same as in FIG.

In FIG. 2, 3 is a capacitor connected in series to the output of the isolation converter 2, 4 is a semiconductor switch connected between the output side of the converter 3 and ground, and 5 is a timing signal generating circuit.

In FIG. 2, a case is illustrated in which a transistor is used as the semiconductor switch 4.

The timing signal generating circuit 5 generates a pulse synchronized with either the positive or negative peak value of the AC signal generated by the signal source 1. The polarity of the peak value of signal source 1 is output terminal 6.
determined by the polarity of the rectified output. The reason is as follows.

The semiconductor switch 4 is normally off, and when the semiconductor switch 4 is turned on, it operates to ground the output side of the capacitor 3. Therefore, a rectified output clamped to the ground potential is produced at the output terminal 6 every time the semiconductor switch 4 is turned on.

In order to make the polarity of this rectified output positive, capacitor 3
The semiconductor switch 4 may be turned on when the signal on the output side of is at a negative peak. Furthermore, in order to make the polarity of the rectified output negative, the semiconductor switch 4 may be turned on when the signal on the output side of the capacitor 3 has a positive peak.

Furthermore, since the timing signal generating circuit 5 is for turning on the semiconductor switch 4 at every 360°, the polarity of the output pulse is changed depending on whether the transistor in Fig. 2 is r'N I) or NPN, and the output pulse is By adding this, the semiconductor switch 4 is turned off.

In this way, according to the embodiment circuit shown in FIG. 2, by passing the AC signal from the signal source 1 through the insulating converter 2, a synchronous detection circuit with different ground potentials can be configured, and the peak value of the signal source 1 can be It will be possible to clamp it.

Next, a circuit diagram of an embodiment of the timing signal generation circuit 5 is shown in FIG.

In FIG. 3, a capacitor 52 and an amplifier 53 constitute a 90° phase shifter, and a capacitor 54 and a resistor 55 constitute a differential circuit. Then, a pulse signal is extracted via a photocoupler 56.

Next, an example of the waveform diagram of FIG. 3 is shown in FIG. 4.

FIG. 4(7) shows the signal waveform of the input terminal 51, and the signal applied to the input terminal 51 is made to have the same phase as the AC signal of the signal source 1.

FIG. 4(a) shows the output waveform of the amplifier 53, which is a square wave whose phase is shifted by 90 degrees from that of FIG. 3(a).

The differential circuit operates at the falling edge in FIG. 4(a), causing the photodiode in the photocoupler 56 to emit light. As a result, the phototransistor in the photocoupler 56 is turned on, and the fourth phototransistor is turned on.
The pulse signals shown in the figure are taken out from the output terminal 57.

FIG. 4(I) is an example of a waveform diagram appearing at the output terminal 6 of FIG. 2, and is an example in which the negative peak of signal #1 is clamped to the ground potential.

Note that the actual waveform at output terminal 6 is based on resistor 7 and capacitor 8.
The rectifier circuit creates a smoothed waveform.

Next, a block diagram of another embodiment according to the present invention is shown in FIG.

FIG. 5 uses a photocoupler 9 as an isolation converter in place of the transformer shown in FIG. 2, and shows that synchronous detection of different ground potentials can be performed by the photocoupler 9 without using a transformer.

(f.) Effects of the Invention According to the present invention, it is possible to provide a beak clamp circuit that grounds the peak values of AC signals having different ground potentials every 360 degrees with a small number of components.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing an example of a conventional circuit, Fig. 2 is a block diagram of an embodiment according to the present invention, and Fig. 3 is a diagram showing an example of a conventional circuit.
FIG. 4 is a diagram showing an example of the waveform diagram of FIG. 3, and FIG. 5 is a configuration diagram of another embodiment according to the present invention. 1...Signal source, 2...Isolation converter, 3.
... Capacitor, 4 ... Semiconductor Switzerland Sochi, 5
...Timing signal generation circuit, 6...Output terminal, 7...Resistor, 8...Condenser, 9
...Photocoupler, 11...Amplifier, 12...
...Amplifier, 13...Output terminal, 14...
Terminal, 15...Terminal, 16...Die'-de, 1
7...Transistor, 18...Die cutting °
- code, 19...transistor, 21-24...
...Resistor, 51...Input terminal, 52...Condenser, 53...Additional 11i1 device, 54...Condenser, 55...Resistor, 56...Photocoupler, 57...Output terminal. Agent Patent Attorney Kin Tsukasa Komata Figure 1 Figure 8 VE Figure 4

Claims (1)

[Claims] 1. A signal source that generates an alternating current signal, an insulated converter connected to the signal source, a capacitor connected in series to the output of the insulated converter, and a connection between the output side of the capacitor and ground. a semiconductor switch connected to the AC signal, and a timing signal generation circuit that does not output a pulse synchronized with either the positive or negative peak value of the AC signal, and the semiconductor switch is turned on by the output of the timing signal generation circuit. The peak clamp circuit is characterized in that the output side of the co/denary is grounded every 360 degrees.