JPS6073754A - Sharing control system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a shared control system in dual control of a data processing system.

Background of the Technology In recent years, with the development and spread of data processing technology, data processing systems have become more sophisticated, larger-scale, and more diverse.

(cl) Prior Art and Problems FIG. 1 shows a conceptual diagram of a shared control system in a data processing system according to a conventional method and an embodiment of the present invention. In the figure, la and lb are central processing units 1 (CPUs).

2a, 2b are intelligent terminal control devices (IT(,'), 3 is an input/output (Ilo) interface, and 4a, 4b...
...4n is a terminal device (TRM). Here, the code suffixes are different for CPU1a, lb and I.
It is assumed that the TCs 2a and 2b are composed of members with the same function, and the TRMs 4b-n are composed of a single bridge or a plurality of bridges having different functions. During normal dual control with the configuration shown in the figure, CP
Data processing commands are sent from UI a and lb to ITC2a, and commands received by ITC2a are sent to ITC2a.
2a notifies ITC 2b, both 1TC 2a and 2b process data for the common command, and the states of ITC 2a and 2b match.

If the commands from CPUIa and 1b are common, CP
Even if commands are applied from U1a and lb at the same time, lTc2a executes data processing without any problem, and lTc2a and 2b
The data processing statuses of both are matched, achieving improved reliability through dual control. However, for example, CPU1b and I
When a failure occurs in the communication control line between IrO2a and the line becomes unusable, CPU1biiITC2b
Send the f command. At this time, CPU 1 a
-+ l T C2a, CI-'Ulb-+1Tc2
As a result of applying a command to b, lTc2a becomes ■
Since I'i'C2b and I'l'C2a notify each other so that their data processing functions match TC2b, commands from both sides collide. When commands collide like this, it becomes difficult to perform the processing procedure to match the data processing of ITC2a and I'i'C2b.
C2a, 2bi microprocessor (MPLI, l) can be used as an intelligent terminal control device to perform some of the processing functions of CP [Jla, lb. There was a problem.

(dl Purpose of the Invention The purpose of the present invention is to connect one CPU from CPUIa and CPUIb to the own system in the event of an abnormality in which a failure occurs in either of them.
Without applying commands to 2a and 2b, respectively (, l
In Tc2a or I'l'C2b, which collects commands on either side of Tc2a or 2b and receives them intensively, data address identification means and data processing are used to identify the data address or data flag added to the beginning of the data accompanying the command. The present invention is intended to provide a sharing control system which is provided with a means for selecting the sharing, and which identifies and selects the processing sharing between the 1Tc2a and the ITC2b each time data associated with a command is received.

Let Structure of the Invention The purpose of this invention is to install three intelligent terminal control devices equipped with a plurality of terminal devices for outputting data and a plurality of data processing functions for controlling the collection and distribution of the data of the terminal devices. In a data processing system that is dually controlled by a central processing unit, the intelligent terminal device has a means for identifying a data address associated with data received from the central processing unit, and a means for identifying a data address associated with data received from the central processing unit, and a means for identifying data addresses between the terminal control devices according to an identification signal output from the identifying means. The terminal control device includes means for selecting a data processing assignment, and each time the terminal control device receives data from the central processing unit, the terminal control device causes the identification device to identify the assignment associated with the data, and the selection device sends an identification signal l of the identification device. This can be achieved by providing a shared control method in a data processing system characterized by distributing the data to terminal control devices in charge including self-processing and performing shared processing of the data.

lfl Embodiment of the Invention An embodiment of the invention will be described below with reference to the drawings. FIG. 2 is a block diagram of the switching function of the intelligent terminal control device ITC using the shared control system in one embodiment of the present invention. In the figure, 21 is data address identification means;
2 is a division selection means.

22a is a self-display setting circuit, and 22b is a switching circuit.

4-ANDI~A, N1) 5 is an AND circuit and OR is an OR circuit. The configuration shown in the figure may be provided on either ITc2a or 2b, or may be provided overlappingly.
The side provided in C2a will be explained. The data address identification means 21 identifies the data address or data flag added to the beginning of the input data using, for example, a decoder function, and outputs 1 from the a signal output terminal when it identifies that the data is addressed to system a. When it is determined that the data is addressed to the b system, 1 is output and held from the b signal output terminal. If there is no match, O is output and held. The self-display setting circuit 22a is set with fixed data a indicating that it is lTe2a, and continuously sends out 1. Therefore, when the b signal indicating that the data is to be processed by another system is 1, a logical product is obtained by ANDI and sent as a switching request signal, and when the switching permission signal is received, a logical product is obtained by ANDI (3). is obtained and the input data is sent from AND4 of the switching circuit 22b which sends the data to the other system.

Note that the switching permission signal is also a continuous signal. When the a signal is 1, the b signal is 0, and a logical product is obtained by AND2 with the 1 output from the self-display circuit 22a, but there is no switching permission signal (A
The output of ND3 is 0, and the input data is sent to the self-system processing by AND5. Also, data address identification means 2
When the a and b systems cannot be distinguished from the data input to 1, both the a and b signals of the identification means 21 become 0, but in this case, the eye movement does not occur regardless of the presence or absence of the switching permission signal. It becomes self-processing. Furthermore, ANIJ4. ANI) 5 includes a plurality of gate means corresponding to the number of bits of parallel data, and is provided with an AND circuit to selectively switch the light beams to be used for data processing in accordance with the output of AND3.

Since one embodiment of the present invention is configured as described above, the data applied to ITC 2a7 or ITC 2b is distributed according to its data address, and even in the event of a collision of n1 commands, the data can be processed without requiring a special processing program. A sharing control method is obtained that facilitates the sharing of tasks.

Ig+ As described in detail, according to the present invention, the conflict of commands that occurs during an abnormality in a conventional data processing system that performs dual control can be resolved by the function of a means that identifies and allocates the share for each data. This method is useful because it provides a shared control system that can perform the following tasks.

[Brief explanation of drawings]

FIG. 1 is a conceptual diagram of a shared control system for a data processing system in a conventional system and an embodiment of the present invention, and FIG. 2 is a block diagram of a shared control system in an embodiment of the present invention. In the figure, la and lb are central processing units (CPUs), 2
a, 2b are intelligent terminal controllers (ITC), 3 is Deba (
Ilo) interface, 4°~n is the terminal device (TRM
), 21 is data address identification means, and 22 is allocation selection means.

Claims (1)

[Claims] An intelligent terminal control device equipped with multiple terminal devices that output data and multiple data processing functions that control the collection and distribution of data from the terminal devices is installed. In the processing system, the intelligent terminal control device includes means for identifying a data address associated with data received from the central processing unit, and means for selecting data processing division among the terminal control devices according to an identification signal output from the identification means. Each time the terminal control device receives data from the central processing unit, the terminal control device uses the identification means to identify the assignment according to the data, and the terminal control device uses the selection means to identify the responsibility including self-processing according to the job type signal of the identification means. A sharing control method in a data processing system, characterized in that the data is distributed to a terminal control device and the data is processed in a shared manner.