JPS607384B2 - Glass-sealed semiconductor device - Google Patents

Glass-sealed semiconductor device

Info

Publication number
JPS607384B2
JPS607384B2 JP14776776A JP14776776A JPS607384B2 JP S607384 B2 JPS607384 B2 JP S607384B2 JP 14776776 A JP14776776 A JP 14776776A JP 14776776 A JP14776776 A JP 14776776A JP S607384 B2 JPS607384 B2 JP S607384B2
Authority
JP
Japan
Prior art keywords
glass
semiconductor device
sealed semiconductor
sealing layer
sealed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14776776A
Other languages
Japanese (ja)
Other versions
JPS5372459A (en
Inventor
英治 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14776776A priority Critical patent/JPS607384B2/en
Publication of JPS5372459A publication Critical patent/JPS5372459A/en
Publication of JPS607384B2 publication Critical patent/JPS607384B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 本発明は、半導体べレットを収納したセラミックのベー
スとカバーとの接合面をガラス封止するとともに、一端
側を前記半導体べレットに電気的に接続したりードフレ
ームの池端を前記接合面を通して外部に導出する構成の
ガラス封止型半導体装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention provides a bonding surface between a ceramic base housing a semiconductor pellet and a cover, which is sealed with glass, and one end of which is electrically connected to the semiconductor pellet. The present invention relates to a glass-sealed semiconductor device having a structure in which the edge is led out through the bonding surface.

この種のガラス封止型半導体装置においては、従来、セ
ラミック接合面の全面にガラス封止層を形成している。
In this type of glass-sealed semiconductor device, a glass sealing layer is conventionally formed on the entire surface of the ceramic bonding surface.

しかるに、このような封止構成による場合、リードフレ
ームとガラス封止層の熱膨張係数の違いにより、特に多
ピンのものにおいてクラックを生じ易いという欠点があ
った。クラックの発生は封止を破ることにつながり、半
導体装置の劣化を早める原因となるので、好ましくない
。本発明の目的は、多ピンのものにおいても、リードフ
レームとガラス封止層の熱膨張係数の違いによるクラッ
クを起しにくいガラス封止型半導体装置を提供すること
にある。
However, such a sealing structure has the disadvantage that cracks are likely to occur, especially in those with a large number of pins, due to the difference in coefficient of thermal expansion between the lead frame and the glass sealing layer. The occurrence of cracks is undesirable because it leads to breaking the sealing and accelerates the deterioration of the semiconductor device. An object of the present invention is to provide a glass-sealed semiconductor device that is less prone to cracking due to the difference in thermal expansion coefficient between a lead frame and a glass sealing layer, even in a device with a large number of pins.

本発明は、リードフレームとガラス封止層との接触面積
が大きければ大きい程熱膨張係数の違いによる接触部の
ストレスが大きくなることから、リードフレームの強度
および封止効果を損わない程度にリードフレームとガラ
ス封止層との接触面積をできるだけ少なくすればよいと
の考えに基づいて、ガラス封止層を、セラミックベース
とカバーとの接合面の全面に施すことなく、主として半
導体べレット配置部の周辺部と接合面の外周綾部にのみ
施すことによって上記目的を達成したものである。
As the contact area between the lead frame and the glass sealing layer increases, the stress at the contact area due to the difference in thermal expansion coefficient increases. Based on the idea that the contact area between the lead frame and the glass sealing layer should be as small as possible, the glass sealing layer is not applied to the entire surface of the bonding surface between the ceramic base and the cover, and the semiconductor pellet is mainly arranged. The above object has been achieved by applying the adhesive only to the periphery of the joint and the outer periphery of the joint surface.

以下、図面を参照して本発明の一実施例を説明する。Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

図は本発明による半導体装置の一製造過程の状態を示す
ものである。
The figure shows a state of one manufacturing process of a semiconductor device according to the present invention.

11はセラミックベースである。11 is a ceramic base.

このベース11の中央凹所12内に図示していない半導
体べレットが収納されらる。半導体べレットにはリード
フレ−ム13が電気的に接続され、ベース11の上面に
沿って配置されて外部に導出される。ベース11の上面
には半導体べレットを収納した中央凹所12の周辺部と
外周緑部のみに比較的狭い幅で全周につながるガラス封
止層16,17が施され、そのほかは必要に応じて適当
に点状のガラス層18が点在するだけで、残りの部分に
はガラス封止層は施されない。このようなベース1 1
上にこれとほぼ同一平面形状を特つ図示していないセラ
ミックカバーが被されて所期のガラス封止型半導体装置
が完成される。このような構成による場合、ガラス封止
層16,17は共に封止作用を果たすのはもちろんであ
るが、どちらかと言えば封止作用は主として内側の封止
層16が受持ち、外側の封止層17は主としてリードフ
レーム13を所定位置に押えておくのに役立つ。また、
ガラス層18は主としてスベーサとして作用する。以上
の構成による本発明の半導体装置は図からもよく分るよ
うにリードフレーム13とガラス封止層16,17との
接触面積が可及的に減少されるので、両者の熱膨張係数
の違いによるクラックは著しく生じにくくなる。
A semiconductor pellet (not shown) is housed in the central recess 12 of the base 11. A lead frame 13 is electrically connected to the semiconductor pellet, arranged along the upper surface of the base 11, and led out. On the upper surface of the base 11, glass sealing layers 16 and 17 are applied only around the periphery of the central recess 12 in which the semiconductor pellet is housed and the outer peripheral green area, and the glass sealing layers 16 and 17 are connected to the entire circumference with a relatively narrow width, and other areas are applied as needed. Only dotted glass layers 18 are scattered at appropriate locations, and no glass sealing layer is applied to the remaining portions. Base like this 1 1
A ceramic cover (not shown) having substantially the same planar shape as this is placed thereon to complete the desired glass-sealed semiconductor device. In such a configuration, both the glass sealing layers 16 and 17 naturally perform a sealing action, but if anything, the sealing action is mainly carried out by the inner sealing layer 16, while the outer sealing layer 16 is responsible for the sealing action. Layer 17 primarily serves to hold lead frame 13 in place. Also,
The glass layer 18 primarily acts as a substrate. As can be clearly seen from the figure, in the semiconductor device of the present invention having the above configuration, the contact area between the lead frame 13 and the glass sealing layers 16 and 17 is reduced as much as possible, so that the difference in thermal expansion coefficient between the two is reduced. cracks are significantly less likely to occur.

したがって例えば数十ピン以上もの多ピン化も可能とな
る。
Therefore, it is possible to increase the number of pins, for example, to several tens of pins or more.

【図面の簡単な説明】[Brief explanation of drawings]

図は本発明によるガラス封止型半導体装置の一実施例の
一製造過程における状態を示す斜視図である。 符号の説明、11…・・。
The figure is a perspective view showing a state in a manufacturing process of an embodiment of a glass-sealed semiconductor device according to the present invention. Explanation of symbols, 11...

Claims (1)

【特許請求の範囲】[Claims] 1 半導体ペレツトを収納したセラミツクのペースとカ
バーとの接合面をガラス封止層によってガラス封止する
とともに、一端側を前記半導体ペレツトに電気的に接続
したリードの他端側を前記接合面を通して外部に導出す
るように構成されたガラス封止型半導体装置において、
前記リードが配設される部分の前記ガラス封施層を、前
記接合面の1部のみに形成したことを特徴とするガラス
封止型半導体装置。
1. The bonding surface between the ceramic paste housing the semiconductor pellet and the cover is glass-sealed with a glass sealing layer, and the other end of the lead, one end of which is electrically connected to the semiconductor pellet, is passed through the bonding surface to the outside. In a glass-sealed semiconductor device configured to lead to
A glass-sealed semiconductor device characterized in that the glass-sealing layer in a portion where the leads are provided is formed only on a part of the bonding surface.
JP14776776A 1976-12-10 1976-12-10 Glass-sealed semiconductor device Expired JPS607384B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14776776A JPS607384B2 (en) 1976-12-10 1976-12-10 Glass-sealed semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14776776A JPS607384B2 (en) 1976-12-10 1976-12-10 Glass-sealed semiconductor device

Publications (2)

Publication Number Publication Date
JPS5372459A JPS5372459A (en) 1978-06-27
JPS607384B2 true JPS607384B2 (en) 1985-02-23

Family

ID=15437705

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14776776A Expired JPS607384B2 (en) 1976-12-10 1976-12-10 Glass-sealed semiconductor device

Country Status (1)

Country Link
JP (1) JPS607384B2 (en)

Also Published As

Publication number Publication date
JPS5372459A (en) 1978-06-27

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