JPS6077441A - Semiconductor wafer - Google Patents

Abstract

PURPOSE:To avoid the crystalline defect of a pellet by forming deep grooves under scribing lines when forming the scribing lines to divide a semiconductor wafer into a plurality of pellets, thereby preventing a slip line from running for a long period of time. CONSTITUTION:An epitaxial layer 12 is grown on an Si substrate 11, and scribing lines 4 are laterally and longitudinally formed to divide a semiconductor wafer 10 into a plurality of pellets. At this time, deep grooves 13 are cut under the lines 4. If the thickness (a) of the substrate 11 is 400-500mum and the thickness (b) of the layer 12 is 10-15mum, the depth of the grooves 13 is decided to approx. 100mum. Thus, slip lines occurred due to thermal distortion or machanical distortion produced in the step of forming elements on the wafers 10 can be stopped at the grooves 13, and the defects occur only at the peripheral edges of the wafer 10, thereby largely improving the yield of the elements.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor wafer, and particularly to a semiconductor wafer with fewer crystal defects.

Generally, crystal defects occur during the process of growing and forming elements on a semiconductor wafer. These crystal defects can be confirmed as white linear portions 2 at the peripheral edge of the semiconductor wafer 1, as shown in FIG. 1, by performing a special etching called dilt etch. This linear portion is called a slip line, and this slip line 2 is a line in which small triangular crystal defects called dislocations appear to be connected in a straight line. These crystal defects are caused by distortion in the crystal structure of the semiconductor wafer when thermal strain or mechanical force is applied during the device growth process, resulting in defects called dislocations. If an element with such crystal defects is used in a circuit, a problem will occur in which current leaks due to the crystal defects, so elements containing such crystal defects are removed as defective products in advance during the manufacturing process. It turns out.

As mentioned above, crystal defects occur linearly as slip lines, so if these slip lines occur frequently,
The yield of non-defective devices decreases. Therefore, it is desirable that the number of slip lines be small and short.

Therefore, an object of the present invention is to provide a semiconductor wafer with short slip lines, that is, with fewer crystal defects.

In order to achieve the above object, in the semiconductor wafer of the present invention, deep grooves are formed below the scribe lines for partitioning a plurality of elements.

Hereinafter, this invention will be explained in detail with reference to Examples.

FIG. 2 is a sectional view of a semiconductor wafer 10 showing one embodiment of the present invention. The figure shows a silicon (St) substrate 11.
Second, the epitaxial layer 12 is shown grown and formed.

Generally, as shown in FIG. 1, a semiconductor wafer 1 has scribe lines 4 formed in a grid pattern for dividing a plurality of element formation regions 3.

The example semiconductor wafer 10 also has a scribe line similar to the above scribe line 4 on the upper surface, and a deep groove 13 is formed below the scribe line 4. Substrate 11
The thickness a of the deep groove 13 is 400 to 500 μm, and the thickness b of the epitaxial layer 12 is 10 to 15 μm, whereas the depth C of the deep groove 13 is 400 to 500 μm.
For example, the thickness is approximately 100 μm, which is sufficiently deep relative to the thickness of the epitaxial layer 12. However, if the depth is too deep, the mechanical strength of the substrate 11 may decrease and cracks may occur, so the depth is set to the above level.

The deep grooves 13 are formed by plasma etching the silicon substrate 11. Further, in this embodiment, the deep groove 13 is formed after the epitaxial layer MI2 is grown, but it may be etched before the epitaxial layer 12 is grown.

In the process of growing and forming elements on this semiconductor wafer, thermal strain and mechanical strain occur, and even if a slip line runs from the peripheral edge toward the center, the slip line will be stopped by the deep groove 13. .

As described above, according to the semiconductor wafer of the present invention, since the deep grooves are formed under the scribe lines, even in a situation where slip lines occur, the deep grooves 13 can prevent the slip lines from running long, and the crystal Since defects occur in the minimum number of elements around α (4), the yield of the elements can be greatly improved.

[Brief explanation of drawings]

Fig. 1 is a plan view of a semiconductor wafer, and Fig. 2 is a plan view of a semiconductor wafer.
1 is a cross-sectional view of a semiconductor wafer showing an example. ■・10: Semiconductor wafer, 3: Element formation area, 4 varnish line, 11: Substrate, 12: Epitaxial layer, 13: Deep groove patent applicant ROHM Co., Ltd. Representative Patent attorney Shigeru Nakatoshi, Figure 1, Table 2

Claims (1)

[Claims] (1) A semiconductor wafer in which a plurality of element formation regions are defined by scribe lines, characterized in that deep grooves are formed below the scribe lines.