JPS6079751A - Package for microwave semiconductor device - Google Patents
Package for microwave semiconductor deviceInfo
- Publication number
- JPS6079751A JPS6079751A JP58186557A JP18655783A JPS6079751A JP S6079751 A JPS6079751 A JP S6079751A JP 58186557 A JP58186557 A JP 58186557A JP 18655783 A JP18655783 A JP 18655783A JP S6079751 A JPS6079751 A JP S6079751A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- input
- package
- semiconductor element
- substrates
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W44/00—Electrical arrangements for controlling or matching impedance
- H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W44/00—Electrical arrangements for controlling or matching impedance
- H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
- H10W44/226—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF] for HF amplifiers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/737—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a laterally-adjacent lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はマイクロ波帯に使用される半導体装置用パッケ
ージに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a package for a semiconductor device used in a microwave band.
従来、マイクロ波帯において増幅・発振が可能な半導体
素子として１例えは砒化ガリウム電界効果トランジスタ
（以下、ＧａＡｓＦＢＴという）が用いられている。こ
のＧａＡｓＦＢＴに高出力広帯域特性をもたせるために
、この半導体素子と外部回路との間に存在する寄生的な
回路の介在を避けてＧａＡ１ＦＥＴに直接整合回路を接
続した内部整合回路化が行なわれ実用化されている。Conventionally, a gallium arsenide field effect transistor (hereinafter referred to as GaAsFBT) has been used as a semiconductor element capable of amplification and oscillation in the microwave band. In order to provide this GaAsFBT with high output broadband characteristics, an internal matching circuit was created in which a matching circuit was directly connected to the GaA1FET, avoiding the intervention of parasitic circuits existing between this semiconductor element and the external circuit, and it was put into practical use. has been done.
第１図は従来使用されている半導体装置用パッケージの
一例を示す断面図である。図において、１は放熱板、２
は側壁金具、３は絶縁ガラス、４はパッケージの入出力
リード端子、５は金属線、６は半導体素子、７は入出力
整置回路全構成する基板で、例えばアルミナ基板上に金
属膜回路ｔ−構成したもの、８は半導体素子６及び基板
７會放熱板１に固定するロー材である。FIG. 1 is a sectional view showing an example of a conventionally used package for a semiconductor device. In the figure, 1 is a heat sink, 2
3 is a side wall fitting, 3 is an insulating glass, 4 is an input/output lead terminal of the package, 5 is a metal wire, 6 is a semiconductor element, 7 is a board that makes up all the input/output alignment circuits, for example, a metal film circuit t is placed on an alumina substrate. - Components 8 are brazing materials for fixing the semiconductor element 6 and the substrate 7 to the heat sink 1.
従来のパッケージは、放熱板１１側壁金具２、絶縁ガラ
ス３．入出力リード端子４で構成され、このパッケージ
の中には内部整合回路となる基板７、半導体素子６・を
収容し、これら全ロー材８で放熱板ｌに固定し、さらに
これらを金属線５で接続している。しかし、このパッケ
ージ内にこれらの部品全組立てる際自動マウント及び自
動ボンダを使用するには次のような問題がある。The conventional package includes a heat sink 11 side wall fittings 2, insulating glass 3. Consisting of input/output lead terminals 4, this package accommodates a substrate 7 and a semiconductor element 6, which serve as an internal matching circuit, all of which are fixed to a heat sink l with brazing material 8, and are further connected with metal wires 5. It is connected with However, the use of automatic mounting and automatic bonding when assembling all of these parts within this package has the following problems.
１）位置合せの精度がでない。1) Positioning accuracy is poor.
マイクａ波における特性は、半導体素子６と基板７の距
離及び金属線５（特に半導体素子６と基板７とｔ接続す
る金属線５）の長さにより決定され、その精度は約±１
ｏμｍｆ必要とする。しかし、放熱板ｌの加工精度や放
熱板ｌと側壁金属２との位置合せの精度は、マイクロ波
特性全決定する精度よシ非常に悪く、その精度は最低で
も約±１００μｍとなっている。そのため半導体素子６
と基板７と全パッケージに固定する自動マウンタやこれ
らｔ金属線５で接続する自動ボンダ上用いる際にマイク
ロ波特性を決定する位置精度出すことが出来なかつ友。The characteristics of the microphone A-wave are determined by the distance between the semiconductor element 6 and the substrate 7 and the length of the metal wire 5 (particularly the metal wire 5 connecting the semiconductor element 6 and the substrate 7), and the accuracy thereof is approximately ±1.
oμmf is required. However, the processing accuracy of the heat sink l and the alignment accuracy between the heat sink l and the side wall metal 2 are much worse than the accuracy of determining the entire microwave characteristics, and the accuracy is at least about ±100 μm. . Therefore, the semiconductor element 6
When used on an automatic mounter that fixes the substrate 7 and all packages, or an automatic bonder that connects these with the metal wire 5, it is difficult to achieve positional accuracy to determine the microwave characteristics.
２）パッケージが平面構造でない。2) The package is not a flat structure.
第１図のパッケージにおいて、側壁金具２によって半導
体素子６と基板７と全固定する位置が凹部となっている
几め、自動マウンタや自動ボンダを組立に導入する際の
動作、操作が困難である。In the package shown in Fig. 1, the position where the semiconductor element 6 and the substrate 7 are completely fixed by the side wall fitting 2 is a recess, which makes it difficult to operate an automatic mounter or an automatic bonder when introducing it into assembly. .
本発明の目的は、これらの欠点を除去し、組立時の自動
機の導入を容易にし、かつ半導体素子のもつ特性を損わ
ずに信号ｒ外部へ取出すことのできるマイクロ波半導体
装置用パッケージを提供することにある。An object of the present invention is to provide a package for a microwave semiconductor device that eliminates these drawbacks, facilitates the introduction of automatic machines during assembly, and allows signals to be taken out without impairing the characteristics of semiconductor elements. It is about providing.
本発明のマイクロ波半導体装置用パッケージの構成は、
入出力整合回路及び半導体素子からなるマイクロ波回路
を組立てた金属板部材と、この金属板部材を接合する金
属放熱板と、この金属放熱板を囲み大川カリード端子七
設けた側壁部からなる容器とを備えることを特徴とする
。The structure of the microwave semiconductor device package of the present invention is as follows:
A container consisting of a metal plate member assembled with a microwave circuit consisting of an input/output matching circuit and a semiconductor element, a metal heat sink to which the metal plate member is joined, and a side wall surrounding the metal heat sink and provided with an Okawa Khalid terminal. It is characterized by having the following.
次に本発明を図面により詳細に説明する。Next, the present invention will be explained in detail with reference to the drawings.
第２図は本発明の一実施例の断面図である。この実施例
は、従来の凸形放熱板１を平板状放熱板９とこの放熱板
９に重ねた金属片１０とに分けたことを特徴とする。こ
の金属片１０には半導体素子６及び入出力整合回路ｔ−
構成する基板７ｔ−ロー材８で固定し、これらの間七金
属線５で接続する。FIG. 2 is a sectional view of one embodiment of the present invention. This embodiment is characterized in that the conventional convex heat sink 1 is divided into a flat heat sink 9 and a metal piece 10 overlaid on the heat sink 9. This metal piece 10 includes a semiconductor element 6 and an input/output matching circuit t-
The constituent substrate 7t is fixed with a brazing material 8, and these are connected with a metal wire 5.
この金属片１０は平面的であｐｌその加工精度が十分に
あれ＃ｉ、、自動マウンタ及びボンダによル半導体素子
６と基板７との距離及び接続金線５の長さ全精度よく決
めることが可能である。これら半導体素子６と基板７と
を金属片ｌＯに固定した後、放熱板９と、絶縁ガラス３
および入出力リード端子４′？ｆ：設は九個壁金具２と
からなる容器に、金属片１０ｔ０−材１１で固定し、入
出力リード端子４と基板７と金金属＃！５′により接続
して構成する。この時の位置積置及び金属線の長さは充
分精度よく出来るので、マイクロ波特性には影響するこ
とはない。This metal piece 10 is flat and has sufficient processing accuracy. The distance between the semiconductor element 6 and the substrate 7 and the length of the connecting gold wire 5 must be determined with good accuracy using an automatic mounter and bonder. is possible. After fixing the semiconductor element 6 and the substrate 7 to the metal piece lO, the heat sink 9 and the insulating glass 3
and input/output lead terminal 4'? f: The setup is a container consisting of nine wall fittings 2, fixed with metal pieces 10t0-material 11, input/output lead terminals 4, board 7, and gold metal #! 5'. At this time, the position and the length of the metal wire can be determined with sufficient precision, so that the microwave characteristics are not affected.
第３図は本発明の第２の実施例の断面図で、半導体素子
を複数個（３個）使用する場合を示している。この実施
例の場合、第２図と同様に、３個の金属片１０の上にそ
れぞれ半導体素子６と入出力整合回路ｔ−構成する基板
７と全ロー材８で固定し金属線５で接続したものを、大
きな放熱板１２と、絶縁ガラス３、入出力リード端子４
を設けた側壁金具２とからなる容器にロー材１１で固定
し。FIG. 3 is a sectional view of a second embodiment of the present invention, showing a case where a plurality of (three) semiconductor elements are used. In the case of this embodiment, similarly to FIG. 2, the semiconductor element 6 and the input/output matching circuit t are fixed on the three metal pieces 10 with the substrate 7 that constitutes the input/output matching circuit t, and are all fixed with brazing material 8 and connected with the metal wire 5. A large heat sink 12, insulating glass 3, input/output lead terminals 4
It is fixed with brazing material 11 to a container consisting of side wall fittings 2 provided with.
それぞれ金属線１３で接続して構成される。They are connected by metal wires 13, respectively.
この時、各金属片との半導体素子及び基板を金属線によ
シ接続した回路は入出力のインピーダンス整合がとれて
おり、これを直接接続しても接続点においてマイクロ波
特性を損なうことはないつしたがって、３個の半導体素
子の回路は、容器内で接続するだけで外部に引き出すこ
とができる。At this time, the circuit in which the semiconductor element and substrate are connected to each metal piece through metal wires has input and output impedance matching, so even if they are connected directly, the microwave characteristics will not be impaired at the connection point. Therefore, the circuits of the three semiconductor elements can be drawn out by simply connecting them inside the container.
以上詳細に説明したように１本発明によれば。According to one aspect of the present invention, as described in detail above.
マイクロ波帯に使用する半導体装置用パッケージとして
１組立が容易なパッケージを得ることが出来る。A package that is easy to assemble can be obtained as a package for a semiconductor device used in the microwave band.
第１図は従来のマイクロ波半導体装置用パッケージの一
例、第２図は本発明の第１の実施例の断面図、第３図は
本発明の第２の実施例の断面図である。図において
１、 ９． １２・・・・・・放熱板、２・・・・・・
側壁金具、３・・・・・・絶縁ガラス、４・・・・・・
入出力リード端子、５゜５’、１３・・・・・・金属線
、６・・・・・・半導体素子、７・・・・・・入出力整
合回路を構成する基板、８．１１・・・・・・回定用ロ
ー材、１０・・・・・・金属片、である。FIG. 1 is an example of a conventional package for a microwave semiconductor device, FIG. 2 is a sectional view of a first embodiment of the present invention, and FIG. 3 is a sectional view of a second embodiment of the present invention. In the figure 1, 9. 12... Heat sink, 2...
Side wall fittings, 3... Insulating glass, 4...
Input/output lead terminal, 5°5', 13...Metal wire, 6...Semiconductor element, 7...Substrate constituting input/output matching circuit, 8.11. ... Brazing material for rotation, 10 ... Metal piece.
Claims (1)
全組立てた金属板部材と、この金属板部材を接合する金
属放熱板と、この金属放熱板？囲み入出力リード端子を
設は九個壁部からなる容器とｔ備えることを特徴とする
マイクロ波半導体装置用パッケージ。A metal plate member that is a complete assembly of a microwave circuit consisting of an input/output matching circuit and semiconductor elements, a metal heat sink that joins this metal plate member, and this metal heat sink? A package for a microwave semiconductor device, characterized in that it is equipped with a container consisting of nine walls and a container having enclosed input/output lead terminals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58186557A JPS6079751A (en) | 1983-10-05 | 1983-10-05 | Package for microwave semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58186557A JPS6079751A (en) | 1983-10-05 | 1983-10-05 | Package for microwave semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6079751A true JPS6079751A (en) | 1985-05-07 |
Family
ID=16190602
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58186557A Pending JPS6079751A (en) | 1983-10-05 | 1983-10-05 | Package for microwave semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6079751A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02244711A (en) * | 1989-03-17 | 1990-09-28 | Mitsubishi Electric Corp | Semiconductor package |
-
1983
- 1983-10-05 JP JP58186557A patent/JPS6079751A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02244711A (en) * | 1989-03-17 | 1990-09-28 | Mitsubishi Electric Corp | Semiconductor package |
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