JPS6080227A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6080227A
JPS6080227A JP58188249A JP18824983A JPS6080227A JP S6080227 A JPS6080227 A JP S6080227A JP 58188249 A JP58188249 A JP 58188249A JP 18824983 A JP18824983 A JP 18824983A JP S6080227 A JPS6080227 A JP S6080227A
Authority
JP
Japan
Prior art keywords
film
metal
protrusions
substrate
metal film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58188249A
Other languages
Japanese (ja)
Inventor
Michiari Kono
通有 河野
Shigeo Kashiwagi
柏木 茂雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58188249A priority Critical patent/JPS6080227A/en
Publication of JPS6080227A publication Critical patent/JPS6080227A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent generation of projections produced on a wiring metal by forming a sandwich construction of a semiconductor substrate-metallic oxide by coating the first metallic film with the second metallic oxide film. CONSTITUTION:A patterned Al film 22 is formed on a substrate 21. Then a metal which is oxidized wholly at a lower temperature than that for oxidizing Al which composes the film 22, e.g. Ta 23 is spreaded over the whole surface of the substrate 21 by spattering. When it is oxidized, Ta changes into Ta2O5 24. This film 24 functions so as to prevent generation of projections. In addition, window opening of the film 24 can be done by the same etching as of a PSG film as a cover at a time and there is no trouble in later processes. Also for Ta, a DC magnetron spattering device offering a large coating rate can be used similarly in the case for Al and it is suitable for mass-production processes.

Description

【発明の詳細な説明】 (11発明の技術分野 配線月利として金属膜を使用する半導体装置の製造方法
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (11) Technical Field of the Invention This invention relates to a method of manufacturing a semiconductor device using a metal film as a wiring layer.

(2)技術の背景 半導体装置の配線材料として多くの利点をもつアルミニ
ウム(AI)が広く使用されているのでここではAIを
例にとり説明する。AIは基板に被着後配線パタニング
されその上に、気相成長法で400℃程度でバソシベー
シッン模が被着される。この時非晶質Δlの再結晶化が
起り、この結晶粒が表面の弱い部分を熱応力により押し
出し凸起を形成する。大きなものはその高さが11.t
mにも及ぶ。この凸起はAI膜上のパッシベーション膜
に欠陥を与え、また多層配線構造では層間絶縁不良や配
線のlff1蝕の原因となる。第1図において1は半導
゛体基板(以下載板と略記)を示し第11h目の凸起の
あるAI膜2の上に絶縁膜4を被着すると凸起に倣って
絶縁膜も突出し1.この上にレジスト5を塗布するとレ
ジストはこの部分だけ薄く被着するため、他の部位をエ
ツチングする際例えば第1層目Δ1膜3上の絶縁膜に窓
あげ用のエツチングをするときエツチング液あるいはエ
ツチング・ガスに凸起部の絶縁膜が犯され、この部分で
第21Fi目のAI膜(図示されていない)が第1層目
のAI膜と短絡することになる。このため凸起生成を防
止する方法が必要となる。
(2) Background of the Technology Aluminum (AI) is widely used as a wiring material for semiconductor devices because it has many advantages, so AI will be explained here as an example. After the AI is deposited on the substrate, wiring patterning is performed, and a bathobasic pattern is deposited thereon at about 400° C. by vapor phase growth. At this time, recrystallization of the amorphous Δl occurs, and the crystal grains push out the weak portions of the surface due to thermal stress, forming protrusions. The height of the large one is 11. t
It reaches up to m. These protrusions cause defects in the passivation film on the AI film, and also cause poor interlayer insulation and lff1 corrosion of the wiring in a multilayer wiring structure. In Fig. 1, numeral 1 indicates a semiconductor substrate (hereinafter abbreviated as a mounting board), and when an insulating film 4 is deposited on the 11th h-th AI film 2 having protrusions, the insulating film also protrudes following the protrusions. 1. When the resist 5 is applied on top of this, the resist is thinly applied only to this part, so when etching other parts, for example, when etching the insulating film on the first layer Δ1 film 3 for window opening, it is necessary to use an etching solution or The etching gas damages the insulating film at the convex portion, and the 21st Fi-th AI film (not shown) is short-circuited with the first-layer AI film at this portion. Therefore, a method for preventing the formation of protrusions is required.

(3)従来技術と問題点 AIの凸起生成防止方法としてΔ1上に被膜を覆って凸
起を抑え込むと云う考え方に従って、適宜な被膜の材料
が検討されている。例えばAI股上をスパッタにより酸
化シリコン(S i O,)膜−ション膜とし“C第1
15日Δl膜をカバーしまた第2層目AI膜との間の絶
縁のため用いられるものである。スパッタによる5i0
211Jば凸起防止の効果はあるがその被着にAl用と
は別の専用のスパッタ装置を必要とし、従って工程が複
雑となる。AIと同一の装置を使用して、しかも凸起防
止に有効な被膜の検討が望まれる。
(3) Prior Art and Problems In accordance with the concept of suppressing the protrusions by covering Δ1 with a film as a method for preventing the formation of protrusions in AI, appropriate materials for the coating have been studied. For example, a silicon oxide (S i O,) film is formed on the upper part of the AI by sputtering.
It covers the 15-day Δl film and is used for insulation between it and the second layer AI film. 5i0 by sputtering
Although 211J has the effect of preventing protrusions, it requires a special sputtering device different from that for Al, and therefore the process becomes complicated. It is desired to study a coating that is effective in preventing protrusions using the same equipment as AI.

この他にA1表面を陽極酸化する方法も提案されている
が、特別の装置を必要としこの方法もまた工程が複雑と
なる。しかもこの方法ではAIをパタニングする以前に
しかできないので、パタニング後A1の側面は何も覆わ
れ”ζいないことになり、ここに凸起が発生ずる欠点が
ある。
In addition, a method of anodic oxidizing the A1 surface has been proposed, but this method requires special equipment and the process is also complicated. Moreover, since this method can be performed only before patterning AI, the side surfaces of A1 are not covered with anything after patterning, and there is a drawback that protrusions occur there.

(4) 発明の目的 本発明が上記従来の欠点を除き、配線用金属膜に生成す
る凸起の発生を防止する製造方法を提供することを目的
とするものである。
(4) Object of the Invention It is an object of the present invention to provide a manufacturing method that eliminates the above-mentioned conventional drawbacks and prevents the occurrence of protrusions on a metal film for wiring.

着し該第iの金属膜をパタニング後、該第1の金属膜を
構成する金属より低温で金属全体が酸化する第2の金属
膜を少くとも該第1の金属膜を覆って被着し該第2の金
属膜を酸化する工程を有することを特徴とするものであ
る。
After depositing and patterning the i-th metal film, a second metal film, the entire metal of which is oxidized at a lower temperature than the metal constituting the first metal film, is deposited to cover at least the first metal film. This method is characterized by including a step of oxidizing the second metal film.

本発明は第1の金属膜において発生ずる凸起の防止に関
するものである。凸起の種類として(al被着時に発生
ずるもの、(b)被着後の熱処理により発生ずるもの、
(C)配線膜に電界が加えられて金属内で金属イオンの
流れに不均一ができ金属イオンの集中のため生ずるもの
等があげられるが半導体装置製作−に最も大きな問題と
なるのはlb)の種類である。この場合の発生原因は次
のように考えられる。
The present invention relates to prevention of protrusions occurring in the first metal film. Types of protrusions include (b) those that occur during Al deposition, (b) those that occur due to heat treatment after deposition,
(C) The electric field applied to the wiring film causes non-uniformity in the flow of metal ions within the metal, resulting in the concentration of metal ions, etc., but the biggest problem in semiconductor device manufacturing is lb) It is a type of The cause in this case is thought to be as follows.

金属は半導体基板に比し熱膨張係数が大きいから加熱時
金属膜は圧縮応力をうL)、その応力を緩和するために
凸起ができると考えられる。冷却は凸起の高さは多少減
小するが凸起は残ったままになる。
Since metal has a larger coefficient of thermal expansion than a semiconductor substrate, the metal film experiences compressive stress when heated (L), and it is thought that protrusions are formed to relieve that stress. Cooling reduces the height of the protrusions somewhat, but the protrusions remain.

凸起発生の防止策として金属膜被着時の基板温度と後工
程の熱処理温度の差を小さくすれば熱処理時の熱応力も
小さくなり凸起の発生が抑えられる。そのため基板を加
熱しながら金属を被着する方法がとられCいるが、例え
ばシリコン(Sl)基板上にAIを蒸着する場合基板温
度を200〜400℃に加熱しながら蒸着を行っても凸
起の密度は105〜I Q3cm”l呈度となり、効果
は十分とは云えない。さらに効果をあげるため本発明は
第1の金属膜上に第2の金属の酸化物の膜を被着して、
半導体基板−金属−金属酸化物のサントイ・ノチ構造に
し、加熱によって生ずる熱応力を緩和しようとするもの
でこ目的の金属酸化物の膜を被着する方法を提案するも
のである。
As a measure to prevent the occurrence of protrusions, if the difference between the substrate temperature at the time of metal film deposition and the heat treatment temperature in the subsequent step is reduced, the thermal stress during the heat treatment will also be reduced, thereby suppressing the occurrence of protrusions. For this reason, a method of depositing metal while heating the substrate is used, but for example, when depositing AI on a silicon (Sl) substrate, protrusions may occur even if the deposition is performed while heating the substrate temperature to 200 to 400 degrees Celsius. The density of the metal is 105 to IQ3cm"l, and the effect cannot be said to be sufficient. In order to further improve the effect, the present invention coats a second metal oxide film on the first metal film. ,
This paper proposes a method for forming a semiconductor substrate-metal-metal oxide Santo-Nochi structure and depositing a metal oxide film for this purpose in order to alleviate thermal stress caused by heating.

(6) 発明の実施例 本発明の実施例とし°C配線材料としてAIを用いて説
明する。第2図(81は基板21の上にAI膜22がパ
タニングされた状態を示し、厚さは約1μInである。
(6) Embodiments of the Invention An embodiment of the present invention will be described using AI as the °C wiring material. FIG. 2 (81 shows the state in which the AI film 22 is patterned on the substrate 21, and the thickness is about 1 μIn.

つぎに第2図(blにおい゛ζ基板全面にスパッタによ
りクンタル(Ta) 23ヲl OOO程度度被着し、
酸素中で450℃30分加熱すると第2図(C1に示さ
れるように]aはタンタル酸化物(Taz’05>24
に変る。このT a z Oc、膜が凸起の生成を防止
する役目をするものである。
Next, as shown in Fig. 2 (BL), Kuntal (Ta) was deposited on the entire surface of the ζ substrate by sputtering to a degree of OOO.
When heated in oxygen for 30 minutes at 450°C, a becomes tantalum oxide (Taz'05>24
Changes to This T a z Oc film serves to prevent the formation of protrusions.

しかも’I’ a□09膜の窓あけはカバーのPSG膜
と同一エツチングで同時に行え、後の工程に支障を来さ
ない。また1’aは絶縁物でないためAIと同じように
被着レートの大きいDCマグネトロン・スパッタ装置を
用いることができ量産工程に適している。
Moreover, the opening of the 'I' a□09 film can be performed at the same time as the PSG film of the cover by the same etching, so that it does not interfere with subsequent processes. Furthermore, since 1'a is not an insulator, a DC magnetron sputtering device with a high deposition rate can be used like AI, making it suitable for mass production processes.

実施例においCは第1の金属膜としてAIを用いたがこ
れをA I S i s A 1〜銅(Cu)、Al−
マグネシウム(Mg)等凸起の出やすい他の材料に変え
てもよく、また第2の金属膜としてTaを用いたがこれ
を他の金属に変更してもよい。
In the example, C used AI as the first metal film, but this was
It is also possible to use another material such as magnesium (Mg) that tends to cause protrusions, and although Ta is used as the second metal film, it may be replaced with another metal.

例えば比較的低温で酸化する高融点の遷移金属Ti、W
等も極めて有効である。
For example, high melting point transition metals Ti and W that oxidize at relatively low temperatures
etc. are also extremely effective.

以上i5i!’!ljしたように本発明による方法は配
線qy/の金属膜に生成する凸起の発生を防止し、かつ
早産工程に)西したものである。
That's all i5i! '! As described above, the method according to the present invention prevents the occurrence of protrusions on the metal film of the wiring qy/, and is suitable for the premature birth process.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は凸起の害を説明する半導体基板の断面図、第2
1ツ1は本発明による製造方法を断面図で工程順に示す
。 ■、21・・・半導体貼仮、 2、 3. 22・・・AI膜、 4・・・PSG欣、 5・・・レジスト 23・・・′ra映、 2 4 ・=・ゴa20g1%。 第 1 図 第?図
Figure 1 is a cross-sectional view of a semiconductor substrate to explain the damage caused by protrusions;
1 shows the manufacturing method according to the present invention in the order of steps in cross-sectional views. ■, 21... Semiconductor pasting temporary, 2, 3. 22...AI film, 4...PSG film, 5...Resist 23...'ra film, 24...Go a20g1%. Figure 1 No.? figure

Claims (1)

【特許請求の範囲】[Claims] 半導体基板」二に配線林料用の第1の金属膜を被着し該
第1の金属膜をパタニング後、該第1の金属膜を構成す
る金属より低温で金属全体が酸化する第2の金属膜を少
くとも該第1の金属膜を覆って被着し該第2の金属膜を
酸化する工程を有することを特徴とする半導体装置の製
造方法。
After depositing a first metal film for wiring material on a semiconductor substrate and patterning the first metal film, a second metal film is formed in which the entire metal is oxidized at a lower temperature than the metal constituting the first metal film. 1. A method of manufacturing a semiconductor device, comprising the steps of depositing a metal film covering at least the first metal film and oxidizing the second metal film.
JP58188249A 1983-10-07 1983-10-07 Manufacture of semiconductor device Pending JPS6080227A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58188249A JPS6080227A (en) 1983-10-07 1983-10-07 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58188249A JPS6080227A (en) 1983-10-07 1983-10-07 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6080227A true JPS6080227A (en) 1985-05-08

Family

ID=16220387

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58188249A Pending JPS6080227A (en) 1983-10-07 1983-10-07 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6080227A (en)

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