JPS608771A - Measuring device of time difference - Google Patents

Abstract

PURPOSE:To measure a time difference with high precision without raising so much the frequency of a clock signal to be supplied to a counter by providing the counter, the first latch circuit, an adder, and the second latch circuit and outputting a time difference detection signal from the adder. CONSTITUTION:An M-fold counted value of a counted value latched with a sampling frequency fso is held in a latch circuit 4. A time difference l'n is the sum of a time difference l'n-1 and a normalized period To/Ti, which is obtained by normalizing an output sampling period To with an input sampling period Ti, in accordance with a formula; and since the period To/Ti is obtained only by shifting right the output of the latch circuit 4 by m-number of bits, the period To/Ti (parallel output) is shifted right by m-number of bits and is supplied to an adder 5, and the time difference l'n-1 (parallel output) latched already in a latch circuit 6 is supplied to the adder 5, and they are added to obtain the time difference l'n (parallel output). This time difference l'n is latched in the latch circuit 6 by the third clock signal having frequency fso and is supplied to the adder and is used for obtaining a time difference ln+1.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a time difference measuring device suitable for use in data interpolation processing devices.

BACKGROUND TECHNOLOGY AND PROBLEMS A data interpolation processing device performs interpolation calculations on an analog signal S based on an input sample sequence (indicated by a black circle) having a certain sampling period Ti, as shown in Fig. 1. , is a device that outputs an output sample sequence (indicated by a white circle) with a sampling period To different from this. There are various methods for performing this interpolation calculation depending on the degree of precision, but as an example, a linear interpolation calculation will be explained with reference to FIG.

In FIG. 2, the times of the n and n+1th sample points of the triple string (black circles) of the sampling period Ti are respectively X n + X TL+1 and the respective levels are yn.

)'net. Also, among the sample string (white circle) with sampling period To, let X be the time point of the hex sample point between time point xn + xIDI, its level be yl, and the approximate level obtained by the primary sleeve calculation be y'. . Also, set X-XQ as x-Xfi = Iln.

Thus, y' can be obtained by the following calculation.

xB◆1−X n This (In equation 11, l n/T i = j2 ′n(0
< it 'B < l ), the following equation is obtained.

)” −('In+, 3'n) ・βh+yrL ・・
(2) Also, if 7!1l-1 is known, β'n can be expressed as the following equation.

li=β3-1+To/Ti...(31However, in order to perform an interpolation processing operation, regardless of the type of interpolation operation, the time difference between the input and output sample sequences (
time difference (normalized by the period Ti of the input sample sequence) βh
need to be measured.

The measurement of the time difference β-fact has conventionally been carried out using an apparatus as shown in FIG. That is, a clock signal having a frequency Nfsi that is an integer N times the sampling frequency fsi of the input sample sequence is supplied to a counter (1) for counting, and the counting output (parallel output) is supplied to a latch circuit (2). If the launch is repeated with the clock signal of the sampling frequency fsiO of the output sample sequence, the time difference βK each time is output.

However, in order to increase the interpolation accuracy, the time difference i1
The accuracy must be maintained. However, in such a conventional time difference measuring device, the time difference is 7! In order to increase the precision of the chopsticks, if N is made too large, the counter (1)
The frequency of the clock signal supplied to the device becomes too high, leading to an increase in the scale, price, and technical difficulty of the hardware.

Purpose of the Invention In view of the above points, the present invention seeks to propose a time difference measuring device that can measure time differences with high accuracy even if the frequency of the clock signal supplied to the counter is not as high as possible. It is something.

Summary of the Invention The present invention provides an apparatus for measuring the time difference between pulse trains of different frequencies fsi and fso.
(where N is an integer), the first clock signal is counted and the frequency is f so / M (where M = 2 m).

m = L2+3+...); a first launch circuit that launches the contents of this counter by the second clock signal; and an output of the first launch circuit that is m an adder which is shifted to the right by bits and the output of this adder is latched with a third clock signal of frequency Lso;
A second latch circuit is supplied to the ζ adder, and the adder outputs a time difference detection signal.

According to the present invention, it is possible to obtain a time difference measuring device that can measure time differences with high accuracy without increasing the frequency of the clock signal supplied to the counter so much.

EXAMPLE An example of the present invention will be described below with reference to FIG. A first clock signal having a frequency Nfsi that is N times the sampling frequency fsi of the input signal example is supplied to a counter (3) for counting. Then, an integer M of the sampling frequency fso of the output pulse train (where M=2m, m=L
2, 3. ... 1/1 frequency f so / M second
The clock signal of is supplied to the counter (3) as a reset signal, and the output (parallel output) of the counter (3) is supplied to the launch circuit (4) so that the above frequency is
/M second clock signal. Therefore, the latch circuit (41 has a sampling frequency rs
A count value M times the count value latched by o is held.

From the above equation (3), the time difference βh is the time difference β6. It is expressed as the sum of the normalized period To/Ti obtained by normalizing the output sampling period To by the input sampling period Ti, but the period To/Ti can be obtained by simply shifting the output of the launch circuit (4) to the right by m bits. , this cycle To/Ti (parallel output) is shifted to the right by m bits and supplied to the adder (5), and the time difference β (parallel output) already latched in the launch circuit (6) is transferred to the adder ( Adder) (5) and add them together, the time difference l'n (parallel output)
is obtained. This time difference βh is launched into the launch circuit (6) with a third clock signal of frequency rso,
It is supplied to an adder (5) and used to obtain N6.

The output terminal of each digit of the launch circuit (4) is connected to the adder (5).
), the output of the launch circuit (4) is m.
It will be shifted bits to the right.

According to such a time difference measuring device, the accuracy of the time difference 19 can be increased by a maximum of M times.

If the surface and M are large, the cumulative time in the launch circuit (4) is long, and there is a risk that an error will occur in the normalized period To/Ti, the device shown in Fig. 3 is also used, thereby reducing the time difference βt. What is necessary is to perform comparison and correction.

For example, fsl, f So is 50kllz, N and M
is 28, Nfsi is 12.8Ml1z, f
6o/M is about 195Hz. In this case, the number of bits of the counter (3) and latch circuit (4) is 24 each.
The number of bits of the adder (5) and the launch circuit (6) is 16 bits each.

Incidentally, if we try to obtain the same precision of the time difference l'o with the device shown in FIG. 3 as that of the device shown in FIG. 4 mentioned above, then fsi
= fso=50 (kllz), N is 216
Therefore, NfSi becomes 3.3 Gllz.

Effects of the Invention The above-mentioned object of the present invention is to obtain a time difference measuring device that can measure time differences with surface accuracy without increasing the frequency of the clock signal supplied to the counter so much. I can do it. Therefore, the desired purpose can be achieved without increasing the hardware, cost, or technical difficulty of the time difference measuring device.

[Brief explanation of drawings]

1 and 2 are graphs for explaining the data interpolation processing device, FIG. 3 is a block diagram showing a conventional time difference measuring device, and FIG. 4 is a block diagram showing an embodiment of the time difference measuring device according to the present invention. It is a line diagram. (3) is a counter, (4) is the first latch circuit, (5)
is an adder, and (6) is a second latch circuit.

Claims (1)

[Claims] In an apparatus for measuring the time difference between pulse trains having different frequencies fsi and fso, a first clock signal having a frequency Nfsi (N is an integer) is counted, and a first clock signal having a frequency fsi and a first clock signal having a frequency fso are counted.
a counter that is reset by a second clock signal of so/M (where M = 2", m = l. 2.3...), and the contents of the counter are launched by the second clock signal. a first launch circuit; an adder to which the output of the first latch circuit is shifted to the right by m bits; and the output of the adder is supplied with a third clock signal of frequency rso; and a second launch circuit which is latched and supplied to the adder, and a time difference detection signal is output from the adder.