JPH0467156B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a time difference measuring device suitable for application to a data interpolation processing device.

[Background technology and its problems]

As shown in FIG. 1, the data interpolation processing device performs an interpolation operation on the analog signal S based on an input sample string (indicated by a black circle) having a certain sampling period Ti, and This is a device that outputs the To output sample sequence (indicated by a white circle).

There are various methods of this interpolation calculation device depending on the level of accuracy, but as an example, a primary interpolation calculation will be explained with reference to FIG.

In Figure 2, n-
The time points of the 1st, nth, and n+1th sample points are x _o-1 , x _o , x _o+1 , respectively, and their respective levels are y _o-1 , y _o ,
Let y _o+1 . Also, among the sample string (white circle) of the sampling period To, the time point of the sample point that should be between time points x _o-1 and x _o is x′ _o-1 , its level is y′ _o-1 ,
The approximation level obtained by the first-order interpolation calculation is
y″ _{o-1.Similarly} , among the sample string (white circle) with sampling period To, the time point of the sample point that should be between time x _o and x _o+1 is x′ _o , and its level is y′ _o ,
The approximation level obtained by the first-order interpolation calculation is
Let y″ _o .

Also, the time difference between time x _o-1 and x′ _o-1 is l _o-1 , time
Let the time difference between X _o and X′ _o be _lo respectively. Thus, y″ _o can be obtained by the following calculation.

y″ _o =y _o+1 −y _o ／x _o+1 −x _o・(x′ _o −
x _o ) +y _o =y _o+1 −y _o /Ti・l _o +y _o ……(1) In this equation (1), l _o /Ti=l′ _o (However, 0≦l′ _o <)1 If we put , we get the following formula. (n is a variable) y″ _o = (y _o+1 −y _o )・l′ _o +y _o ...(2) Also, in Figure 1, each output sample (white circle)
Assuming that the time differences between this and the input sample immediately before it (black circle) are respectively .., lo _-1 , _lo , lo ₊₁ ,..., the following equation holds true. However, both K and n are integers.

K・Ti+l _o =l _o-1 +To Dividing both sides of the last general formula by Ti and rearranging, the following formula is obtained.

l' _o = l' _o-1 +To/Ti-K...(3) However, l' _o = _lo /Ti. Also, for K, l′ _o is 0≦
l′ _o is an integer that satisfies <1.

Therefore, in order to perform an interpolation processing operation, regardless of the type of interpolation operation, the time difference between the input and output sample strings (the period of the input sample string) must be
It can be seen that it is sufficient to measure the time difference (time difference) l′ _o normalized by Ti.

The measurement of the time difference l' _o has conventionally been carried out using an apparatus as shown in FIG. That is, a clock signal having an oversampling frequency Nf _si that is an integer N times the sampling period f _si of the input sample sequence is supplied to the counter 1 for calculation, and the counting output (parallel output) is supplied to the latch circuit 2 for output. If the latch is repeated using the clock signal of the sampling frequency f _sp of the sample sequence, the time difference l' _o will be output each time.

The counter 1 in FIG. 3 is a modulus, and when the counter value overflows, it is automatically reset and starts counting again. Also, the number of bits of counter 1 is determined by the input sampling period Ti (Ti
= 1/f _si ) with the oversampling period T′ _i [T′ _i =
There must be at least N bits, which is the value divided by 1/(N·f _si )]. This has the same meaning as normalizing l _o with Ti, and the output of latch circuit 2 is l′ _o
The result is the same as outputting =l _o /Ti (0≦l' _o <1). Note that the resolution of this system is determined by the value of N.

However, in order to increase the compensation accuracy, the time difference l′ _o
accuracy must be increased. However, in such a conventional time difference measuring device, if N is made too large in order to increase the accuracy of the time difference l′ _o ,
The frequency of the clock signal supplied to the counter 1 becomes too high, leading to an increase in the scale, price, and technical difficulty of the hardware.

[Purpose of the invention]

In view of the above, the present invention is a device for measuring time differences using equation (3), and in particular, it is possible to measure time differences with high accuracy without increasing the clock frequency supplied to the counter as high as the left. This is an attempt to propose a time difference measuring device that can.

[Summary of the invention]

The present invention provides an apparatus for measuring the time difference between pulse trains of different frequencies f _si and f _{sp .}
(where N is an integer), the first clock signal is counted, and the frequency f _sp /M (where M=2 ^m , m=
1, 2, 3, . . . ); a first latch circuit that latches the contents of the counter by the second clock signal; The output of the circuit is m
The output of the adder is latched by a third clock signal of frequency f _sp and is supplied to the adder. The device outputs a time difference detection signal.

According to the present invention, it is possible to obtain a time difference measurement position at which the time difference can be measured with high accuracy without increasing the frequency of the clock signal supplied to the counter so much.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. Input pulse train sampling frequency f _si
A first clock signal having a frequency Nf _si that is N times as large as Nf si is supplied to the counter 3 for counting. Then, an integer M of the sampling frequency f _sp of the output pulse train (however,
M = 2 ^m , m = 1, 2, 3, ...) 1/1 frequency
The second clock signal of f _sp /M is supplied to the counter 3 as a reset signal, and the output (parallel output) of the counter 3 is supplied to the latch circuit 4 to generate the second clock signal of the frequency f _sp /M. It is latched using a clock signal, and a count value M times the count value is held.

From Equation (3) above, the time difference l′ _o is calculated using the time difference l′ _o-1 and the output sampling period To as the input sampling frequency.
It is expressed as the sum of the normalized period To/Ti normalized by Ti.

Since the period To/Ti can be obtained by simply shifting the output of latch circuit 4 to the right by m bits, this period
To/Ti (parallel output) is shifted to the right by m bits and supplied to the adder 5, and the time difference l' _i-1 (parallel output) already latched in the latch circuit 6 is sent to the adder 5. If the addition output exceeds 1 and an overflow occurs, the integer part is truncated and output as l' _o . As a result, the adder 5 incorporates something corresponding to minus K in equation (3). This time difference l' _o is latched by the latch circuit 6 with a third clock signal of frequency f _sp and supplied to the adder 5 to be used to obtain the next l' _o+1 .

By connecting the output terminal of each digit of the latch circuit 4 to the input terminal of each digit that is m digits lower than the input terminal of the adder 5, the output of the latch circuit 4 is shifted to the right by m bits. That will happen.

With such a time difference measuring device, the accuracy of the time difference l' _o can be increased up to M times.

The input and output signals are not limited to mutually periodic signals, and may also be asynchronous signals. To/for asynchronous
Ti is an irrational number. When this is measured with a counter, the error between the measured value and the true value of To/Ti in FIG. 3 is 1/N or less. In Figure 4, 1/(M・
N) The following is true.

If M is large and the cumulative time in the latch circuit 4 is long, and there is a possibility that an error will occur in the normalized period To/Ti, the device shown in FIG. 3 is also used, and thereby the time difference l' What is necessary is to compare and correct _o . For example, if f _si and f _sp are 50 kHz, and N and M are ²⁸ , N·f _si is 12.8 MHz, and f _sp /M is 195 Hz, values that are easy to handle in practice.

In this case, in order to obtain 16-bit l' _o , the number of bits of counter 3 and latch circuit 4 must be 24 bits each, and the number of bits of adder 5 and latch circuit 6 must be 24 bits each.
It is 16 bits.

Incidentally, if we try to obtain the same precision of the time difference l′ _o with the device shown in _FIG . ³ as that of the device shown in _FIG .
N・f _si reaches 3.3GHz.

〔Effect of the invention〕

In the conventional technology, the resolution of time difference measurement was determined by the frequency N·f _si supplied to the counter, but according to the present invention described above, the frequency N·f _si supplied to the counter can be increased as much as possible. Even without,
Counter reset and latch timing
By performing the measurement at a frequency of f _sp /M, the resolution (number of effective digits) of the counter can be increased, and a time difference measuring device capable of measuring time differences with high precision can be obtained.

Therefore, the desired purpose can be achieved without increasing the scale, cost, or technical difficulty of the hardware of the time difference measuring device.

[Brief explanation of the drawing]

1 and 2 are graphs for explaining the data interpolation processing device, FIG. 3 is a block diagram showing a conventional time difference measuring device, and FIG. 4 is a block diagram showing an embodiment of the time difference measuring device according to the present invention. It is a line diagram. 3 is a counter, 4 is a first latch circuit, 5 is an adder, and 6 is a second latch circuit.

Claims (1)

[Claims] 1. In a device that measures the time difference between pulse trains of different frequencies f _si and f _sp , calculate the first clock signal of frequency Nf _si (where N is an integer), and
Frequency f _sp /M (however, M=2 ^m , m=1, 2, 3,
...), a first latch circuit that latches the contents of the counter by the second clock signal, and an output of the first latch circuit. The adder has an adder which is right-shifted by m bits and is supplied, and a second latch circuit in which the output of the adder is latched with a third clock signal of frequency f _sp and is supplied to the adder. A time difference measuring device characterized in that the adder outputs a time difference detection signal.