JPS6092609A - Liquid-phase epitaxial growth method - Google Patents

Liquid-phase epitaxial growth method

Info

Publication number
JPS6092609A
JPS6092609A JP58201273A JP20127383A JPS6092609A JP S6092609 A JPS6092609 A JP S6092609A JP 58201273 A JP58201273 A JP 58201273A JP 20127383 A JP20127383 A JP 20127383A JP S6092609 A JPS6092609 A JP S6092609A
Authority
JP
Japan
Prior art keywords
substrate
temperature
type
time
point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58201273A
Other languages
Japanese (ja)
Other versions
JPH0680636B2 (en
Inventor
Shigeru Yamamoto
茂 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP20127383A priority Critical patent/JPH0680636B2/en
Publication of JPS6092609A publication Critical patent/JPS6092609A/en
Publication of JPH0680636B2 publication Critical patent/JPH0680636B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901Materials
    • H10P14/2907Materials being Group IIIA-VA materials
    • H10P14/2911Arsenides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/26Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using liquid deposition
    • H10P14/263Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using liquid deposition using melted materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202Materials thereof
    • H10P14/3214Materials thereof being Group IIIA-VA semiconductors
    • H10P14/3221Arsenides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3421Arsenides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3438Doping during depositing
    • H10P14/3441Conductivity type
    • H10P14/3442N-type
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3438Doping during depositing
    • H10P14/3441Conductivity type
    • H10P14/3444P-type

Landscapes

  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To form an approximately flat and uniform P-N junction by making a point of time when the speed of temperature drop is changed over and a point of time when a melting liquid is changed over differ after the first epitaxial growth of a compound semiconductor for a light-emitting diode. CONSTITUTION:A P type GaAs substrate 1, a P type melting liquid and an N type melting liquid are kept at 850-900 deg.C, the substrate and the P type melting liquid are brought into contact and the temperature of the substrate is elevated at a point of time t1, the temperature of the substrate is lowered at the first speed of temperature drop at a point of time t2 when the temperature of the substrate reaches to 860-950 deg.C, the first epitaxial growth is executed, thus forming a P type GaAlAs layer 2. The temperature of the substrate is lowered at the second speed of temperature drop at a point of time t3 when the temperature of the substrate lowers to 820-900 deg.C, the melting liquid is changed over to the N type melting liquid at a point of time t4 when the temperature of the substrate drops by 5-13 deg.C, and the second epitaxial growth is executed, thus forming an N type GaAlAs layer 3. Silicon as a very small amount of an impurity displays determined conduction action of either of a doner or an acceptor, and is not inverted into a P type or an N type in the vicinity of a P-N junction 4.

Description

【発明の詳細な説明】 イ)産業上の利用分野 本発明は良好な特性のPr+接合をイ1し、た発光・タ
イ“オードをff18!造するための液相エピタキシャ
ル成長方法に関する。
DETAILED DESCRIPTION OF THE INVENTION A) Field of Industrial Application The present invention relates to a liquid phase epitaxial growth method for producing a light emitting diode using a Pr+ junction with good characteristics.

口)従来技術 近年、発光ダイA−ド用の化合物半導体においC5第1
図に示ずようにGaAs基板(1)上に同導電型のGa
AlAs層〈2)を成長させ、次いで逆導電型のGaA
lAs層(3)を積層することでPn接合(4)近傍の
注入効率を高める技術が開発きれている。
(2) Prior art In recent years, C5 has become the first compound semiconductor for light-emitting diodes.
As shown in the figure, GaAs of the same conductivity type is placed on the GaAs substrate (1).
An AlAs layer (2) is grown, and then GaA of the opposite conductivity type is grown.
A technique has been developed to increase the injection efficiency near the Pn junction (4) by stacking lAs layers (3).

このような発光ダイオード用の液相上ピタキレ!ル成長
は、第2図の温度特性図に示す如く高温における時点t
1で基板と融液を接触さ七、t2からt3の間第1エピ
タキシヤル成長をさセ、時刻t3において融液を逆導電
型のものに切りかλると共に降温速度を切りかえて、そ
の徒弟2のエピタキシャル成長を行なっていた。
Perfect for liquid phase for light emitting diodes like this! As shown in the temperature characteristic diagram of Fig.
At time t3, the melt is brought into contact with the substrate, and the first epitaxial growth is performed between t2 and t3. 2 epitaxial growth was being carried out.

この方法では時刻t3においてPn接合(4)が形成さ
れる事になるが、ウェハは融液に対し面接触しているに
もかかわらず平面状のPn接合か得られない。即ち部分
的に早く導電型転換したり、何度も導電型転換してP 
n P n構造を形成lるト11(分が/1したりする
。これらは発光効率を低トさせるのみ℃なく、トランジ
スタやサイリスタの如\スイ/−jング動作を生じるこ
とになるので好、にしへない。
In this method, a Pn junction (4) is formed at time t3, but a planar Pn junction cannot be obtained even though the wafer is in surface contact with the melt. In other words, the conductivity type may be partially changed quickly, or the conductivity type may be changed many times and P
When forming an nPn structure, the 11(min) may be reduced by 1/1.These are not preferred because they not only reduce the luminous efficiency but also cause a switching operation like a transistor or thyristor. , I don't know.

そこで実験を重ねた結果、融液中に含まれる微量のシリ
コンがGaAsやGaAlAsに対し千両性不純物とし
て働き、エピタキシャル成長の際の降温速度によってP
型不純物になるかn型不純物になるかが定まるので、融
液と温度勾配を同時に変化させると熱慣性等により部分
的にP型となったりn型番となったりするので、これが
原因となる事がわかった。一方他の化合物半導体の液相
エピタキシャル成長方法で用いられるPn接合付近での
定温保持やメルトバックは、Pn接合(4)前後で3元
系化合物の混晶比が変化しているので、Pn接合におけ
る混晶比が発光に最適な値からずれる恐れがあり、特に
発光層であるP層への電流注入効率が低下しやすいので
このましくないことがわかった。
As a result of repeated experiments, we found that a small amount of silicon contained in the melt acts as an amphoteric impurity for GaAs and GaAlAs, and that the temperature decreases during epitaxial growth.
It determines whether it will become a type impurity or an n-type impurity, so if the melt and temperature gradient are changed at the same time, it will partially become a p-type or an n-type due to thermal inertia, etc., so this may be the cause. I understand. On the other hand, constant temperature maintenance and meltback near the Pn junction, which are used in liquid phase epitaxial growth methods for other compound semiconductors, are difficult because the mixed crystal ratio of the ternary compound changes before and after the Pn junction (4). It has been found that this is undesirable because there is a risk that the mixed crystal ratio may deviate from the optimal value for light emission, and in particular, the efficiency of current injection into the P layer, which is the light emitting layer, tends to decrease.

ハ)発明の目的 本発明はE述の点を考慮してなされたもので、略平坦で
均一なPn接合を形成する液相1ピタキシVル成長方法
を提供するものである。
C) Purpose of the Invention The present invention has been made in consideration of the points mentioned in E above, and provides a liquid phase one-pitaxy growth method for forming a substantially flat and uniform Pn junction.

二)発明の構成 本発明は化合物半導体の第1のエピタキシャル成長後、
降温速度を切換える時1点と融液を切換える時点を異な
らせるもので、以下本発明を実施例に基づいて詳細に説
明する。
2) Structure of the invention The present invention provides that after the first epitaxial growth of a compound semiconductor,
The present invention will be described in detail below based on examples.

ホ)実施例 第3図は本発明実施例の液相エビクキ/キル成長方法の
温度特性図である。以−トの説明は第1図で説明したG
aAs基板上のGaAlAs発光ダイ]−ドを例にとり
、また雰囲気ガスは特にこと1つらない限り水素とする
e) Example FIG. 3 is a temperature characteristic diagram of the liquid phase shrimp/kill growth method according to the example of the present invention. The following explanation is based on G explained in Figure 1.
A GaAlAs light-emitting diode on an aAs substrate will be taken as an example, and the atmospheric gas will be hydrogen unless otherwise noted.

まずP型GaAs基板とP型融液とn型融液をそれぞれ
分離してセットした黒鉛製ボートを850〜900°C
の高温で数十分間定温保持したり)と、第3図における
時点t1においてボートのスライド板を摺動させ、基板
とP型融液を接触さ七る。そしてたたちに昇温し、基板
の表面のぬれ性をよくd−ると共に少し溶出させ(メル
トバック)、860〜950℃になった時点t2iこお
い’to、i 〜o、s°C/minの第1の降温速度
で温度をさげ、第1のエビダキ/ヤル成長を行いP型G
aAlAs層を形成する。そり、 T: 820−90
0℃に低tした時点t3で降温速度を甲め2〜5°C/
minの第2の降温速度とし、その時の温度より5〜1
3℃低下した時点t4で融液をP型融液からn型融液に
切換える。その後必要に応し、て、1を極のオーミック
特性向、トのため最後の10℃降温を利用してGaAs
表面層(5)を形成してもよい。
First, a P-type GaAs substrate, P-type melt, and N-type melt were separated and set in a graphite boat at 850 to 900°C.
At time t1 in FIG. 3, the slide plate of the boat is slid to bring the substrate into contact with the P-type melt. Then, the temperature is raised rapidly to improve the wettability of the substrate surface and to cause a slight elution (melt back), and when the temperature reaches 860 to 950°C, t2i is heated to, i to o, s°C/ The temperature is lowered at the first cooling rate of min, and the first Ebidaki/Yal growth is performed to form P-type G.
aAlAs layer is formed. Sled, T: 820-90
At t3, when the temperature was lowered to 0℃, the temperature decrease rate was increased to 2 to 5℃/
5 to 1 from the temperature at that time.
At time t4 when the temperature has decreased by 3° C., the melt is switched from the P-type melt to the N-type melt. After that, if necessary, add 1 to improve the ohmic characteristics of the electrode, and use the final 10°C temperature drop to improve the ohmic characteristics of the electrode.
A surface layer (5) may also be formed.

このようにして成長された成長層及びPn接合は、各層
の結晶性のマツチングがよいので発光効率が高く、また
微量不純物であるシリコンはドナーかアクセプタかのい
ずれか定まった導電作用を呈し、Pn接合近傍において
P型になったりn型に反転したりすることはない。
The growth layers and Pn junctions grown in this way have high luminous efficiency because the crystallinity of each layer is well matched, and silicon, which is a trace impurity, exhibits a conductive function as either a donor or an acceptor, and the Pn junction It does not become P type or invert to N type in the vicinity of the junction.

このあ法で製造した上述のGaAlA3発光ダイオード
は例えば、基板と第1のエピタキシャル層との間に結晶
性のマツチングの悪さによるエツチングラインは見られ
ず、Pn接合附近におけるP型Ga1−8AlxAs層
の混晶比Xはおよそ0.35で、1ボキシ樹脂被覆後の
発光効率は4〜5%、発光波長66(1++m(赤)で
あった。
In the above-mentioned GaAlA3 light emitting diode manufactured by this method, for example, no etching line due to poor crystalline matching was observed between the substrate and the first epitaxial layer, and the P-type Ga1-8AlxAs layer near the Pn junction was not observed. The mixed crystal ratio X was approximately 0.35, the luminous efficiency after coating with 1 boxy resin was 4 to 5%, and the luminescent wavelength was 66 (1++ m (red)).

へ)発明の効果 以上の如く本発明は、複数の融液と化合物半導体の基板
を高温に保持し第1の融液と基板を接触させて第1の降
温速度で第1のエピタキシへ・ル成長を行なう工程と、
第2の降温速度に変える工程と、その後に第2の融液と
基板を接触させ第2の降温速度で第2のエピタキシャル
成長を行なう工程とを具備した液相エピタキシャル成長
方法であるから、良好な特性のPn接合が形成できる。
f) Effects of the Invention As described above, the present invention maintains a plurality of melts and a compound semiconductor substrate at a high temperature, brings the first melts into contact with the substrate, and conducts a first epitaxy process at a first cooling rate. The process of growing;
Since it is a liquid phase epitaxial growth method that includes a step of changing the temperature to a second cooling rate, and then a step of bringing the second melt into contact with the substrate and performing second epitaxial growth at the second cooling rate, it has good characteristics. A Pn junction can be formed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明で対象とする発光ダイオード用の化合物
半導体の模式図、第2図は従来の、l−ビタキシャル成
長方法の温度特性図、第3図は本発明実施例の液相エピ
タキシャル成長方法の温度特性図である。 (1)・=GaAs基板、(2)(3)−Ga^1AJ
t、(4)=−Pn接合、く5)・・・GaAs表面層
Fig. 1 is a schematic diagram of a compound semiconductor for light emitting diodes which is the subject of the present invention, Fig. 2 is a temperature characteristic diagram of a conventional l-bitaxial growth method, and Fig. 3 is a liquid phase epitaxial growth method of an embodiment of the present invention. FIG. (1)・=GaAs substrate, (2)(3)-Ga^1AJ
t, (4)=-Pn junction, 5)...GaAs surface layer.

Claims (1)

【特許請求の範囲】[Claims] l)複数の融液と化合物半導体の基板を高温に保持し第
1の融液と基板を接触♂0て第1降温速度で第1エピタ
キン〜ル成長を行なう[程と、第2の降温速度に変える
]−程と、その後に第2の融液と基板を接触させ第2の
降温速度で第2のエビダキシA・1し成長を行なう工程
とを具備したl扛を特徴とする液相エピタキシャル成長
方d1.。
l) A plurality of melts and a compound semiconductor substrate are held at high temperatures, and the first melt and the substrate are brought into contact with each other, and a first epitaxy is grown at a first cooling rate. Liquid phase epitaxial growth characterized by a step of bringing a second melt into contact with the substrate and then growing a second epitaxial layer A.1 at a second cooling rate. Way d1. .
JP20127383A 1983-10-26 1983-10-26 Liquid phase epitaxial growth method Expired - Lifetime JPH0680636B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20127383A JPH0680636B2 (en) 1983-10-26 1983-10-26 Liquid phase epitaxial growth method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20127383A JPH0680636B2 (en) 1983-10-26 1983-10-26 Liquid phase epitaxial growth method

Publications (2)

Publication Number Publication Date
JPS6092609A true JPS6092609A (en) 1985-05-24
JPH0680636B2 JPH0680636B2 (en) 1994-10-12

Family

ID=16438221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20127383A Expired - Lifetime JPH0680636B2 (en) 1983-10-26 1983-10-26 Liquid phase epitaxial growth method

Country Status (1)

Country Link
JP (1) JPH0680636B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5140864A (en) * 1974-10-04 1976-04-06 Mitsubishi Electric Corp Handotaiketsushono ekisoseichosochi

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5140864A (en) * 1974-10-04 1976-04-06 Mitsubishi Electric Corp Handotaiketsushono ekisoseichosochi

Also Published As

Publication number Publication date
JPH0680636B2 (en) 1994-10-12

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