JPS609302U - microwave integrated circuit - Google Patents

microwave integrated circuit

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Publication number
JPS609302U
JPS609302U JP10013683U JP10013683U JPS609302U JP S609302 U JPS609302 U JP S609302U JP 10013683 U JP10013683 U JP 10013683U JP 10013683 U JP10013683 U JP 10013683U JP S609302 U JPS609302 U JP S609302U
Authority
JP
Japan
Prior art keywords
insulator
pattern
integrated circuit
pattern part
microwave integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10013683U
Other languages
Japanese (ja)
Inventor
則夫 鈴木
真一 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP10013683U priority Critical patent/JPS609302U/en
Publication of JPS609302U publication Critical patent/JPS609302U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のシングルバランスミキサーのMICのパ
ターン図、第2図は本考案の一実施例の立体図、第3図
は本考案の第2の実施例の断面図、第4図は本考案の第
3の実施例であってaは平面図、bはaのA−A’断面
図である。 1・・・・・・受信信号入力端子、2・・・・・・局発
信号入力端子、3,4・・・・・・ダイオード検波電流
出力端子、5・・・・・・中間周波数出力端子、6,7
・・・・・・ミキサーダイオード、8.9・・・・・・
直流阻止コンデンサ、10・・・・・・誘電体基板、1
1.12・・・・・・整合用パターン、21. 31.
 41・・・・・・誘電体基板、22゜32.42・・
・・・・信号伝送ライン、23. 24゜33.34,
43.44・・・・・・バイアスライン、25、 35
. 45・・・・・・絶縁物、26. 36. 46・
・・・・・オニブンスタブ。
Figure 1 is a MIC pattern diagram of a conventional single balance mixer, Figure 2 is a three-dimensional diagram of an embodiment of the present invention, Figure 3 is a sectional view of the second embodiment of the present invention, and Figure 4 is a diagram of the present invention. A is a plan view of the third embodiment of the invention, and b is a sectional view taken along line AA' of a. 1... Received signal input terminal, 2... Local oscillation signal input terminal, 3, 4... Diode detection current output terminal, 5... Intermediate frequency output terminal, 6,7
...Mixer diode, 8.9...
DC blocking capacitor, 10...Dielectric substrate, 1
1.12... Matching pattern, 21. 31.
41...Dielectric substrate, 22°32.42...
... Signal transmission line, 23. 24°33.34,
43.44...Bias line, 25, 35
.. 45... Insulator, 26. 36. 46・
...Onibun stub.

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)基板部、第1のパターン部、絶縁体および第2の
パターン部を少なくとも4層の多層構造とし、前記第1
のパターン部に信号伝送ライ′ン、半導体素子およびバ
イアスラインを配置し、前記第2のパターン部に整合用
パターンを形成すると共に少なくともその一端を信号伝
送ラインに接続したことを特徴とするマイクロ波集積回
路。 、。
(1) The substrate part, the first pattern part, the insulator, and the second pattern part have a multilayer structure of at least four layers, and the first pattern part
A microwave, characterized in that a signal transmission line, a semiconductor element, and a bias line are arranged in the second pattern part, and a matching pattern is formed in the second pattern part, and at least one end thereof is connected to the signal transmission line. integrated circuit. ,.
(2)絶縁体か酸化膜であることを特徴とする実用新案
登録請求の範囲第1項記載の整合回路。
(2) The matching circuit according to claim 1, which is an insulator or an oxide film.
(3)絶縁体と第2のパターン部が絶縁体で覆われた導
体で形成されたことを特徴とする実用新案登録請求の範
囲第1項記載の整合回路。
(3) The matching circuit according to claim 1, wherein the insulator and the second pattern portion are formed of a conductor covered with an insulator.
JP10013683U 1983-06-30 1983-06-30 microwave integrated circuit Pending JPS609302U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10013683U JPS609302U (en) 1983-06-30 1983-06-30 microwave integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10013683U JPS609302U (en) 1983-06-30 1983-06-30 microwave integrated circuit

Publications (1)

Publication Number Publication Date
JPS609302U true JPS609302U (en) 1985-01-22

Family

ID=30237017

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10013683U Pending JPS609302U (en) 1983-06-30 1983-06-30 microwave integrated circuit

Country Status (1)

Country Link
JP (1) JPS609302U (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5184556A (en) * 1975-01-22 1976-07-23 Hitachi Ltd JUDENTAIKYOSHINKIKETSUGOGATAHATSUSHINKI
JPS5728201A (en) * 1980-07-25 1982-02-15 Ntn Toyo Bearing Co Ltd Measuring mehtod for radius of curvature of concave spherical surface
JPS57160198A (en) * 1981-03-27 1982-10-02 Nippon Electric Co Crossover insulating layer structure for thick film multilayer circuit board
JPS5820004A (en) * 1981-07-29 1983-02-05 Murata Mfg Co Ltd Production of strip line

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5184556A (en) * 1975-01-22 1976-07-23 Hitachi Ltd JUDENTAIKYOSHINKIKETSUGOGATAHATSUSHINKI
JPS5728201A (en) * 1980-07-25 1982-02-15 Ntn Toyo Bearing Co Ltd Measuring mehtod for radius of curvature of concave spherical surface
JPS57160198A (en) * 1981-03-27 1982-10-02 Nippon Electric Co Crossover insulating layer structure for thick film multilayer circuit board
JPS5820004A (en) * 1981-07-29 1983-02-05 Murata Mfg Co Ltd Production of strip line

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