JPS609376A - Overcurrent detector of voltage type inverter - Google Patents
Overcurrent detector of voltage type inverterInfo
- Publication number
- JPS609376A JPS609376A JP58116392A JP11639283A JPS609376A JP S609376 A JPS609376 A JP S609376A JP 58116392 A JP58116392 A JP 58116392A JP 11639283 A JP11639283 A JP 11639283A JP S609376 A JPS609376 A JP S609376A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- current
- snubber
- charging current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/122—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. DC/AC converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/505—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
- H02M7/515—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
- H02M7/525—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only with automatic control of output waveform or frequency
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、例えば交流電動機を可変速運転させる電動機
駆動制御装置における電圧形インバータの過電流検出装
置に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an overcurrent detection device for a voltage source inverter in a motor drive control device that operates an AC motor at variable speed, for example.
一般的に、電圧形インバータは第1図に示す如く交流電
源1を整流する整流器2と、その出力電圧全平滑させる
主回路フィルタコンデンサ3とその平滑直流電圧を交流
電圧に変換するインバータ4によ多構成され、交流電動
機5を駆動する。ここで整流器2にダイオードを採用し
ているが、サイリスタでもよい。また、インバータ4の
スイッチング素子としてGTO(ダート・タン・オフサ
イリスク)全採用しているが強制転流できる回路があれ
ばサイリスクでもよく、箔然の如ぐGTR(ヅヤイアン
トトランジスタ)でもよい。Generally, as shown in Figure 1, a voltage source inverter consists of a rectifier 2 that rectifies an AC power supply 1, a main circuit filter capacitor 3 that completely smoothes the output voltage, and an inverter 4 that converts the smoothed DC voltage into an AC voltage. It has multiple configurations and drives an AC motor 5. Here, a diode is used as the rectifier 2, but a thyristor may also be used. In addition, GTO (dart tongue off-thigh transistors) are all used as the switching elements of the inverter 4, but if there is a circuit that can perform forced commutation, it may be a high-temperature transistor, or a natural GTR (cross-hat transistor) may be used.
第2図は、第1図での主回路フィルタコンデンサ3、イ
ンバータ4と交流電動機5による詳細を表わしだ講成図
である。ここで主回路フィルタコンデンサ3と直列に接
続されたコイル6及び電流検出器(変流器等)7は、イ
ンバータ4が短絡故障した場合に主回路フィルタコンデ
ンサ3の放電電流を抑制するインダクタンスで6D、及
びその電流の検出器である。インバータ4と直列に接続
された電流検出器(変流器等)8は、インバータ4に流
入する直流主回路電流全検出する。(電流検出器7,8
は短絡電流を検出することができ、ここでは必ずしも両
方を接続する必要はない。)インバータ4の詳細は、イ
ンバータ出力電圧を制御するスイッチング素子のGTO
9と、それと逆並列に接続され無効電力、交流電動機5
からの回生エネルギーと循環電流を流す逆並列ダイオー
ド10と、それらの素子に印加されるd v /d t
を抑制するスナバ−回路(抵抗器1)とダイオード12
の並列接続とコンデンサ13との直列回路)とで構成さ
れている。FIG. 2 is a lecture diagram showing details of the main circuit filter capacitor 3, inverter 4, and AC motor 5 in FIG. Here, a coil 6 and a current detector (current transformer, etc.) 7 connected in series with the main circuit filter capacitor 3 have an inductance of 6D to suppress the discharge current of the main circuit filter capacitor 3 in the event of a short-circuit failure in the inverter 4. , and a detector for its current. A current detector (such as a current transformer) 8 connected in series with the inverter 4 detects the entire DC main circuit current flowing into the inverter 4 . (Current detectors 7, 8
can detect short circuit current, here it is not necessarily necessary to connect both. ) The details of the inverter 4 are GTO, which is a switching element that controls the inverter output voltage.
9 and a reactive power AC motor 5 connected in antiparallel to it.
anti-parallel diode 10 through which regenerative energy and circulating current flow, and d v /d t applied to those elements.
Snubber circuit (resistor 1) and diode 12 to suppress
(parallel connection and a series circuit with a capacitor 13).
第3図は、従来から使用されている短絡検出回路である
。電流検出器8(電流検出器7でもよい)で検出した電
流信号はフィIL’) 21全通して比較器23でレベ
ル設定器22と比較し、設定レベル以上になれば保護シ
ーケンス回路24からの適当な信号でGTO9のr−1
−ブロック又はダート全点弧等の保護動作を行う。通幇
運転時、′電流検出器7,8にはスナバ−コンデンサ充
電電流も流れているので、この電流に起因する回路の誤
動作を防ぐため検出回路の検出レベルを高めたり、その
電流のi4ルス幅を考慮した時定数をもつフィルタ回路
(積分回路)21を接続している。このため、いずれも
短絡電流検出時間を遅らす要因となっている。ここで通
水運転時のスナバ−コンデンサ充電電流を第4図及び第
5図で説明する。FIG. 3 shows a conventionally used short circuit detection circuit. The current signal detected by the current detector 8 (current detector 7 may also be used) is compared with the level setter 22 by the comparator 23 throughout the current signal, and if it exceeds the set level, the signal is output from the protection sequence circuit 24. GTO9 r-1 with appropriate signal
- Perform protective actions such as block or dart full ignition. During normal operation, the snubber capacitor charging current also flows through the current detectors 7 and 8, so in order to prevent circuit malfunctions caused by this current, the detection level of the detection circuit must be increased, and the i4 pulse of that current must be increased. A filter circuit (integrator circuit) 21 having a time constant taking width into consideration is connected. For this reason, both are factors that delay the short circuit current detection time. Here, the snubber capacitor charging current during water flow operation will be explained with reference to FIGS. 4 and 5.
第4図は、第2図のインパーク4の1相分全示し、上下
各構成要素に添字金材は上下の区別全行なったもので、
上相の構成要素にはU、下相の構成要素にはXを添付し
た。また、GTO9UにθjCれる電流i9U 、並列
ダイオードIOXに流れル1t 流i 1oxとスナバ
−コンデンサ13Xの充電電流113Xを示している。Fig. 4 shows one phase of the impark 4 shown in Fig. 2, and the subscripts on each of the upper and lower components are used to distinguish between the upper and lower parts.
U is attached to the upper phase component, and X is attached to the lower phase component. Also shown are a current i9U flowing through the GTO 9U, a current i1ox flowing through the parallel diode IOX, and a charging current 113X flowing through the snubber capacitor 13X.
第5図は、第4図で示した各部電流波形であり、aは逆
並列ダイオード16xに流れている電流で交流電動機5
とインバータ4内で環流している電流が交流電動機5と
主回路フィルタコンデンサ3により無効電力のやllを
行っている電流である。bは、GTO9uがtlでオン
したときのGTO!91Jに流れている電流で、tl
−tz間は主回路フィルタコンデンサ3−コイルe−を
流検出器& −GTO9U−逆並列ダイオードl0X−
主回路コンデンサ3の経路で流れている短絡電流、t2
は逆並列ダイオードがオフした時点で、t2−t3間は
交流電動機5へ流れる電流と主回路フィルタコンデンサ
3−コイル6−電流検出器8− GTO9,U−スナバ
−ダイオード12X−スナバ−コンデンサ13x−主回
路フィルタコンダンサ3の経路で流れるスナバ−コンデ
ンサ充電電流との和であり、t3以後は交流電動機5−
\流れている電流である。Cは、b波形のtlI−t3
間で流れているスナパーコンデンザ13.0充電電流で
あり、コイル6、スナバ−コンデンサ13xと主回路フ
ィルタコンデンサ電圧で決捷るパルス電流となる。FIG. 5 shows current waveforms at various parts shown in FIG. 4, where a is the current flowing through the anti-parallel diode 16x and
The current circulating within the inverter 4 is the current that is used to reduce reactive power by the AC motor 5 and the main circuit filter capacitor 3. b is GTO when GTO9u is turned on at tl! With the current flowing through 91J, tl
-tz between main circuit filter capacitor 3-coil e- current detector & -GTO9U- anti-parallel diode l0X-
Short circuit current flowing in the path of main circuit capacitor 3, t2
is when the anti-parallel diode turns off, and between t2 and t3, the current flowing to the AC motor 5 and the main circuit filter capacitor 3 - coil 6 - current detector 8 - GTO 9, U - snubber diode 12X - snubber capacitor 13x - It is the sum of the snubber capacitor charging current flowing in the path of the main circuit filter capacitor 3, and after t3, the AC motor 5-
\It is a flowing current. C is tlI-t3 of b waveform
This is the charging current of the snubber capacitor 13.0 flowing between the coil 6, the snubber capacitor 13x, and the pulse current determined by the voltage of the main circuit filter capacitor.
特にGTOのようなav/dtit嵐の低い素子全使用
した場合、素子に印加されるdv/dt(i下げるべく
、スナバ−コンデンサ容量を太きくする。In particular, when all devices with low av/dtit characteristics such as GTO are used, the capacitance of the snubber capacitor is increased to lower the dv/dt(i) applied to the device.
このためスナバ−コンデンサ充電電流の・やルス 。For this reason, the snubber capacitor charging current is slightly reduced.
ピーク値及びパルス幅が増加する。例えeよ、主回路フ
ィルタコンデンサ電圧が600 V、スナバ−コンデン
サ容量4μF1コイル6のインダクタンス10μHであ
るとき、ノヤルスビーク値は約30OA、パルス幅は約
20Ilsecにもおよぶことになυ、無視できない大
きな値となる。これに応じて、第3図の検出レベル設定
器22の設定値と、フィルタ2ノの時定敬が大きくなシ
検出時間の遅れは顕著に現われる。一方、GTOはタン
オフ特性において、タンオフ能力以上のアノード電流が
流れているときにオフf−ト信号を与えると破壊する特
性が必る。従って、GTOインバータ短絡故障電流の検
出に際しては、その検出レベル及び検出速度に従来のサ
イリスタ回路よシ厳しい制約がちシ、これ?解決しなけ
れば、累子の保護協調が取れないという問題を生じる。Peak value and pulse width increase. For example, when the main circuit filter capacitor voltage is 600 V, the snubber capacitor capacity is 4 μF, and the inductance of coil 6 is 10 μH, the Noyarsbeak value is about 30 OA and the pulse width is about 20 Ilsec, which are large values that cannot be ignored. becomes. Correspondingly, a delay in the detection time between the set value of the detection level setter 22 in FIG. 3 and the time difference between the filter 2 and the filter 2 becomes significant. On the other hand, GTO has a turn-off characteristic in which it will be destroyed if an off-state signal is applied when an anode current exceeding the turn-off capacity is flowing. Therefore, when detecting GTO inverter short-circuit fault current, there are stricter restrictions on the detection level and detection speed than with conventional thyristor circuits. If this problem is not resolved, the problem will arise that it will not be possible to coordinate the protection of Seiko.
本発明の目的は、電圧形インバータの過電流検出回路に
おいて、スナバ−コンデンサ充電電流による検出誤動作
を除去し、よシ早い検出が出来る電圧形インバータの過
電流検出装置を提供することにある。SUMMARY OF THE INVENTION It is an object of the present invention to provide an overcurrent detection device for a voltage source inverter that eliminates detection malfunctions due to snubber capacitor charging current and enables faster detection.
本発明はこの目的を達成するために、スナバ−回路のコ
ンデンサの充電電流奮シミュレーンヨンする回路を設け
、過電流検出回路の出力信号から前記回路の出力信号を
減算することにより1.Ia電流信号に含まれるスナバ
−コンブ゛ン°す′の充@電流全除去したことを特徴と
するものである。In order to achieve this object, the present invention provides a circuit for simulating the charging current of the capacitor of the snubber circuit, and subtracts the output signal of the circuit from the output signal of the overcurrent detection circuit. This is characterized in that the charging current of the snubber combiner contained in the Ia current signal is completely removed.
以下本発明全第6図と第7図に示す一実施例について説
明する。第6図において、前述した第3図の短絡電流検
出回路に減算回路25?1l−1没け、GTOのダート
信号またはダート信号と同期した信号を発生する回路2
6から信号を入力して、その信号を遅延させる遅延回路
27とその遅延された信号よシ適当な期間パルス全出力
する単安定マルチ回路28とそのパルス信号の積分及び
放電機能等を有する波形発生回路29を通して作られた
スナバ−充電電流のシミュレーション波形と従来の短絡
検出信号(ノイX゛除去用フィルタ2)の時定数は小さ
くなっているため信号波形は異なる。)との減算によっ
てスナバ−充′a電流の影q全低減する構成をしている
。An embodiment of the present invention shown in FIGS. 6 and 7 will be described below. In FIG. 6, a subtraction circuit 25?1l-1 is added to the short-circuit current detection circuit of FIG.
A delay circuit 27 which inputs a signal from 6 and delays the signal, a monostable multi-circuit 28 which outputs all pulses for an appropriate period as well as the delayed signal, and a waveform generator having functions such as integrating and discharging the pulse signal. The signal waveforms of the simulation waveform of the snubber charging current created through the circuit 29 and the conventional short circuit detection signal (noise X removal filter 2) are different because the time constant is smaller. ) is configured to completely reduce the influence of the snubber charging current q.
次に本発明の保Fil路動作について説明する。Next, the filter protection operation of the present invention will be explained.
第7図に、おいて、■は主回路直流電流を検出する電流
検出器8の出力信号全ノイズ除去用フィルタ21(従来
のフィルターと異なり、スナバ−電流成分全除去するた
めのものでなく1μsec前後のノイズ全除去するため
のものでろる□)に通した波形(以下vaと呼ぶ。)で
あり、■はダート信号又はr−ト信号と同期した信号波
形(以下vbと呼ぶ。)であシ、■は単安定マルチ回路
28の出力波形(以下V と呼ぶ。)で遅延回路により
(12−1,)時間遅れ立ち上がυ、ここではVの突出
部のピーク時刻に合わせて立ち下がらせている。■は波
形発生回路29の出力波形(以下V、と呼ぶ)でアシ、
ここではCR充電波形とCR放電波形よシ形成し、Vの
突出部の終わる時刻t4で無くなるようにしている。In Fig. 7, ■ is a filter 21 for removing all noise from the output signal of the current detector 8 that detects the main circuit DC current (unlike conventional filters, it is not for removing all the snubber current components, but for 1 μsec). This is the waveform (hereinafter referred to as va) that is passed through the □) which is used to remove all noise before and after the signal. (12-1,) is the output waveform of the monostable multicircuit 28 (hereinafter referred to as V), which rises with a delay of (12-1,) due to the delay circuit, and here falls in accordance with the peak time of the protruding part of V. It's set. ■ is the output waveform (hereinafter referred to as V) of the waveform generation circuit 29;
Here, a CR charging waveform and a CR discharging waveform are formed so that they disappear at time t4 when the protrusion of V ends.
■は減算回路25の出力波形(以下V。と呼ぶ。)でv
aとV、の減算した波形となっている。■ is the output waveform of the subtraction circuit 25 (hereinafter referred to as V); v
The waveform is obtained by subtracting a and V.
ここで時間(t2−tl)は負荷電流の大きさで異なり
、負荷iQ流が大きくなるにつれて時間が長くなってい
くので、厳密には遅延回路の遅延時間全負荷電流を変数
として変化しなければならないが、負荷′α流が小さい
ときはVのピーク値(スナバ−充電電流十負荷′11(
流)も小さくなるため、遅延時間全定格電流のときにセ
ットしておけば多少ずれても本発明の効果は充分に保つ
ことができる。ゆえに、ここでは後者の遅延時間一定方
式金とっている。また時間(14−12)は、スナバ−
充電電流のノ母ルス巾であるため個個の装置で決まって
いるものであり、この設定は単安定マルチ回路や波形発
生回路で一度セットすれば良いことになる。そこで、v
、!:v はa d
減算回路の入力抵抗によりマツチングをれ、vaの突出
部とvdが同等の値を取るようになっており、vaとV
、の減算によシveの波形が形成できる。また、v4の
波形は波形発生回路によりさまざまな波形とすることが
でき、コンデンサと抵抗又はコンデンサ、抵抗とインダ
クタンスを用いた充放電波形、積分回路を用いた三角波
形、半導体の非直線特性を利用した波形デジタルによる
階段波等が考えられる。また、簡易回路として波形発生
回路を設けず単安定マルチ回路のみでパルス中を時間(
tzt4)までとした矩形波を利用して行うこともでき
る。Here, the time (t2-tl) differs depending on the magnitude of the load current, and the time becomes longer as the load iQ current increases, so strictly speaking, the delay time of the delay circuit must be changed using the full load current as a variable. However, when the load 'α current is small, the peak value of V (snubber charging current + load '11 (
Since the current) also becomes smaller, if the delay time is set at the full rated current, the effect of the present invention can be maintained sufficiently even if there is a slight deviation. Therefore, the latter fixed delay time method is used here. Also, the time (14-12) is the snubber
Since this is the nominal pulse width of the charging current, it is determined for each individual device, and this setting only needs to be set once in the monostable multi-circuit or waveform generation circuit. Therefore, v
,! :v is matched by the input resistance of the a d subtraction circuit, so that the protruding part of va and vd take the same value, and va and V
By subtracting , the waveform of shive can be formed. In addition, the waveform of v4 can be made into various waveforms using a waveform generation circuit, such as a charge/discharge waveform using a capacitor and a resistor or a capacitor, a resistor and an inductance, a triangular waveform using an integrating circuit, and a nonlinear characteristic of semiconductors. A digital staircase wave or the like can be considered. In addition, as a simple circuit, a waveform generation circuit is not provided and only a monostable multi-circuit is used to calculate the time during the pulse (
It is also possible to perform this by using a rectangular wave up to tzt4).
ここで、重要なことは、vaの突出部波形とシミュレー
ション信号をできるだけ相似形に近づけることも重要で
あるが、パルス中が合っていれば、本発明の効果は充分
にあるだめこの・ぐルス巾を合わせることが第1優先と
なる。What is important here is to make the protrusion waveform of VA and the simulation signal as similar as possible, but as long as the middle of the pulse matches, the effect of the present invention will be sufficient. The first priority is to match the width.
以上のようにV、に対して補償を加えた信号veを利用
して短絡検出全行うことによシ、短絡検出速度を遅らせ
ていたノイズ除去用フィルタは従来と比べ除去すべきノ
イズ信号のパルス中がスナバ−充電′iK流以外の狭い
ものだけですむため、時足数が小さくできる。また短絡
検出レベル設屋器22の設定値も最大負荷電流の近傍に
設定することができる。As described above, by performing all short circuit detection using the signal ve which has been compensated for V, the noise removal filter that slows down the short circuit detection speed is able to remove the pulse of the noise signal that should be removed compared to the conventional one. Since only a narrow space other than the snubber charging flow is required, the number of hours can be reduced. Further, the setting value of the short circuit detection level setting device 22 can also be set near the maximum load current.
これらのことによシ、短絡故障時の検出速度が一段と向
上するため、故障発生時点から保護回路が動作するまで
の短絡電流の上昇値は低下し素子との保護協調が改善さ
れる。As a result of these factors, the detection speed in the event of a short-circuit fault is further improved, so that the increase in short-circuit current from the time the fault occurs until the protection circuit operates is reduced, and protection coordination with the elements is improved.
以上説明したように、本発明は短絡検出において悪影響
金与えているスナバ−光市屯流を、制御回路信号よシシ
ミュレーシ!l/することによシ、このシミュレーショ
ン信号を従来の過電流検出信号に減算する回路構成した
もので故障時の過電流検出速度が従来回路に比べ早くな
り素子の保護協調全向上させる効果がある。As explained above, the present invention solves the problem of snubber light flow that adversely affects short-circuit detection using control circuit signals. By doing this, the circuit is configured to subtract this simulation signal from the conventional overcurrent detection signal, and the overcurrent detection speed in the event of a failure is faster than that of the conventional circuit, which has the effect of completely improving the protection coordination of the elements. .
第1図は一般的な電圧形インバータを示ず構成図、第2
図は第1図のインバータ部と主回路フィルタコンデンサ
部を示す構成図、第3図は従来の過電流検出回路を示す
構成図、第4図は第2図のインバータ部の1相分金示す
41り成図、第5図は第4図の各部波形を示す波形図、
第6図は本発明の一実施例を示す構成図、第7図は第6
図の各部波形を示す波形図である。
9・・・GTOllo・・・逆並列ダイオード、1ノ・
・スナバ−抵抗、12・・・スナ/<−ダイオード、1
3・・・スナバ−コンデンサ、8・・・電流検出器、2
ノ・・・ノイズ除去用フィルタ回路、26・・・ブト信
号またはr−ト信号同期信号発生回路、27・・・遅延
回路、28・・・単安定マルチ回路、29・・・波形発
生回路。
出願人代理人 弁理士 鈴 江 武 彦第1図
第3図
第4図
第5図
第6図
第7図
1t2t4Figure 1 does not show a general voltage source inverter;
The figure is a block diagram showing the inverter section and main circuit filter capacitor section in Figure 1, Figure 3 is a block diagram showing a conventional overcurrent detection circuit, and Figure 4 is a block diagram showing one phase of the inverter section in Figure 2. Figure 5 is a waveform diagram showing the waveforms of each part of Figure 4.
FIG. 6 is a configuration diagram showing one embodiment of the present invention, and FIG.
FIG. 3 is a waveform diagram showing waveforms of various parts in the figure. 9...GTollo...Anti-parallel diode, 1 no.
・Snubber resistor, 12... Snubber/<-diode, 1
3... Snubber capacitor, 8... Current detector, 2
No. Noise removal filter circuit, 26. Button signal or r-to signal synchronization signal generation circuit, 27. Delay circuit, 28. Monostable multi circuit, 29. Waveform generation circuit. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 1t2t4
Claims (2)
ーを介して直流電圧を交流電圧に変換するインバータ部
を持っ電圧形インバータ装置において、インパーン出力
電圧波形を制御するスイッチング素子と、これに逆並列
に接続される逆並列ダイオードと、それらの素子に印加
されるdv/dt’z制御するためにそれら素子と並列
に接続されたスナバ−回路とで構成される電圧形インバ
ータにおいて、前記ノナ2〜回路のスナバ−コンデンサ
の充電電流をシミ、レーショ・ ンする回路を設は前記
電圧形インバータの直流電流又はフィルタコンデンサ電
流全挾−出する電流検出器の出力信号から前記シミュレ
ーションで得られるスナバ−コンデンサの充電電流全除
去した信号を得ることを特徴とする電圧形インバータの
過電流検出装置。(1) In a voltage source inverter device that has an inverter section that converts the DC voltage into AC voltage via a filter capacitor in the main circuit after rectifying the AC power supply, there is a switching element that controls the output voltage waveform of the inverter, and a switching element that is inversely parallel to this. In a voltage source inverter comprising an anti-parallel diode connected to the elements, and a snubber circuit connected in parallel with those elements to control dv/dt'z applied to those elements, A circuit for simulating the charging current of the snubber capacitor in the circuit is set up using the snubber capacitor obtained in the simulation from the output signal of the current detector that picks up the DC current of the voltage source inverter or the filter capacitor current. An overcurrent detection device for a voltage source inverter, characterized in that it obtains a signal with all charging current removed.
ションする回路は、制御回路のダート信号もしくはダー
ト信号と同期した信号を人力とする遅延回路と波形発生
回路よ多構成したこと全特徴とする特許請求の範囲第1
項記載の電圧形インバータの過電流検出装置。(2) The circuit for simulating the charging current of the snubber capacitor has a plurality of delay circuits and waveform generation circuits that manually generate a dart signal of the control circuit or a signal synchronized with the dart signal. Range 1
An overcurrent detection device for a voltage source inverter as described in .
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58116392A JPS609376A (en) | 1983-06-28 | 1983-06-28 | Overcurrent detector of voltage type inverter |
| US06/547,588 US4535378A (en) | 1982-11-16 | 1983-11-01 | Overcurrent detector for an inverter |
| DE19833341398 DE3341398A1 (en) | 1982-11-16 | 1983-11-15 | OVERCURRENT DETECTOR FOR A INVERTER |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58116392A JPS609376A (en) | 1983-06-28 | 1983-06-28 | Overcurrent detector of voltage type inverter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS609376A true JPS609376A (en) | 1985-01-18 |
Family
ID=14685889
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58116392A Pending JPS609376A (en) | 1982-11-16 | 1983-06-28 | Overcurrent detector of voltage type inverter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS609376A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020255249A1 (en) * | 2019-06-18 | 2020-12-24 | 三菱電機株式会社 | Power conversion device, refrigeration cycle device, and air-conditioning device |
| JPWO2023095292A1 (en) * | 2021-11-26 | 2023-06-01 |
-
1983
- 1983-06-28 JP JP58116392A patent/JPS609376A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020255249A1 (en) * | 2019-06-18 | 2020-12-24 | 三菱電機株式会社 | Power conversion device, refrigeration cycle device, and air-conditioning device |
| JPWO2020255249A1 (en) * | 2019-06-18 | 2021-11-25 | 三菱電機株式会社 | Power converter, refrigeration cycle device and air conditioner |
| JPWO2023095292A1 (en) * | 2021-11-26 | 2023-06-01 |
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