JPS6094835U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS6094835U
JPS6094835U JP1983187218U JP18721883U JPS6094835U JP S6094835 U JPS6094835 U JP S6094835U JP 1983187218 U JP1983187218 U JP 1983187218U JP 18721883 U JP18721883 U JP 18721883U JP S6094835 U JPS6094835 U JP S6094835U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
substrate
semiconductor device
semiconductor chip
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983187218U
Other languages
Japanese (ja)
Inventor
隆也 長畑
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP1983187218U priority Critical patent/JPS6094835U/en
Publication of JPS6094835U publication Critical patent/JPS6094835U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は従来例の断面図、第２図はこの考案の実施例を
示す断面図である。 １・・・・・・基板、２・・・・・・半導体チップ、３
・・川・リード、４・・・・・・ワイヤ、５・・・・・
べぼみ部。FIG. 1 is a sectional view of a conventional example, and FIG. 2 is a sectional view showing an embodiment of this invention. 1...Substrate, 2...Semiconductor chip, 3
・・River・Reed, 4・・・・Wire, 5・・・・
Bebomi part.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基板上に設置された半導体チップとリードとをワイヤで
接続してなる半導体装置において、前記半導体チップを
前記基板の表面に設けたくぼみ部に設置してなる半導体
装置。A semiconductor device comprising a semiconductor chip placed on a substrate and a lead connected by a wire, the semiconductor device comprising the semiconductor chip placed in a recess provided on the surface of the substrate.
JP1983187218U 1983-12-02 1983-12-02 semiconductor equipment Pending JPS6094835U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983187218U JPS6094835U (en) 1983-12-02 1983-12-02 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983187218U JPS6094835U (en) 1983-12-02 1983-12-02 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS6094835U true JPS6094835U (en) 1985-06-28

Family

ID=30404179

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983187218U Pending JPS6094835U (en) 1983-12-02 1983-12-02 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6094835U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5874047A (en) * 1981-10-28 1983-05-04 Toshiba Corp Hybrid integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5874047A (en) * 1981-10-28 1983-05-04 Toshiba Corp Hybrid integrated circuit

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