JPS6098763A - Medium tone expressing system - Google Patents

Abstract

PURPOSE:To obtain a picture of good quality by expressing consecutive identical medium gradation levels by means of one kind of line pattern in the system constituting picture elements with plural dots and expressing medium tone to improve the expression of the medium tone. CONSTITUTION:In inputting a pattern signal (b) of an odd number line, it is stored to a register 2 after one bit delay 4 and to a register 3 directly respectively and also inputted to an odd/even line detection circuit 5. In this case, the pattern signal of the preceding line and the next preceding line is stored respectively to an even number latch circuit 8 and an odd number latch circuit 9, the circuit 5 outputs an output of an odd number line and selection circuits 6, 7 select the circuit 9. When a gate 10 is opened at a proper timing, the signal stored in the register 3 and the circuit 9 is compared by a comparator circuit 11, and when the both are coincident, the selection circuit 12 selects a signal in the register 2 and when dissident, a signal of the register 3 is selected and a pattern signal is recorded to a recording paper sheet 17 via an output circuit 13, a drive circuit 14 and a thermal head 15. This operation is conducted alternately to odd and even number lines.

Description

[Detailed Description of the Invention] (Field of Application) The present invention relates to a halftone expression method, and in particular,
This invention relates to a halftone expression method that expresses halftones using a pixel pattern composed of a plurality of dots.

(Prior art) Conventional halftone expression methods include systematic dithering methods, etc.
There is a method of expressing a wide halftone image by repeating a pixel pattern composed of a plurality of dots. For example, 3
Taking the value dither method as an example of a halftone expression method using a 2x2 matrix, a wide halftone image is expressed by repeating a certain halftone expression matrix shown in Figure 1 as shown in Figure 2. It was done by

In this case, the wide halftone image appears to be composed of repeating two vertical lines A and B shown in FIG. 2, and the halftone expression is not sufficiently clear. The drawback was that it was not carried out.

(Objective) The object of the present invention is to provide an apparatus for expressing halftones by repeating a pixel pattern composed of a plurality of dots as described above. An object of the present invention is to provide a halftone expression method with improved halftone expression.

<Summary> The feature of the present invention is that the pixel is composed of a plurality of dots.
: In the method of expressing halftones, the same continuous halftone level is expressed by one type of line pattern.

(Example) Hereinafter, an example in which the present invention is applied to a transfer type thermal recording device will be described.

In order for the recording unit to output the halftones expressed by the 2 x 2 matrix of the ternary dither method, two continuous lines in the main scanning direction are required as a minimum, and in order to express the entire image, By outputting these two lines as one unit repeatedly in the sub-scanning direction, the intermediate tone is expressed.

In FIG. 3, a is a transmitted pattern signal, which is sent to the line buffer 7 memory 1a alternately for one line in the main scanning direction by the switch S1.

1b. The switch $2 is connected to the other line buffer memory 1, which is different from the line buffer memory selected by the switch S1, and reads out the pattern signal of the previous line at high speed. , line buffer memories 1a, 1b
For example, the timing with the pattern signal a input to the input signal a is as shown in FIG. That is, if the pattern signal a for one line is sent over a time T1, the time T2 during which the pattern signal a for one line is read out is shorter than Tl.

In this way, the pattern signal read out at high speed,
It is input to the circuit shown in Figure 5.

In FIG. 5, the pattern signal, which is a print signal in the main scanning direction, is sent with a one-pitch shift.

The data is then temporarily held in the first register 2 and the second register 3, each having a capacity for one line (one raster) in the main scanning direction. In this poem, the pattern signal 1) input to the first register 2 passes through the 1-pitch 1 to delay circuit 4, so the pattern signal held in the first and second registers 2 and 3 is in the main scanning direction. The signal is shifted by one dot.

Reference numeral 5 designates an odd-even line detection circuit for detecting whether the pattern signal for one line in the main scanning direction is an odd-numbered line signal or an even-numbered line signal. The odd-even line detection circuit 5 is composed of, for example, a toggle flip-flop, and is triggered by a synchronization signal included in one line of the pattern signal. therefore,
The odd-even line detection circuit 5 alternately outputs high and low signals for each line, thereby controlling the first and second selection circuits 6 and 7.

8 is an even latch circuit having a capacity for one line in the main scanning direction, and 9 is an odd latch circuit having the same capacity.

Now, if the pattern signal of an odd line is input to the first and second registers 2 and 3, the even latch circuit 8 holds the pattern signal of the previous line, and the odd latch circuit 9 holds the pattern signal of the previous line. This means that the line pattern signal is retained.

Further, the odd-even line detection circuit 5 outputs the output of the odd-numbered line, and the first and second selection circuits 6.7 select the odd-numbered latch circuit 9.

In this state, the gate 10 is activated at an appropriate timing by a signal from a timing circuit (not shown).
is opened, and the signal held in the second register is sent to the comparator circuit 11. On the other hand, the signal held in the odd number launch circuit 9 selected by the first selection circuit 6 is sent to the comparison circuit 11. Then, the comparison circuit 9 compares the two.

When the comparison results in a match, a match signal is sent from the comparison circuit 11 to the third selection circuit 12. As a result, the selection circuit 12 selects the first register 2 that holds the pattern signal shifted by one pitch. On the other hand, when there is a mismatch, the comparison circuit 11 outputs a mismatch signal, and the selection circuit 12 selects the second register 3 based on this. Note that the signal that has passed through the gate 10 is input into the second register 3 again.

Now, if we assume that a matching signal is output from the comparison circuit 11,
The third selection circuit 12 selects the first register 2, and the pattern signal held in the register 2 shifted to 1-pitch 1 is sent to the second selection circuit 7, such as the output circuit 13. The output circuit 13 controls the drive circuit 14 based on the sent pattern signal. Drive circuit 14 controls thermal head 1b in a well-known manner, for example to selectively heat ink donor sheet 16. As a result, recording paper 1
7, an image corresponding to the pattern signal is recorded.

On the other hand, the pattern signal from the first register 2 input to the second selection circuit 7 is written into the odd latch circuit 9 because the second selection circuit selects the odd latch circuit 9.

Next, the pattern signal of the next even line is
and input into the second registers 2 and 3,
The odd-even line detection circuit 5 inverts and outputs an even line signal. As a result, the first and second selection circuits select the even latch circuit 8.

Subsequently, the gate 10 is opened at an appropriate timing, and the pattern signal held in the second register 3 and the pattern signal of the previous line held in the even latch circuit 8 are connected by a clock (not shown). , are compared by the comparison circuit 11. If they match, a match signal from the comparator circuit 11 is used to select the pattern signal held in the first register 2 that is shifted by one bit. On the other hand, if there is a mismatch, the second register 3 is selected.

Now, if the comparator circuit 11 outputs a "match signal",
By the same operation as in the above case, a pattern signal shifted by one bit is sent to the output circuit 13 and the even latch circuit 8.

Accordingly, the image recorded on the recording paper 17 by the pattern signal from the output circuit 13 is, for example, the image shown in FIG. As in the fourth row, the image is transferred with a one-pitch shift in the main scanning direction.

Next, the pattern signal of the odd numbered line one after another is
registers 2, 3. If you follow the input, the pattern signal shifted by 1 bit is held in the odd latch circuit 9, so the comparison circuit 11 compares the pattern signal of the second register 3 with the pattern signal of the leading latch circuit 9. A comparison will always result in a mismatch. Therefore, the third selection circuit 12 selects the pattern signal held in the second register 3,
In other words, select the signal that is not shifted by 1 bit)
do. This pattern signal is sent to the output circuit 13 and recorded on the recording paper 17 by the thermal head 13.

This one-line image, as shown in the fifth column of FIG. The image is shifted by one bit from the pattern image in the fourth column.

As described above, according to this embodiment, when the same halftone is spread over several lines or more, it is transferred with a one bit shift every two lines. As is clear, the intermediate tone is expressed by one type of line pattern C. Therefore, good image quality with improved halftone expression can be obtained.

In addition, since the heat generating part of the thermal head changes every two lines, it is difficult to be affected by the heat storage effect of the heating resistor. Therefore, it is possible to reduce the deterioration of image quality due to the heat storage effect. I can do it.

In the above embodiment, the capacity of the first and second registers has been described as one line, but this is not limited to one line, and may be smaller than one line. In this way, the same improvement as described above can be achieved even for halftones with a uniform width of 0 than for one line.

Furthermore, although the above embodiments have been explained using a transfer type thermal recording method as an example, the present invention is not limited to this, but includes a direct thermal recording method, an electrostatic recording method, an ink shed recording method, a laser recording method, an electric discharge recording method, etc. The present invention can be applied to any recording method that handles both signals by digitizing them, such as a destructive recording method.

Effects@) As is clear from the above description, according to the present invention, the following effects are achieved.

(1) Since halftones are expressed by one type of line pattern, good image quality with improved halftone expression can be obtained.

(2) Since the heat generating part of the thermal head changes every two lines, it is less susceptible to heat storage effects, and deterioration in image quality can be reduced.

[Brief explanation of drawings]

Figure 1 shows an example of a halftone pixel pattern expressed by a 2x2 matrix of the ternary dither method, and Figure 2 shows an example of a conventional halftone expression expressed by the pixel pattern of Figure 1. Figure 3 is a block diagram of a device that changes the writing speed and reading speed of pattern signals, and Figure 4 is a block diagram of a device that changes the writing speed and reading speed of pattern signals.
FIG. 5 is a block diagram of an embodiment of the present invention, and FIG. 6 is a diagram showing an example of halftones expressed by this embodiment. 2.3... First and second registers, 4... 1-bit delay circuit, 5... Odd-even line detection circuit, 6,7°12
...First. Second. 3rd selection circuit, 8.9... Even number, odd number latch circuit, 11... Comparison circuit agent attorney
Michito Hiraki and 1 other person

Claims (1)

[Claims] (1) A first register into which a pattern signal is written, a second register into which a signal obtained by shifting the pattern signal by 1 bit is written, an odd latch circuit which stores the previous pattern signal of the odd line, and an odd latch circuit which stores the previous pattern signal of the even line. an even number latch circuit for storing, a comparison circuit for comparing the first register with the odd number latch circuit or the even number latch circuit;
and a selection circuit that selects the second register when the comparison result by the comparison circuit matches, and selects the first register when the comparison result does not match, and selects the first register when the comparison results match, and selects the first register when the comparison results match, and the selection circuit selects the first register when the comparison results match, and selects the first register when the comparison results do not match. A halftone expression method characterized by the fact that it is designed to express